Patents by Inventor Chi Wong

Chi Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • LEVELING DEVICE, MODULAR CLEAN ROOM AND THE DOCKING METHOD OF MODULAR CLEANROOM
    Publication number: 20250129594
    Abstract: A leveling device, includes a leveling plate, a first leveling member, a second leveling member. The first leveling member and the second leveling member are both provided on the leveling plate and can level the leveling plate independently of each other. And a controller communicatively connected with said first leveling member for controlling the lifting and lowering of the first leveling member. The leveling device of the embodiment of the application enables convenient and accurate leveling of the first modular cleanroom and frees operators from complex leveling operations without altering the existing trolley.
    Type: Application
    Filed: October 14, 2022
    Publication date: April 24, 2025
    Applicant: PRECISION ROBOTICS (HONG KONG) LIMITED
    Inventors: Ho Chi WONG, Ka Wai CHAN, Tak Man LEUNG, Lap Fung CHAN, Cheuk Wun CHOI, Danny HO, Fei Long CHEN
  • SCALABLE MULTI-PARTY NETWORKS FOR HIGH-RATE ENTANGLEMENT DISTRIBUTION AND QUANTUM COMMUNICATIONS
    Publication number: 20250119281
    Abstract: In some embodiments, a system for quantum key distribution, includes a plurality of n devices pairwise connected by an optical network, where n is an integer greater than or equal to 2. The optical network comprises a set of n(n?1) channels. The system employs wavelength-multiplexing, wavelength-demultiplexing, and time-multiplexing to provide a secure quantum key between two devices.
    Type: Application
    Filed: July 19, 2024
    Publication date: April 10, 2025
    Inventors: Chee Wei Wong, Murat Sarihan, Xiang Cheng, Kai-Chi Chang
  • FLIP CHIP PACKAGE AND FABRICATION METHOD THEREOF
    Publication number: 20250112166
    Abstract: A flip-chip package includes a substrate having a bond pad in a die-mounting area of the substrate. A DRAM die is mounted on the die-mounting area of the substrate in a flip chip fashion. The DRAM die includes an input/output (I/O) pad on its active surface and the I/O pad is electrically coupled to the t bond pad through a connecting element. The bond pad has a diameter that is smaller than a diameter of the I/O pad. A SoC die is mounted on the substrate in a flip chip fashion. The DRAM die and the SoC die are mounted on the substrate in a side-by-side manner.
    Type: Application
    Filed: September 22, 2024
    Publication date: April 3, 2025
    Applicant: MEDIATEK INC.
    Inventors: Pei-Haw Tsao, Te-Chi Wong
  • MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE
    Publication number: 20250105080
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least a circuit substrate, a semiconductor die and a filling material. The circuit substrate has a first surface, a second surface opposite to the first surface and a cavity concave from the first surface. The circuit substrate includes a dielectric material and a metal floor plate embedded in the dielectric material and located below the cavity. A location of the metal floor plate corresponds to a location of the cavity. The metal floor plate is electrically floating and isolated by the dielectric material. The semiconductor die is disposed in the cavity and electrically connected with the circuit substrate. The filling material is disposed between the semiconductor die and the circuit substrate. The filling material fills the cavity and encapsulates the semiconductor die to attach the semiconductor die and the circuit substrate.
    Type: Application
    Filed: December 11, 2024
    Publication date: March 27, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Liang Lin, Po-Yao Chuang, Te-Chi Wong, Shuo-Mao Chen, Shin-Puu Jeng
  • Manufacturing method of semiconductor package including forming cavity in circuit substrate without exposing floor plate
    Patent number: 12205861
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least a circuit substrate, a semiconductor die and a filling material. The circuit substrate has a first surface, a second surface opposite to the first surface and a cavity concave from the first surface. The circuit substrate includes a dielectric material and a metal floor plate embedded in the dielectric material and located below the cavity. A location of the metal floor plate corresponds to a location of the cavity. The metal floor plate is electrically floating and isolated by the dielectric material. The semiconductor die is disposed in the cavity and electrically connected with the circuit substrate. The filling material is disposed between the semiconductor die and the circuit substrate. The filling material fills the cavity and encapsulates the semiconductor die to attach the semiconductor die and the circuit substrate.
    Type: Grant
    Filed: August 2, 2023
    Date of Patent: January 21, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Liang Lin, Po-Yao Chuang, Te-Chi Wong, Shuo-Mao Chen, Shin-Puu Jeng
  • Systems and methods of characterizing semiconductor materials
    Patent number: 12085516
    Abstract: Systems and methods for non-contact characterization of semiconductor devices. Systems may include: an infrared radiation source directing radiation towards the semiconductor device; a radiation directing device positioned proximal the infrared radiation source to direct radiation towards an opposing side of the semiconductor device, the semiconductor device receivable between the radiation directing device and the infrared radiation source; and a radiation detector proximal to the infrared radiation source to sense radiation associated with a plurality of infrared wavebands from the semiconductor device for determining a dopant profile property of the semiconductor device. The sensed radiation may include radiation originating from the infrared radiation source reflected from the semiconductor device. The sensed radiation may include radiation originating from the radiation directing device and emerging from the semiconductor device.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: September 10, 2024
    Assignee: AURORA SOLAR TECHNOLOGIES (CANADA) INC.
    Inventors: Hamidreza Ghoddami, Johnson Kai Chi Wong, Gordon Deans
  • CLEAN ROOM MODULE
    Publication number: 20240288184
    Abstract: The present invention relates to a clean room module, which includes: a housing defining an accommodation cavity therein and formed with an air inlet and an air outlet; a gas circulation device arranged at the housing, with two ends thereof being connected to the air inlet and the air outlet respectively, the housing and the gas circulation device being both sealed to define a confined space without gas exchange with outside; and a filter arranged in the gas circulation device, wherein the gas in the accommodation cavity is drawn out from the air outlet through the gas circulation device, filtered by the filter, and sent back to the accommodation cavity from the air inlet. The clean room module of the present application can significantly reduce the time required for the accommodation cavity to reach a preset cleanliness after the cleaning function is activated.
    Type: Application
    Filed: May 27, 2022
    Publication date: August 29, 2024
    Inventors: Ho Chi Wong, Ka Wai Chan, Tak Man Leung, Lap Fung Chan, Fei Long Chen
  • SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF
    Publication number: 20240243098
    Abstract: A semiconductor package includes a package substrate, an interposer on and electrically connected to the package substrate, a central logic die disposed on and electrically connected to the interposer, peripheral function dies disposed on and electrically connected to the interposer and located in proximity to the central logic die, and at least one dummy die disposed between the central logic die and the peripheral function dies so as to form a rectangular shaped die arrangement. The at least one dummy die is disposed at a corner position of the rectangular shaped die arrangement.
    Type: Application
    Filed: December 17, 2023
    Publication date: July 18, 2024
    Applicant: MEDIATEK INC.
    Inventors: Pei-Haw Tsao, Te-Chi Wong
  • SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
    Publication number: 20240194556
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least a circuit substrate, a semiconductor die and a filling material. The circuit substrate has a first surface, a second surface opposite to the first surface and a cavity concave from the first surface. The circuit substrate includes a dielectric material and a metal floor plate embedded in the dielectric material and located below the cavity. A location of the metal floor plate corresponds to a location of the cavity. The metal floor plate is electrically floating and isolated by the dielectric material. The semiconductor die is disposed in the cavity and electrically connected with the circuit substrate. The filling material is disposed between the semiconductor die and the circuit substrate. The filling material fills the cavity and encapsulates the semiconductor die to attach the semiconductor die and the circuit substrate.
    Type: Application
    Filed: February 16, 2024
    Publication date: June 13, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Liang Lin, Po-Yao Chuang, Te-Chi Wong, Shuo-Mao Chen, Shin-Puu Jeng
  • CORELESS SUBSTRATE PACKAGE AND FABRICATION METHOD THEREOF
    Publication number: 20240178159
    Abstract: A coreless substrate package includes a coreless substrate; a package device mounted on a coreless substrate; an underfill material filling into a space between the package device and the coreless substrate; a stiffener ring disposed on a top surface of the coreless substrate along perimeter of the coreless substrate; and a gap fill material disposed in a gap between the stiffener ring and the package device.
    Type: Application
    Filed: November 6, 2023
    Publication date: May 30, 2024
    Applicant: MEDIATEK INC.
    Inventors: Pei-Haw Tsao, Te-Chi Wong
  • Semiconductor package including a circuit substrate having a cavity and a floor plate embedded in a dielectric material and a semiconductor die disposed in the cavity
    Patent number: 11908764
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least a circuit substrate, a semiconductor die and a filling material. The circuit substrate has a first surface, a second surface opposite to the first surface and a cavity concave from the first surface. The circuit substrate includes a dielectric material and a metal floor plate embedded in the dielectric material and located below the cavity. A location of the metal floor plate corresponds to a location of the cavity. The metal floor plate is electrically floating and isolated by the dielectric material. The semiconductor die is disposed in the cavity and electrically connected with the circuit substrate. The filling material is disposed between the semiconductor die and the circuit substrate. The filling material fills the cavity and encapsulates the semiconductor die to attach the semiconductor die and the circuit substrate.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: February 20, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Liang Lin, Po-Yao Chuang, Te-Chi Wong, Shuo-Mao Chen, Shin-Puu Jeng
  • MANUFACTURING METHOD OF SEMICONDUCTOR PACKAGE
    Publication number: 20230386956
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least a circuit substrate, a semiconductor die and a filling material. The circuit substrate has a first surface, a second surface opposite to the first surface and a cavity concave from the first surface. The circuit substrate includes a dielectric material and a metal floor plate embedded in the dielectric material and located below the cavity. A location of the metal floor plate corresponds to a location of the cavity. The metal floor plate is electrically floating and isolated by the dielectric material. The semiconductor die is disposed in the cavity and electrically connected with the circuit substrate. The filling material is disposed between the semiconductor die and the circuit substrate. The filling material fills the cavity and encapsulates the semiconductor die to attach the semiconductor die and the circuit substrate.
    Type: Application
    Filed: August 2, 2023
    Publication date: November 30, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Liang Lin, Po-Yao Chuang, Te-Chi Wong, Shuo-Mao Chen, Shin-Puu Jeng
  • MODIFYING A FILE STORAGE STRUCTURE UTILIZING A MULTI-SECTION GRAPHICAL USER INTERFACE
    Publication number: 20230093929
    Abstract: This disclosure describes embodiments of systems, methods, and non-transitory computer readable storage media that can display icons for target digital content items and candidate destination folders within different sections of a multi-section graphical user interface (GUI) and adjust a corresponding file storage structure to reflect organization changes indicated by user interactions that move digital-content-items icons into folder icons. For example, the disclosed system can (i) display, within a first section of a multi-section GUI, icons representing digital content items and (ii) display, within a second section of the multi-section GUI, icons representing folders as candidate destination folders. Then, the disclosed systems can detect user interactions that move digital-content-item icons to folder icons and adjust an underlying file storage structure to reflect the organization indicated by the user interaction.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Inventors: Hsuan Chi Wong, Jennifer Lukban, Mahlet Tiruneh, Yuxin Xu
  • SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
    Publication number: 20230067914
    Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least a circuit substrate, a semiconductor die and a filling material. The circuit substrate has a first surface, a second surface opposite to the first surface and a cavity concave from the first surface. The circuit substrate includes a dielectric material and a metal floor plate embedded in the dielectric material and located below the cavity. A location of the metal floor plate corresponds to a location of the cavity. The metal floor plate is electrically floating and isolated by the dielectric material. The semiconductor die is disposed in the cavity and electrically connected with the circuit substrate. The filling material is disposed between the semiconductor die and the circuit substrate. The filling material fills the cavity and encapsulates the semiconductor die to attach the semiconductor die and the circuit substrate.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Liang Lin, Po-Yao Chuang, Te-Chi Wong, Shuo-Mao Chen, Shin-Puu Jeng
  • SYSTEMS AND METHODS OF CHARACTERIZING SEMICONDUCTOR MATERIALS
    Publication number: 20220412896
    Abstract: Systems and methods for non-contact characterization of semiconductor devices. Systems may include: an infrared radiation source directing radiation towards the semiconductor device; a radiation directing device positioned proximal the infrared radiation source to direct radiation towards an opposing side of the semiconductor device, the semiconductor device receivable between the radiation directing device and the infrared radiation source; and a radiation detector proximal to the infrared radiation source to sense radiation associated with a plurality of infrared wavebands from the semiconductor device for determining a dopant profile property of the semiconductor device. The sensed radiation may include radiation originating from the infrared radiation source reflected from the semiconductor device. The sensed radiation may include radiation originating from the radiation directing device and emerging from the semiconductor device.
    Type: Application
    Filed: December 4, 2020
    Publication date: December 29, 2022
    Inventors: Hamidreza GHODDAMI, Johnson Kai Chi WONG, Gordon DEANS
  • Systems and methods of secure data exchange
    Patent number: 9762553
    Abstract: In embodiments of the present invention improved capabilities are described for managing digital rights management (DRM) protected content sharing in a networked secure collaborative computer data exchange environment through a secure exchange facility managed by an intermediate organizational entity amongst users of a plurality of other organizational entities, wherein computer data content and access rights for the computer data content is shared between a first and second user, the computer data content and access rights for the computer data content are transformed into a DRM protected computer data content through communications with a DRM engine, wherein the DRM engine is selected based on a content type of the computer data content, and the DRM engine is provided by an entity other than the intermediate organizational entity and other than any of the plurality of other organizational entities.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: September 12, 2017
    Inventors: Christopher Todd Ford, Visal Chandrakant Acharya, Richard David Anstey, Wasif Qayyum Awan, Amir M. Azmi, Selom Harry Azuma, Wade Michael Callison, Clement Cazalot, Mayank Choudhary, Peter W. Cleary, Benedict Robert Dsilva, Fuat Ertunc, Simon Genzer, John William Giudice, Douglas McLean Gordon, Jonathan Gorin, Mushegh Hakhinian, John Held, Ronald W. Hovsepian, Ganesh Kannan, John Landy, David Scott Lindsay, Dario R. Lirio, Himali Mahajan, Olivier Mangez, Kevin L. McCarthy, Kevin McNulty, Jerry Lee Meyer, Anupam Miharia, Constantin Miroslav, Andrew James Mitchell, Uli P. Mittermaier, Harshal Morparia, Alex Negrea, Yana Nikolayeva, Madhavi Parimi, Matthew A. Porzio, Vedang Shailesh Purohit, Liviu Rozin, Godsway Sappor, Glenn Schwartz, Fahim Siddiqui, Nanu Swamy, Paul Tearnen, Karla Toyloy-Mattera, Sudhakar Velamoor, Margin Vora, Michael Joseph Waluk, Charlie Weiblen, Peter Wenzel, Jeffery Chi Wong, Tony Yip, Khurram Ghafoor
  • Systems and methods for improving the privacy-protection of the exchange of STD test results and the utility of STD test results
    Patent number: 9697329
    Abstract: Various aspects of the invention provide systems and methods for improving the privacy-protection of the exchange of STD's test results and the utility of STD test results. One aspect of the invention provides a computer-implemented method of improving privacy-protection during the exchange of STD test results by preventing the exchange of STD test results if user-definable criteria are not met and deliberately obscuring the cause of prevented attempts at exchanging STD test results. The method includes providing a software application for importing STD test results; inputting criteria; attempting to exchange STD test results; and either preventing or allowing the exchange of STD test results at a plurality of stages. Another aspect of the invention provides a computer-implemented method of improving the utility of STD test results by recommending safe sexual contact practices and sexual health-related products and services based upon the use of algorithms.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: July 4, 2017
    Inventor: Michael Wei-Chi Wong
  • SYSTEMS AND METHODS OF SECURE DATA EXCHANGE
    Publication number: 20170142076
    Abstract: In embodiments of the present invention improved capabilities are described for managing digital rights management (DRM) protected content sharing in a networked secure collaborative computer data exchange environment through a secure exchange facility managed by an intermediate organizational entity amongst users of a plurality of other organizational entities, wherein computer data content and access rights for the computer data content is shared between a first and second user, the computer data content and access rights for the computer data content are transformed into a DRM protected computer data content through communications with a DRM engine, wherein the DRM engine is selected based on a content type of the computer data content, and the DRM engine is provided by an entity other than the intermediate organizational entity and other than any of the plurality of other organizational entities.
    Type: Application
    Filed: January 12, 2017
    Publication date: May 18, 2017
    Inventors: Christopher Todd Ford, Visal Chandrakant Acharya, Richard David Anstey, Wasif Qayyum Awan, Amir M. Azmi, Selom Harry Azuma, Wade Michael Callison, Clement Cazalot, Mayank Choudhary, Peter W. Cleary, Benedict Robert Dsilva, Fuat Ertunc, Simon Genzer, John William Giudice, Douglas McLean Gordon, Jonathan Gorin, Mushegh Hakhinian, John Held, Ronald W. Hovsepian, Ganesh Kannan, John Landy, David Scott Lindsay, Dario R. Lirio, Himali Mahajan, Olivier Mangez, Kevin L. McCarthy, Kevin McNulty, Jerry Lee Meyer, Anupam Miharia, Constantin Miroslav, Andrew James Mitchell, Uli P. Mittermaier, Harshal Morparia, Alex Negrea, Yana Nikolayeva, Madhavi Parimi, Matthew A. Porzio, Vedang Shailesh Purohit, Liviu Rozin, Godsway Sappor, Glenn Schwartz, Fahim Siddiqui, Nanu Swamy, Paul Tearnen, Karla Toyloy-Mattera, Sudhakar Velamoor, Margin Vora, Michael Joseph Waluk, Charlie Weiblen, Peter Wenzel, Jeffrey Chi Wong, Tony Yip, Khurram Ghafoor
  • Systems and methods of secure data exchange
    Patent number: 9613190
    Abstract: An example method for managing digital rights management (DRM) protected content sharing in a networked secure collaborative computer data exchange environment includes establishing, by a secure exchange facility and managed by an intermediate organizational entity, a procedure that allows a user from a first entity to share access to computer data content with a user from a second entity based on indicated access rights. The method includes transforming the computer data content into DRM protected content, utilizing a DRM engine provided by a separate entity. The method includes granting access to the content to the second user, providing permissioned control to entities utilizing a number of data storage nodes, and managing secure data exchange of the content and metadata, without the secure exchange facility having access to the content. The method includes operations to support content services including data transformation, filtering, analytics, and searching tools for the content.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: April 4, 2017
    Assignee: Intralinks, Inc.
    Inventors: Christopher Todd Ford, Visal Chandrakant Acharya, Richard David Anstey, Wasif Qayyum Awan, Amir M. Azmi, Selom Harry Azuma, Wade Michael Callison, Clement Cazalot, Mayank Choudhary, Peter W. Cleary, Benedict Robert Dsilva, Fuat Ertunc, Simon Genzer, John William Giudice, Douglas McLean Gordon, Jonathan Gorin, Mushegh Hakhinian, John Held, Ronald W. Hovsepian, Ganesh Kannan, John Landy, David Scott Lindsay, Dario R. Lirio, Himali Mahajan, Olivier Mangez, Kevin L. McCarthy, Kevin McNulty, Jerry Lee Meyer, Anupam Miharia, Constantin Miroslav, Andrew James Mitchell, Uli P. Mittermaier, Harshal Morparia, Alex Negrea, Yana Nikolayeva, Madhavi Parimi, Matthew A. Porzio, Vedang Shailesh Purohit, Liviu Rozin, Godsway Sappor, Glenn Schwartz, Fahim Siddiqui, Nanu Swamy, Paul Tearnen, Karla Toyloy-Mattera, Sudhakar Velamoor, Margin Vora, Michael Joseph Waluk, Charlie Weiblen, Peter Wenzel, Jeffery Chi Wong, Tony Yip, Khurram Ghafoor
  • Connector assemblies and electronic devices with the same
    Patent number: 9509104
    Abstract: A connector assembly is electrically coupled to an electronic device. The connector assembly includes a supporting assembly supporting the electronic device, an adjusting frame, and a connecting element. The adjusting frame is slidably fixed on the supporting assembly. The connecting element is slidably fixed on the adjusting frame and electrically coupled to the electronic device. The connecting element includes a connector and a cable electrically coupled to the connector. The connector includes a plurality of plugs in different sizes and types. When the electronic device is fixed on the supporting assembly, the adjusting frame is slid to the supporting assembly and the connector is rotated to choose one of the plugs to be coupled to the electronic device.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: November 29, 2016
    Assignees: HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Shih-Chi Wong, Chien-Hung Lee