Abstract: A semiconductor device package includes a first electronic device and a second electronic device. The first electronic device includes a first redistribution layer (RDL) including a circuit layer. The second electronic device is disposed on the first RDL of the first electronic device. The second electronic device includes an encapsulant and a patterned conductive layer. The encapsulant has a first surface facing the first RDL of the first electronic device, and a second surface opposite to the first surface. The patterned conductive layer is disposed at the second surface of the encapsulant, and is configured to be electrically coupled to the circuit layer of the first RDL of the first electronic device.

Abstract: A semiconductor device includes a first semiconductor die, a second semiconductor die, a dielectric layer, a first redistribution layer and a second redistribution layer. The first semiconductor die includes a first bonding pad and a second bonding pad. The second semiconductor die includes a third bonding pad and a fourth bonding pad. The dielectric layer covers the first semiconductor die and the second semiconductor die, and defines a first opening exposing the first bonding pad and the second bonding pad and a second opening exposing the third bonding pad and the fourth bonding pad. The first redistribution layer is disposed on the dielectric layer, and electrically connects the first bonding pad and the third bonding pad. The second redistribution layer is disposed on the dielectric layer, and electrically connects the second bonding pad and the fourth bonding pad.

Abstract: A broadcast receiver is capable of automatically switching to an applicable frequency of a radio station in a region, and stores plural geocodes related respectively to area blocks of the region, and plural frequencies related the radio station and each corresponding to one of the area codes. The broadcast receiver obtains a geographic coordinate set when a radio signal currently received from the radio station has poor quality. Then, the broadcast receiver converts the coordinate set to a geocode, finds an area code corresponding to the geocode, and receives the radio signal from the radio station on the frequency corresponding to the area code.

Abstract: A method of supplying electric power to a computer system compliant with specification provided by the OCP is provided. The method includes: a PLU setting an OCP_V3_EN signal to a high level so as to make the computer system operate in a first mode; a BMC obtaining card data from an OCP card when the computer system operates in the first mode; the BMC determining whether standby power provided by a PSU in the first mode is sufficient according to the card data; and when it is determined that the standby power is not sufficient, the BMC controlling the PLU to make the computer system operate in a second mode requiring more electric power, and to then control the PSU to provide main power that is greater than the standby power to the OCP card.

Abstract: A semiconductor device package includes a first electronic device and a second electronic device. The first electronic device includes a first redistribution layer (RDL) including a circuit layer. The second electronic device is disposed on the first RDL of the first electronic device. The second electronic device includes an encapsulant and a patterned conductive layer. The encapsulant has a first surface facing the first RDL of the first electronic device, and a second surface opposite to the first surface. The patterned conductive layer is disposed at the second surface of the encapsulant, and is configured to be electrically coupled to the circuit layer of the first RDL of the first electronic device.

Abstract: A wiring structure includes a redistribution layer and an electrical pad. The redistribution layer includes a passivation layer and a metal layer. The metal layer is embedded in the passivation layer, and the passivation layer defines an opening to expose a portion of the metal layer. The electrical pad is disposed in the opening of the passivation layer and on the metal layer. The electrical pad includes a seed layer, a conductive layer, a barrier layer and an anti-oxidation layer.

Abstract: A method of supplying electric power to a computer system compliant with specification provided by the OCP is provided. The method includes: a PLU setting an OCP_V3_EN signal to a high level so as to make the computer system operate in a first mode; a BMC obtaining card data from an OCP card when the computer system operates in the first mode; the BMC determining whether standby power provided by a PSU in the first mode is sufficient according to the card data; and when it is determined that the standby power is not sufficient, the BMC controlling the PLU to make the computer system operate in a second mode requiring more electric power, and to then control the PSU to provide main power that is greater than the standby power to the OCP card.

Abstract: A semiconductor device package includes a first electronic device and a second electronic device. The first electronic device includes a first redistribution layer (RDL) including a circuit layer. The second electronic device is disposed on the first RDL of the first electronic device. The second electronic device includes an encapsulant and a patterned conductive layer. The encapsulant has a first surface facing the first RDL of the first electronic device, and a second surface opposite to the first surface. The patterned conductive layer is disposed at the second surface of the encapsulant, and is configured to be electrically coupled to the circuit layer of the first RDL of the first electronic device.

Abstract: A wiring structure includes a redistribution layer and an electrical pad. The redistribution layer includes a passivation layer and a metal layer. The metal layer is embedded in the passivation layer, and the passivation layer defines an opening to expose a portion of the metal layer. The electrical pad is disposed in the opening of the passivation layer and on the metal layer. The electrical pad includes a seed layer, a conductive layer, a barrier layer and an anti-oxidation layer.

Abstract: A semiconductor device package includes a first electronic device and a second electronic device. The first electronic device includes a first redistribution layer (RDL) including a circuit layer. The second electronic device is disposed on the first RDL of the first electronic device. The second electronic device includes an encapsulant and a patterned conductive layer. The encapsulant has a first surface facing the first RDL of the first electronic device, and a second surface opposite to the first surface. The patterned conductive layer is disposed at the second surface of the encapsulant, and is configured to be electrically coupled to the circuit layer of the first RDL of the first electronic device.

Abstract: A wiring structure includes a redistribution layer and an electrical pad. The redistribution layer includes a passivation layer and a metal layer. The metal layer is embedded in the passivation layer, and the passivation layer defines an opening to expose a portion of the metal layer. The electrical pad is disposed in the opening of the passivation layer and on the metal layer. The electrical pad includes a seed layer, a conductive layer, a barrier layer and an anti-oxidation layer.

Abstract: A semiconductor device includes a first semiconductor die, a second semiconductor die, a dielectric layer, a first redistribution layer and a second redistribution layer. The first semiconductor die includes a first bonding pad and a second bonding pad. The second semiconductor die includes a third bonding pad and a fourth bonding pad. The dielectric layer covers the first semiconductor die and the second semiconductor die, and defines a first opening exposing the first bonding pad and the second bonding pad and a second opening exposing the third bonding pad and the fourth bonding pad. The first redistribution layer is disposed on the dielectric layer, and electrically connects the first bonding pad and the third bonding pad. The second redistribution layer is disposed on the dielectric layer, and electrically connects the second bonding pad and the fourth bonding pad.

Abstract: A wiring structure includes a redistribution layer and an electrical pad. The redistribution layer includes a passivation layer and a metal layer. The metal layer is embedded in the passivation layer, and the passivation layer defines an opening to expose a portion of the metal layer. The electrical pad is disposed in the opening of the passivation layer and on the metal layer. The electrical pad includes a seed layer, a conductive layer, a barrier layer and an anti-oxidation layer.

Abstract: A semiconductor device includes a first die, a second die, an encapsulant, a first dielectric layer, and at least one first trace. The first die includes a first surface and a second surface opposite to the first surface and includes at least one first pad disposed adjacent to the first surface of the first die. The second die includes a first surface and a second surface opposite to the first surface and includes at least one second pad disposed adjacent to the first surface of the second die. The first dielectric layer is disposed on at least a portion of the first surface of the first die and at least a portion of the first surface of the second die. The first trace is disposed on the first dielectric layer, which connects the first pad to the second pad, and the first trace comprises an end portion disposed adjacent to the first pad and a body portion, and the end portion extends at an angle ?1 relative to a direction of extension of the body portion.

Abstract: A modular product display system comprising a first horizontal shelf having opposing ends; two or more display panels disposed on a top surface of said first horizontal shelf; one or more side walls, each having a height and supporting each opposing end of said shelf; wherein said display panels are modular and each comprise a rear panel perpendicularly disposed to a bottom panel suitable for product placement.

Abstract: A modular shelf system comprising: at least one shelf board defined between a first side end, a second side end, a front end, and a rear end, and having an upwardly facing surface and a downwardly facing surface, and having a space to display products on the upwardly facing surface; and at least one middle side wall which is configured to divide the space to display products between the first and second side end of the shelf board, wherein the middle side wall has at least one slit which is configured to accept the shelf board, and wherein the middle wall is configured to move laterally while accepting the shelf board through the slit.

Abstract: The present invention disclosed a first multi-die package structure for semiconductor devices, the structure comprises a substrate having die receiving window and inter-connecting through holes formed therein; a first level semiconductor die formed under a second level semiconductor die by back-to-back scheme and within the die receiving window, wherein the first multi-die package includes first level contact pads formed under the first level semiconductor die having a first level build up layer formed there-under to couple to a first bonding pads of the first level semiconductor die; a second level contact pads formed on the second level semiconductor die having a second level build up layer formed thereon to couple to second bonding pads of the second level semiconductor die; and conductive bumps formed under the first level build up layer.

Abstract: A method for removing residual flux applied to a wafer process is disclosed by the present invention, the method comprises the steps of: providing a wafer; forming a plurality of bumps on the surface of the wafer; coating flux on the surfaces of the bumps; reflowing the bumps; immersing the wafer in a cleaning solvent; cleaning the wafer by a plasma descum cleaning; rinsing the wafer; and drying the wafer.

Abstract: A chip structure comprising a substrate, a circuitry unit, a plurality of bonding pads, a first passivation layer and a redistribution layer is provided. The circuitry unit is disposed on the substrate, and the bonding pads are disposed on the circuitry unit. Moreover, the first passivation layer is disposed on the circuitry unit and exposes the bonding pads. The redistribution layer of a Ti/Cu/Ti multi-layered structure is disposed on the first passivation layer, and is electrically connected with the bonding pads. In addition, the redistribution layer of a Ti/Cu/Ti multi-layered structure has excellent conductivity such that electrical characteristics of the chip structure are enhanced effectively.

Abstract: A chip structure and the manufacturing process thereof are provided. The feature of the present application is that the chip structure has a first passivation layer covering a substrate of the chip and exposing each of bonding pads and a portion of the substrate surface, and a second passivation layer covering the sidewalls of the first passivation layer and the portion of substrate surface exposed by the first passivation layer, to prevent moisture infiltration from the edge of the substrate. Therefore, the reliability of the chip structure is enhanced.