Patents by Inventor Chia-Chen Wu
Chia-Chen Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190318933Abstract: A method for fabricating semiconductor device includes the steps of: forming a titanium nitride (TiN) layer on a silicon layer; performing a first treatment process by reacting the TiN layer with dichlorosilane (DCS) to form a titanium silicon nitride (TiSiN) layer; forming a conductive layer on the TiSiN layer; and patterning the conductive layer, the metal silicon nitride layer, and the silicon layer to form a gate structure.Type: ApplicationFiled: May 22, 2018Publication date: October 17, 2019Inventors: Tzu-Hao Liu, Yi-Wei Chen, Tsun-Min Cheng, Kai-Jiun Chang, Chia-Chen Wu, Yi-An Huang, Po-Chih Wu, Pin-Hong Chen, Chun-Chieh Chiu, Tzu-Chieh Chen, Chih-Chien Liu, Chih-Chieh Tsai, Ji-Min Lin
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Publication number: 20190184920Abstract: A vehicle battery device comprises a box for receiving therein at least a vehicle battery, wherein a fastening platform is disposed on an inner sidewall surface of the box, and support boards is disposed at a bottom of the fastening platform; an upper lid disposed above the box and separated from the box by a waterproof plastic sheet; and at least a quick-release unit comprising a screw, washer, spring, fixing board, and wedge-shaped fixing block, with the at least a quick-release unit fastened between the fastening platform and the vehicle battery, wherein a wedge-shaped recess is disposed on an upper surface of the vehicle battery, and a wedge-shaped fastening hole is disposed in the fixing board, allowing the wedge-shaped fixing block to penetrate the wedge-shaped fastening hole and engage with the wedge-shaped recess, thereby allowing the vehicle battery to be fixed in place inside the box.Type: ApplicationFiled: December 14, 2017Publication date: June 20, 2019Inventors: Jing-Hong Chen, Wei-Yuan Liao, Yu-Hung Chen, Ching-Hsiang Wang, Chia-Chen Wu
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Publication number: 20190190100Abstract: A heat dissipation device for a vehicle battery includes a box for receiving therein at least a vehicle battery; an upper lid disposed above the box and separated from the box by a waterproof plastic sheet; a microspray heat dissipation pipe disposed on a side of the box and having at least a microspray nozzle in communication with an inside of the box; and at least a non-return exhaust duct disposed on an opposing side of the box and in communication with the inside of the box.Type: ApplicationFiled: December 14, 2017Publication date: June 20, 2019Inventors: JING-HONG CHEN, WEI-YUAN LIAO, YU-HUNG CHEN, CHING-HSIANG WANG, CHIA-CHEN WU
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Patent number: 10312242Abstract: A semiconductor memory device is provided, and which includes a substrate, plural gates, plural plugs, a capacitor structure and a conducting cap layer. The gates are disposed within the substrate, and the plugs are disposed on the substrate, with each plug electrically connected to two sides of each gate on the substrate. The capacitor structure is disposed on the substrate, and the capacitor structure includes plural capacitors, with each capacitor electrically connected to the plugs respectively. The conducting cap layer covers the top surface and sidewalls of the capacitor structure. Also, the semiconductor memory device further includes an adhesion layer and an insulating layer. The adhesion layer covers the conducting cap layer and the capacitor structure, and the insulating layer covers the adhesion layer.Type: GrantFiled: May 22, 2018Date of Patent: June 4, 2019Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.Inventors: Tzu-Chieh Chen, Pin-Hong Chen, Chih-Chieh Tsai, Chia-Chen Wu, Yi-An Huang, Kai-Jiun Chang, Tsun-Min Cheng, Yi-Wei Chen
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Patent number: 10276389Abstract: A method for fabricating semiconductor device includes the steps of: forming a silicon layer on a substrate; forming a first metal silicon nitride layer on the silicon layer; performing an oxygen treatment process to form an oxide layer on the first metal silicon nitride layer; forming a second metal silicon nitride layer on the oxide layer; forming a conductive layer on the second metal silicon nitride layer; and patterning the conductive layer, the second metal silicon nitride layer, the oxide layer, the first metal silicon nitride layer, and the silicon layer to form a gate structure.Type: GrantFiled: May 23, 2018Date of Patent: April 30, 2019Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.Inventors: Chih-Chieh Tsai, Yi-Wei Chen, Pin-Hong Chen, Chih-Chien Liu, Tzu-Chieh Chen, Chun-Chieh Chiu, Tsun-Min Cheng, Kai-Jiun Chang, Chia-Chen Wu, Yi-An Huang
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Publication number: 20190067296Abstract: A method for fabricating buried word line of a dynamic random access memory (DRAM) includes the steps of: forming a trench in a substrate; forming a first conductive layer in the trench; forming a second conductive layer on the first conductive layer, in which the second conductive layer above the substrate and the second conductive layer below the substrate comprise different thickness; and forming a third conductive layer on the second conductive layer to fill the trench.Type: ApplicationFiled: September 22, 2017Publication date: February 28, 2019Inventors: Pin-Hong Chen, Yi-Wei Chen, Tzu-Chieh Chen, Chih-Chieh Tsai, Chia-Chen Wu, Kai-Jiun Chang, Yi-An Huang, Tsun-Min Cheng
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Patent number: 10211211Abstract: A method for fabricating a buried word line (BWL) of a dynamic random access memory (DRAM) includes the steps of: forming a trench in a substrate; forming a barrier layer in the trench; performing a soaking process to reduce chlorine concentration in the barrier layer; and forming a conductive layer to fill the trench.Type: GrantFiled: December 4, 2017Date of Patent: February 19, 2019Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.Inventors: Kai-Jiun Chang, Yi-Wei Chen, Tsun-Min Cheng, Chia-Chen Wu, Pin-Hong Chen, Chih-Chieh Tsai, Tzu-Chieh Chen, Yi-An Huang
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Publication number: 20190027479Abstract: A method of fabricating a cobalt silicide layer includes providing a substrate disposed in a chamber. A deposition process is performed to form a cobalt layer covering the substrate. The deposition process is performed when the temperature of the substrate is between 50° C. and 100° C., and the temperature of the chamber is between 300° C. and 350° C. After the deposition process, an annealing process is performed to transform the cobalt layer into a cobalt silicide layer. The annealing process is performed when the substrate is between 300° C. and 350° C., and the duration of the annealing process is between 50 seconds and 60 seconds.Type: ApplicationFiled: May 29, 2018Publication date: January 24, 2019Inventors: Chia-Chen Wu, Yi-Wei Chen, Chi-Mao Hsu, Kai-Jiun Chang, Chih-Chieh Tsai, Pin-Hong Chen, Tsun-Min Cheng, Yi-An Huang
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Publication number: 20190013320Abstract: A semiconductor memory device is provided, and which includes a substrate, plural gates, plural plugs, a capacitor structure and a conducting cap layer. The gates are disposed within the substrate, and the plugs are disposed on the substrate, with each plug electrically connected to two sides of each gate on the substrate. The capacitor structure is disposed on the substrate, and the capacitor structure includes plural capacitors, with each capacitor electrically connected to the plugs respectively. The conducting cap layer covers the top surface and sidewalls of the capacitor structure. Also, the semiconductor memory device further includes an adhesion layer and an insulating layer. The adhesion layer covers the conducting cap layer and the capacitor structure, and the insulating layer covers the adhesion layer.Type: ApplicationFiled: May 22, 2018Publication date: January 10, 2019Inventors: Tzu-Chieh Chen, Pin-Hong Chen, Chih-Chieh Tsai, Chia-Chen Wu, Yi-An Huang, Kai-Jiun Chang, Tsun-Min Cheng, Yi-Wei Chen
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Publication number: 20180350673Abstract: A method of forming a semiconductor structure includes providing a material layer having a recess formed therein. A first tungsten metal layer is formed at a first temperature and fills the recess. An anneal process at a second temperature is then performed, wherein the second temperature is higher than the first temperature.Type: ApplicationFiled: March 21, 2018Publication date: December 6, 2018Inventors: Pin-Hong Chen, Chih-Chieh Tsai, Tzu-Chieh Chen, Kai-Jiun Chang, Chia-Chen Wu, Yi-An Huang, Tsun-Min Cheng, Yi-Wei Chen, Wei-Hsin Liu
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Publication number: 20180301458Abstract: The present invention provides a storage node contact structure of a memory device comprising a substrate having a dielectric layer comprising a recess, a first tungsten metal layer, and an adhesive layer on the first tungsten metal layer and a second tungsten metal layer on the adhesive layer, wherein the second tungsten metal layer is formed by a physical vapor deposition (PVD).Type: ApplicationFiled: March 15, 2018Publication date: October 18, 2018Inventors: Pin-Hong Chen, Tsun-Min Cheng, Chih-Chieh Tsai, Tzu-Chieh Chen, Kai-Jiun Chang, Chia-Chen Wu, Yi-An Huang, Yi-Wei Chen, Hsin-Fu Huang, Chi-Mao Hsu, Li-Wei Feng, Ying-Chiao Wang, Chung-Yen Feng
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Publication number: 20180190662Abstract: A method of forming a bit line gate structure of a dynamic random access memory (DRAM) includes the following. A hard mask layer is formed on a metal stack by a chemical vapor deposition process importing nitrogen (N2) gases and then importing amonia (NH3) gases. The present invention also provides a bit line gate structure of a dynamic random access memory (DRAM) including a metal stack and a hard mask. The metal stack includes a polysilicon layer, a titanium layer, a titanium nitride layer, a first tungsten nitride layer, a tungsten layer and a second tungsten nitride layer stacked from bottom to top. The hard mask is disposed on the metal stack.Type: ApplicationFiled: December 27, 2017Publication date: July 5, 2018Inventors: Tzu-Chin Wu, Wei-Hsin Liu, Yi-Wei Chen, Mei-Ling Chen, Chia-Lung Chang, Ching-Hsiang Chang, Jui-Min Lee, Tsun-Min Cheng, Lin-Chen Lu, Shih-Fang Tzou, Kai-Jiun Chang, Chih-Chieh Tsai, Tzu-Chieh Chen, Chia-Chen Wu
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Patent number: 9953982Abstract: A method for fabricating semiconductor device includes the steps of: forming a shallow trench isolation (STI) in a substrate; removing part of the STI to form a first trench; forming a cap layer in the first trench; forming a mask layer on the cap layer and the substrate; and removing part of the mask layer, part of the cap layer, and part of the STI to form a second trench.Type: GrantFiled: March 23, 2017Date of Patent: April 24, 2018Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.Inventors: Pin-Hong Chen, Tsun-Min Cheng, Chih-Chieh Tsai, Tzu-Chieh Chen, Kai-Jiun Chang, Chia-Chen Wu, Yi-An Huang, Yi-Wei Chen
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Patent number: 9859123Abstract: A method for fabricating a semiconductor device is disclosed. A substrate having a conductive region is provided. A metal layer is deposited on the conductive region. The metal layer reacts with the conductive region to form a first metal silicide layer. A TiN layer is deposited on the metal layer. A SiN layer is deposited on the TiN layer. An annealing process is performed to convert the first metal silicide layer into a second metal silicide layer.Type: GrantFiled: March 29, 2017Date of Patent: January 2, 2018Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.Inventors: Chia-Chen Wu, Pin-Hong Chen, Kai-Jiun Chang, Yi-An Huang, Chih-Chieh Tsai, Tzu-Chieh Chen, Tsun-Min Cheng, Yi-Wei Chen
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Patent number: 9367152Abstract: An interactive projection system includes an electronic device, a projection device and an interactive module. The projection device is connected with the electronic device for receiving a first image signal generated by the electronic device and accordingly projecting a first image. The interactive module includes a processing unit, a storage unit connected with the processing unit for storing a calibration data, an image capture unit connected with the processing unit for capturing the first image and a light point image, and a communication unit connected with the electronic device and the processing unit for transmitting an absolute coordinate information computed and generated by the processing unit according to the light point image and the calibration data to the electronic device. An output signal is generated by the electronic device with the absolute coordinate information. Therefore, the present invention avoids the repeating image calibration and reduces labor cost and time cost.Type: GrantFiled: August 23, 2013Date of Patent: June 14, 2016Assignee: DELTA ELECTRONICS, INC.Inventors: Cho-Cheng Lin, Chin-Tang Cho, Chia-Chen Wu, Wen-Chi Lin, Chih-Chieh Lin
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Publication number: 20160002272Abstract: The present invention relates generally to a surface functionalized porous containing material and method of making thereof.Type: ApplicationFiled: February 25, 2014Publication date: January 7, 2016Applicants: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, SPINNAKER BIOSCIENCES, INC.Inventors: Chia-Chen WU, Michael J. SAILOR, Michelle Y. CHEN
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Publication number: 20140354546Abstract: An interactive projection system includes an electronic device, a projection device and an interactive module. The projection device is connected with the electronic device for receiving a first image signal generated by the electronic device and accordingly projecting a first image. The interactive module includes a processing unit, a storage unit connected with the processing unit for storing a calibration data, an image capture unit connected with the processing unit for capturing the first image and a light point image, and a communication unit connected with the electronic device and the processing unit for transmitting an absolute coordinate information computed and generated by the processing unit according to the light point image and the calibration data to the electronic device. An output signal is generated by the electronic device with the absolute coordinate information. Therefore, the present invention avoids the repeating image calibration and reduces labor cost and time cost.Type: ApplicationFiled: August 23, 2013Publication date: December 4, 2014Applicant: DELTA ELECTRONICS, INC.Inventors: Cho-Cheng Lin, Chin-Tang Cho, Chia-Chen Wu, Wen-Chi Lin, Chih-Chieh Lin
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Publication number: 20110307823Abstract: An electronic book includes a display, a first area displaying module, a second area displaying module, a processing module, and a browsing module. The display includes a first displaying area and a second displaying area. The first area displaying module is configured to control a list of applications to be displayed on the first displaying area. The processing module is configured to find associated information associated with an application selected by a user from the list of applications. The second area displaying module is configured to control the associated information to be displayed on the second displaying area.Type: ApplicationFiled: December 9, 2010Publication date: December 15, 2011Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: CHIA-CHEN WU
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Publication number: 20110298821Abstract: A method of displaying images on an electronic device includes the following blocks. A first image is displayed on a display. The first image has a first edge and a second edge opposite to the first edge. A second image is decoded and loaded to a virtual position behind the first image. The first image is divided into a plurality of rectangular areas. The first image is cropped in the plurality of rectangular areas in sequence along a direction from the first edge to the second edge. Each of the plurality of rectangular areas fades to transparency. The second image is shown on the display.Type: ApplicationFiled: November 16, 2010Publication date: December 8, 2011Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: TENG-YU TSAI, CHIA-HUNG CHIEN, LIANG-MAO HUNG, CHIA-CHEN WU, CHI-FAN HO
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Patent number: 7041918Abstract: The present invention is to provide a power outlet comprising two elastic pieces being formed at the rears of two insertion holes of the outlet panel, wherein one end of each elastic piece, including a fastening hole corresponding with the insertion holes, is disposed on a fastening board connected with the outlet panel and the other end of each elastic piece facing a base of a chassis of the power outlet is connected with one end of an elastic element. The other end of the elastic element is connected with the base of the chassis. In addition, a switch comprising a spring is connected between the fastening board and the base of the chassis, when the panel being compressed towards the inside of the chassis, the switch can be locked in position, enabling a user to safely and easily operate the electricity power outlet.Type: GrantFiled: May 10, 2005Date of Patent: May 9, 2006Inventor: Chia-Chen Wu