Patents by Inventor Chia-En Lee

Chia-En Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140312368
    Abstract: A manufacturing method of a LED display is provided. A temporary substrate is provided, wherein the temporary substrate has a first adhesive layer and a plurality of first, second and third LED chips mounted on the first adhesive layer. A first transparent substrate is provided, the transparent substrate has a plurality of pixels disposed thereon, and each of the pixels comprises a first sub-pixel, a second sub-pixel and a third sub-pixel respectively surrounded by a light-insulating structure. Then, the temporary substrate and the first transparent substrate are bonded together, such that each of the first, second and third LED chips is correspondingly mounted in each of the first sub-pixels, the second sub-pixels and the third sub-pixels. After that, the temporary substrate is removed. A LED display manufactured by said method is also provided.
    Type: Application
    Filed: March 19, 2014
    Publication date: October 23, 2014
    Applicant: Lextar Electronics Corporation
    Inventors: Chia-En Lee, Chia-Hung Hou
  • Publication number: 20140312379
    Abstract: A light-emitting diode (LED) with a bump structure on a sidewall is provided. The LED comprises a substrate, an epitaxial structure, a first conductive bump, a second conductive bump, a first extended electrode and a second extended electrode. The substrate has a top surface, a first side surface and an inclined surface between the top surface and the first side surface. The epitaxial structure is disposed on the top surface of the substrate, and comprises a N-type semiconductor layer, a light-emitting layer, a P-type semiconductor layer, a transparent conductive layer, a P-electrode and a N-electrode. The first extended electrode and the second extended electrode connect the P-electrode and the N-electrode, extend through the inclined surface, and are electrically connected to the first and the second conductive bumps, respectively. A mounting structure comprises said LED, a sub-mount and a connector mounting the LED onto the sub-mount.
    Type: Application
    Filed: April 9, 2014
    Publication date: October 23, 2014
    Applicant: LEXTAR ELECTRONICS CORPORATION
    Inventors: Chia-En LEE, Cheng-Hung CHEN, Li-Chuan LIN
  • Patent number: 8859311
    Abstract: A flip-chip light-emitting diode structure comprises a carrier substrate, a light-emitting die structure, a reflective layer, an aperture, a dielectric layer, a first contact layer and a second contact layer. The light-emitting die structure, located on the carrier substrate, comprises a first type semiconductor layer, a second type semiconductor layer and a light emitting layer. The light emitting layer is formed between the first type and the second type semiconductor layer. The reflective layer is located on the first type semiconductor layer. The aperture penetrates the light-emitting die structure. The dielectric layer covers an inner sidewall of the aperture and extends to a portion of a surface of the reflective layer. The first contact layer is disposed on the part of the reflective layer not covered by the dielectric layer. The second contact layer fills up the aperture and is electrically connected to the second type semiconductor layer.
    Type: Grant
    Filed: August 13, 2013
    Date of Patent: October 14, 2014
    Assignee: Lextar Electronics Corporation
    Inventors: Chia-En Lee, Yan-Hao Chen
  • Publication number: 20140231858
    Abstract: A LED sub-mount includes a substrate body and a plurality of first electrical-conductive layers. The substrate body has a first surface. The first electrical-conductive layers are positioned on the first surface of the substrate body, wherein the first surface between every adjacent two of the first electrical-conductive layers has an adhesive-filling groove.
    Type: Application
    Filed: February 7, 2014
    Publication date: August 21, 2014
    Applicant: Lextar Electronics Corporation
    Inventors: Chia-En Lee, Cheng-Ta Kuo, Der-Ling Hsia
  • Publication number: 20140186981
    Abstract: A fabrication method of a light-emitting diode including forming an epitaxial layer on a first substrate; forming a metal pad and a stress release ring on the epitaxial layer, wherein the stress release ring surrounds the metal pad; performing a substrate replacement process to transfer the epitaxial layer, the metal pad, and the stress release ring onto a second substrate, wherein the metal pad and the stress release ring are disposed between the epitaxial layer and the second substrate; patterning the epitaxial layer to expose a portion of the stress release ring; and removing the stress release ring to suspend a portion of the epitaxial layer. Moreover, a light emitting diode is provided.
    Type: Application
    Filed: March 5, 2014
    Publication date: July 3, 2014
    Applicant: LEXTAR ELECTRONICS CORP.
    Inventor: Chia-En LEE
  • Publication number: 20140061700
    Abstract: A flip-chip light-emitting diode structure comprises a carrier substrate, a light-emitting die structure, a reflective layer, an aperture, a dielectric layer, a first contact layer and a second contact layer. The light-emitting die structure, located on the carrier substrate, comprises a first type semiconductor layer, a second type semiconductor layer and a light emitting layer. The light emitting layer is formed between the first type and the second type semiconductor layer. The reflective layer is located on the first type semiconductor layer. The aperture penetrates the light-emitting die structure. The dielectric layer covers an inner sidewall of the aperture and extends to a portion of a surface of the reflective layer. The first contact layer is disposed on the part of the reflective layer not covered by the dielectric layer. The second contact layer fills up the aperture and is electrically connected to the second type semiconductor layer.
    Type: Application
    Filed: August 13, 2013
    Publication date: March 6, 2014
    Applicant: Lextar Electronics Corporation
    Inventors: Chia-En Lee, Yan-Hao Chen
  • Patent number: 8445327
    Abstract: A wafer-level packaging process of a light-emitting diode is provided. First, a semiconductor stacked layer is formed on a growth substrate. A plurality of barrier patterns and a plurality of reflective layers are then formed on the semiconductor stacked layer, wherein each reflective layer is surrounded by one of the barrier patterns. A first bonding layer is then formed on the semiconductor stacked layer to cover the barrier patterns and the reflective layers. Thereafter, a carrying substrate having a plurality of second bonding layers and a plurality of conductive plugs electrically insulated from each other is provided, and the first bonding layer is bonded with the second bonding layer. The semiconductor stacked layer is then separated from the growth substrate. Next, the semiconductor stacked layer is patterned to form a plurality of semiconductor stacked patterns. Next, each semiconductor stacked pattern is electrically connected to the conductive plug.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: May 21, 2013
    Assignee: Lextar Electronics Corp.
    Inventors: Chia-En Lee, Cheng-Ta Kuo, Der-Ling Hsia
  • Patent number: 8415683
    Abstract: The present invention provides a manufacturing method of an LED chip. First, a device layer is formed on a growth substrate, wherein the device layer has a first surface connected to the growth substrate and a second surface. Next, a plurality of first trenches are formed on the second surface of the device layer. Then, a protection layer is formed on the side walls of the first trenches. After that, the second surface is bonded with a supporting substrate and the device layer is then separated from the growth substrate. Further, a plurality of second trenches corresponding to the first trenches are formed in the device layer to form a plurality of LEDs, wherein the second trenches extend from the first surface to the bottom portions of the first trenches. Furthermore, a plurality of electrodes are formed on the first surface of the device layer.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: April 9, 2013
    Assignee: Lextar Electronics Corp.
    Inventors: Chia-En Lee, Cheng-Ta Kuo, Der-Ling Hsia
  • Patent number: 8362511
    Abstract: A semiconductor light emitting structure including a substrate, a second type electrode layer, a reflecting layer, an insulating layer, a first type electrode layer, a first type semiconductor layer, an active layer and a second type semiconductor layer is provided. The second type electrode layer formed on the substrate has a current spreading grating formed by several conductive pillars and conductive walls, which are staggered and connected to each other. The reflecting layer and the insulating layer are formed on the second type electrode layer in sequence, and cover each conductive pillar and each conductive wall. The first type electrode layer, the first type semiconductor layer and the active layer are formed on the insulating layer in sequence. The second type semiconductor layer is formed on the active layer, and covers each conductive pillar and each conductive wall.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: January 29, 2013
    Assignee: Lextar Electronics Corporation
    Inventors: Kuo-Lung Fang, Chia-En Lee, Chao-Chen Ye
  • Publication number: 20120286307
    Abstract: A semiconductor light emitting structure including a substrate, a second type electrode layer, a reflecting layer, an insulating layer, a first type electrode layer, a first type semiconductor layer, an active layer and a second type semiconductor layer is provided. The second type electrode layer formed on the substrate has a current spreading grating formed by several conductive pillars and conductive walls, which are staggered and connected to each other. The reflecting layer and the insulating layer are formed on the second type electrode layer in sequence, and cover each conductive pillar and each conductive wall. The first type electrode layer, the first type semiconductor layer and the active layer are formed on the insulating layer in sequence. The second type semiconductor layer is formed on the active layer, and covers each conductive pillar and each conductive wall.
    Type: Application
    Filed: September 2, 2011
    Publication date: November 15, 2012
    Applicant: LEXTAR ELECTRONICS CORPORATION
    Inventors: Kuo-Lung Fang, Chia-En Lee, Chao-Chen Ye
  • Patent number: 8278681
    Abstract: A wafer-level packaging process of a light-emitting diode is provided. First, a semiconductor stacked layer is formed on a growth substrate. A plurality of barrier patterns and a plurality of reflective layers are then formed on the semiconductor stacked layer, wherein each reflective layer is surrounded by one of the barrier patterns. A first bonding layer is then formed on the semiconductor stacked layer to cover the barrier patterns and the reflective layers. Thereafter, a carrying substrate having a plurality of second bonding layers and a plurality of conductive plugs electrically insulated from each other is provided, and the first bonding layer is bonded with the second bonding layer. The semiconductor stacked layer is then separated from the growth substrate. Next, the semiconductor stacked layer is patterned to form a plurality of semiconductor stacked patterns. Next, each semiconductor stacked pattern is electrically connected to the conductive plug.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: October 2, 2012
    Assignee: Lextar Electronics Corp.
    Inventors: Chia-En Lee, Cheng-Ta Kuo, Der-Ling Hsia
  • Publication number: 20120193663
    Abstract: A fabrication method of a light-emitting diode including forming an epitaxial layer on a first substrate; forming a metal pad and a stress release ring on the epitaxial layer, wherein the stress release ring surrounds the metal pad; performing a substrate replacement process to transfer the epitaxial layer, the metal pad, and the stress release ring onto a second substrate, wherein the metal pad and the stress release ring are disposed between the epitaxial layer and the second substrate; patterning the epitaxial layer to expose a portion of the stress release ring; and removing the stress release ring to suspend a portion of the epitaxial layer. Moreover, a light emitting diode is provided.
    Type: Application
    Filed: December 12, 2011
    Publication date: August 2, 2012
    Applicant: LEXTAR ELECTRONICS CORP.
    Inventor: Chia-En LEE
  • Patent number: 8225670
    Abstract: A device of testing a vibrating device includes a housing, a connector, an indicator, and a vibrating sensing apparatus. The connector, the indicator, and the vibrating sensing apparatus are mounted with the housing, and electronically connected in series. When the test device is vibrated by a portable electronic device received in the housing, the vibrating sensing apparatus forms a closed circuit with the connector and the indicator to activate the indicator to indicate whether the vibrating performance of the portable electronic device is normal or not.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: July 24, 2012
    Assignee: FIH (Hong Kong) Limited
    Inventor: Chia-En Lee
  • Publication number: 20120164768
    Abstract: A wafer-level packaging process of a light-emitting diode is provided. First, a semiconductor stacked layer is formed on a growth substrate. A plurality of barrier patterns and a plurality of reflective layers are then formed on the semiconductor stacked layer, wherein each reflective layer is surrounded by one of the barrier patterns. A first bonding layer is then formed on the semiconductor stacked layer to cover the barrier patterns and the reflective layers. Thereafter, a carrying substrate having a plurality of second bonding layers and a plurality of conductive plugs electrically insulated from each other is provided, and the first bonding layer is bonded with the second bonding layer. The semiconductor stacked layer is then separated from the growth substrate. Next, the semiconductor stacked layer is patterned to form a plurality of semiconductor stacked patterns. Next, each semiconductor stacked pattern is electrically connected to the conductive plug.
    Type: Application
    Filed: February 23, 2012
    Publication date: June 28, 2012
    Applicant: LEXTAR ELECTRONICS CORP.
    Inventors: Chia-En Lee, Cheng-Ta Kuo, Der-Ling Hsia
  • Patent number: 8070320
    Abstract: A laser illumination device including a body, a head secured to the body, a laser generator accommodated in the head, and a rotatable output adjustment member having a graduated disk and an adjustment disk. The graduated disk defines a circle of graduated sections, at least one of which is exposed out of the head. The adjustment disk includes a plurality of through holes with different sizes, arranged in a circle. The measuring member coupled with the graduated disk rotates relative to the body to align each one of the through holes with the laser generator, to adjust the amount of laser light passing through the one of the through holes.
    Type: Grant
    Filed: July 6, 2009
    Date of Patent: December 6, 2011
    Assignee: FIH (Hong Kong) Limited
    Inventor: Chia-En Lee
  • Patent number: 8020284
    Abstract: A production line used to assemble and test some electronic elements includes a first assembly line used to assemble some electronic elements requiring a relatively high requirements of cleanliness factor, a second assembly line used to assemble some electronic elements requiring a relatively low requirements of cleanliness factor, a first testing line used to do some testing items with a relatively high requirements of lightness, a second testing line used to do some testing items with a relatively low requirements of lightness, and a third testing line do some testing items requiring a relatively high requirements of cleanliness factor, the first assembly line, the second assembly line, the first testing line, the second testing line, and the third testing line are located adjacent to each other and connected together in series.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: September 20, 2011
    Assignee: FIH (Hong Kong) Limited
    Inventor: Chia-En Lee
  • Patent number: D668234
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: October 2, 2012
    Assignee: Lextar Electornics Corp.
    Inventors: Chia-En Lee, Te-Ling Hsia, Wen-Fei Fong
  • Patent number: D669869
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: October 30, 2012
    Assignee: Lextar Electronics Corp.
    Inventors: Chia-En Lee, Te-Ling Hsia, Wen-Fei Fong
  • Patent number: D680975
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: April 30, 2013
    Assignee: Lextar Electronics Corp.
    Inventors: Chia-En Lee, Te-Ling Hsia, Wen-Fei Fong
  • Patent number: D680976
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: April 30, 2013
    Assignee: Lextar Electronics Corp.
    Inventors: Chia-En Lee, Te-Ling Hsia, Wen-Fei Fong