Abstract: Die structures and methods of forming the same are described. In an embodiment, a device includes: a lower integrated circuit die; a first upper integrated circuit die face-to-face bonded to the lower integrated circuit die, the first upper integrated circuit die including a first semiconductor substrate and a first through-substrate via; a gap-fill dielectric around the first upper integrated circuit die, a top surface of the gap-fill dielectric being substantially coplanar with a top surface of the first semiconductor substrate and with a top surface of the first through-substrate via; and an interconnect structure including a first dielectric layer and first conductive vias, the first dielectric layer disposed on the top surface of the gap-fill dielectric and the top surface of the first semiconductor substrate, the first conductive vias extending through the first dielectric layer to contact the top surface of the first through-substrate via.

Abstract: In an embodiment, a device includes: a first integrated circuit die comprising a semiconductor substrate and a first through-substrate via; a gap-fill dielectric around the first integrated circuit die, a surface of the gap-fill dielectric being substantially coplanar with an inactive surface of the semiconductor substrate and with a surface of the first through-substrate via; a dielectric layer on the surface of the gap-fill dielectric and the inactive surface of the semiconductor substrate; a first bond pad extending through the dielectric layer to contact the surface of the first through-substrate via, a width of the first bond pad being less than a width of the first through-substrate via; and a second integrated circuit die comprising a die connector bonded to the first bond pad.

Abstract: Optical proximity correction (OPC) based computational lithography techniques are disclosed herein for enhancing lithography printability. An exemplary mask optimization method includes receiving an integrated circuit (IC) design layout having an IC pattern; generating target points for a contour corresponding with the IC pattern based on a target placement model, wherein the target placement model is selected based on a classification of the IC pattern; and performing an OPC on the IC pattern using the target points, thereby generating a modified IC design layout. The method can further include fabricating a mask based on the modified IC design layout. The OPC can select an OPC model based on the classification of the IC pattern. The OPC model can weight the target placement model.

Abstract: Optical proximity correction (OPC) based computational lithography techniques are disclosed herein for enhancing lithography printability. An exemplary mask optimization method includes receiving an integrated circuit (IC) design layout having an IC pattern; generating target points for a contour corresponding with the IC pattern based on a target placement model, wherein the target placement model is selected based on a classification of the IC pattern; and performing an OPC on the IC pattern using the target points, thereby generating a modified IC design layout. The method can further include fabricating a mask based on the modified IC design layout. The OPC can select an OPC model based on the classification of the IC pattern. The OPC model can weight the target placement model.

Abstract: Optical proximity correction (OPC) based computational lithography techniques are disclosed herein for enhancing lithography printability. An exemplary mask optimization method includes receiving an integrated circuit (IC) design layout having an IC pattern; generating target points for a contour corresponding with the IC pattern based on a target placement model, wherein the target placement model is selected based on a classification of the IC pattern; and performing an OPC on the IC pattern using the target points, thereby generating a modified IC design layout. The method can further include fabricating a mask based on the modified IC design layout. The OPC can select an OPC model based on the classification of the IC pattern. The OPC model can weight the target placement model.

Abstract: Optical proximity correction (OPC) based computational lithography techniques are disclosed herein for enhancing lithography printability. An exemplary mask optimization method includes receiving an integrated circuit (IC) design layout having an IC pattern; generating target points for a contour corresponding with the IC pattern based on a target placement model, wherein the target placement model is selected based on a classification of the IC pattern; and performing an OPC on the IC pattern using the target points, thereby generating a modified IC design layout. The method can further include fabricating a mask based on the modified IC design layout. The OPC can select an OPC model based on the classification of the IC pattern. The OPC model can weight the target placement model.

Abstract: The invention provides a portable electronic system. The portable electronic system includes a semiconductor package. The semiconductor package includes a substrate. A semiconductor die is coupled to the substrate. A thermoelectric device chip is disposed close to the semiconductor die, coupled to the substrate. The thermoelectric device chip is configured to detect a heat energy generated from the semiconductor die and to convert the heat energy into a recycled electrical energy. A power system is coupled to the semiconductor package, configured to store the recycled electrical energy.

Abstract: A method for controlling circuit modules within a chip is provided, wherein the circuit modules includes at least one processor and at least one network module, and the method includes: obtaining a plurality of temperature-related information of the circuit modules; and allocating power limits or throughput limits of the circuit modules according to the temperature-related information of the circuit modules, respectively.

Abstract: Aspects of the disclosure provide a method for call management. The method includes receiving a signal from one of a first transceiver and a second transceiver in an electronic device. The signal indicates an incoming call managed by a first service provider that the electronic device subscribes service from. The method further includes determining whether the other of the first transceiver and the second transceiver is operative in an active call managed by a second service provider that the electronic device subscribes service from, and rejecting the incoming call when the other transceiver is operative in the active call managed by the second service provider.

Abstract: Transmitting devices and transmission methods are provided. The transmitting device includes a touch panel, a touch link module, a processing module and a transceiver module. The touch link module establishes a touch link with a receiving device through the touch panel. The processing module determines an instruction according to the link duration of the transmitting device and the receiving device after the touch link has been established. The transceiver module transmits the instruction to the receiving device.

Abstract: The invention provides a thermal control method and a thermal control system. The thermal control method comprises: detecting a temperature variance of a component of the electronic device to generate a detecting result; and determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result. The thermal control system comprises: a detecting unit, for detecting a temperature variance of a component of the electronic device to generate a detecting result; and a determining unit, for determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result.

Abstract: The invention provides a portable electronic system. The portable electronic system includes a semiconductor package. The semiconductor package includes a substrate. A semiconductor die is coupled to the substrate. A thermoelectric device chip is disposed close to the semiconductor die, coupled to the substrate. The thermoelectric device chip is configured to detect a heat energy generated from the semiconductor die and to convert the heat energy into a recycled electrical energy. A power system is coupled to the semiconductor package, configured to store the recycled electrical energy.

Abstract: A method for controlling circuit modules within a chip is provided, wherein the circuit modules includes at least one processor and at least one network module, and the method includes: obtaining a plurality of temperature-related information of the circuit modules; and allocating power limits or throughput limits of the circuit modules according to the temperature-related information of the circuit modules, respectively.

Abstract: A method for managing media content casting among media casting devices supporting different media casting protocols for use in a device wirelessly connected to the media casting devices is provided. The method includes the following steps. A request indicating media content to be casted is first received. The media casting devices are scanned to determine a list of available devices for media content casting according to the predetermined preferences. The list of available devices is displayed on a display for selection. A first media casting protocol corresponding to a first selected media casting device is determined and the media content is transmitted to the first selected media casting device by the first media casting protocol.

Abstract: A thermal protection method includes: determining a thermal headroom based on a difference between a current temperature and a predetermined threshold temperature; determining a power budget based on the thermal headroom; and utilizing a processor-based system to employ a target computing power setting according to at least the power budget, wherein selection of the target computing power setting is constrained by the power budget to ensure that the target computing power setting does not make the current temperature exceed the predetermined threshold temperature when employed by the processor-based system.

Abstract: A touch communication connection establishing method, for establishing a touch communication between a first touch panel device (500) with a first touch panel (501) and a second touch panel device (900) with a second touch panel (901). The touch communication connection establishing method comprises: sensing at least one control action, wherein the control action comprises at least one touch communication related action, and/or determining if an arrangement of the control action meets a predetermined rule to generate a determining result; and establishing the touch communication connection between the first touch panel device (500) and the second touch panel device (900) based on the determining result.

Abstract: The invention provides a thermal control method and a thermal control system. The thermal control method comprises: detecting a temperature variance of a component of the electronic device to generate a detecting result; and determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result. The thermal control system comprises: a detecting unit, for detecting a temperature variance of a component of the electronic device to generate a detecting result; and a determining unit, for determining a temperature threshold value for the integrated circuit as a throttling point according to the detecting result.

Abstract: Transmitting devices and transmission methods are provided. The transmitting device includes a touch panel, a touch link module, a processing module and a transceiver module. The touch link module establishes a touch link with a receiving device through the touch panel. The processing module determines an instruction according to the link duration of the transmitting device and the receiving device after the touch link has been established. The transceiver module transmits the instruction to the receiving device.

Abstract: The present invention provide a heat dissipation structure on the active surface of the die to increase the performance of the heat conduction in longitude direction of the semiconductor package device, so that the heat dissipating performance can be improved when the semiconductor package device is associated with the exterior heat dissipation mechanism.

Abstract: The present invention provide a heat dissipation structure on the active surface of the die to increase the performance of the heat conduction in longitude direction of the semiconductor package device, so that the heat dissipating performance can be improved when the semiconductor package device is associated with the exterior heat dissipation mechanism.