Abstract: An electronic device includes a substrate, a driving element, a first insulating layer, a pixel electrode layer, and a common electrode layer. The driving element is disposed on the substrate. The first insulating layer is disposed on the driving element. The pixel electrode layer is disposed on the first insulating layer. The first insulating layer comprises a hole, and the pixel electrode layer is electrically connected to the driving element through the hole. The common electrode layer is disposed on the pixel electrode layer. The common electrode layer comprises a slit, and the slit has an edge, and the edge is disposed in the hole.

Abstract: An electronic device includes a substrate and transistors disposed on the substrate. At least one of the transistors includes a semiconductor layer, a gate insulating layer, a gate electrode, a first electrode, and a second electrode. The gate insulating layer includes first contact holes and second contact holes. The gate electrode is disposed on the gate insulating layer. The first electrode is disposed on the gate electrode, has a first side away from the gate electrode, and contacts the semiconductor layer through the first contact holes. The second electrode is disposed on the gate electrode, has a second side away from the gate electrode, and contacts the semiconductor layer through the second contact holes. The first contact holes have first edges away from the gate electrode. A minimum distance between the first side and the gate electrode is less than a minimum distance between the first edge of one of the first contact holes and the gate electrode.

Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.

Abstract: Embodiments of the present disclosure relates to a method for forming a semiconductor device structure. The method includes including forming one or more conductive features in a first interlayer dielectric (ILD), forming an etch stop layer on the first ILD, forming a second ILD over the etch stop layer, forming one or more openings through the second ILD and the etch stop layer to expose a top surface of the one or more first conductive features, wherein the one or more openings are formed by a first etch process in a first process chamber, exposing the one or more openings to a second etch process in a second process chamber so that the shape of the or more openings is elongated, and filling the one or more openings with a conductive material.

Abstract: A method for wireless communication performed by a user equipment (UE) is provided. The UE includes a plurality of antenna panels. The method includes transmitting, to a Base Station (BS), a UE capability message that includes a number of the plurality of antenna panels; and transmitting, to the BS, a panel report that includes information of the plurality of antenna panels, the information associated with at least one of a Synchronization Signal Block (SSB) and a Channel State Information Reference Signal (CSI-RS).

Abstract: A method performed by a UE for saving power is provided. The method includes: receiving, from a Base Station (BS), control information that includes a Physical Downlink Control Channel (PDCCH) monitoring adaptation field, wherein the PDCCH monitoring adaptation field indicates a PDCCH skipping function; and monitoring, regardless of the PDCCH skipping function indicated by the PDCCH monitoring adaptation field, a PDCCH in a case that a Scheduling Request (SR) is transmitted on a Physical Uplink Control Channel (PUCCH) and is determined to be pending.

Abstract: A display device includes a display panel. The display panel has a functional display area. The functional display area includes a plurality of display pixels and a plurality of light transmitting regions. The plurality of display pixels are around by the plurality of the light transmitting regions. A boundary between one of the plurality of display pixels and one of the plurality of light transmitting regions comprises an arc segment.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: An optical water-quality detection apparatus includes a detection device, a biofilm-inhibition light source, a detection light source and a sensor. The detection device includes a detection chamber. The biofilm-inhibition light source is disposed outside the detection chamber and configured to emit biofilm-inhibition light. The detection light source is disposed outside the detection chamber and configured to emit detection light. The sensor is configured to sense the detection light penetrating the detection chamber. A beam of the detection light and a beam of the inhibition light overlaps as penetrating the detection chamber.

Abstract: An electronic device includes a substrate, a driving element, a first transparent conductive layer, an insulating layer, and a second transparent conductive layer. The driving element is disposed on the substrate and includes a drain electrode having a first edge. The first transparent conductive layer is disposed on the driving element. The insulating layer is disposed between the driving element and the first transparent conductive layer and includes a hole through which the first transparent conductive layer is electrically connected to the driving element. The second transparent conductive layer is disposed on the insulating layer. One of the first and second transparent conductive layers includes at least one slit, and the first or second transparent conductive layer that includes the at least one slit has a second edge. The second edge is located in the hole, and the at least one slit exposes the first edge of the drain electrode.

Abstract: An electronic device is provided. The electronic device includes a substrate, a thin-film transistor, a first insulating layer, and a pixel electrode. The thin-film transistor is disposed on the substrate, and includes a semiconductor layer, a gate electrode, a source electrode and a drain electrode. The semiconductor layer includes a metal oxide. The first insulating layer is disposed on the thin-film transistor and has a first via hole. The pixel electrode is disposed on the first insulating layer, and is electrically connected to either the source electrode or the drain electrode through the first via hole. In addition, the first via hole at least partially overlaps the gate electrode in a normal direction of the substrate.

Abstract: An electronic device includes a first substrate, a drain, an organic layer, a pixel electrode, a second substrate, a common electrode layer and a spacer. The drain is disposed on the first substrate. The organic layer is disposed on the drain and has a contact hole. The pixel electrode is disposed on the organic layer and electrically connected to the drain via the contact hole. The second substrate is disposed opposite to the first substrate. The common electrode layer is disposed on the organic layer. The spacer is disposed between the organic layer and the second substrate, wherein the spacer is directly in contact with the common electrode layer and overlaps with the contact hole.

Abstract: An electronic device including a plurality of pixels and a driving element is provided. Each of the plurality of pixels includes a first sub-pixel, a second sub-pixel, and a third sub-pixel. The driving element drives each first sub-pixel of the plurality of pixels.

Abstract: An electronic device is provided by the present disclosure. The electronic device includes a substrate; a first transistor disposed on the substrate and including a first semiconductor layer and a gate electrode; a first insulating layer disposed between the first semiconductor layer and the gate electrode; a second insulating layer disposed on the first insulating layer, wherein the first semiconductor layer and the gate electrode are located between the substrate and the second insulating layer; a barrier layer disposed on the second insulating layer; and a second transistor disposed on the barrier layer and including a second semiconductor layer, wherein the barrier layer is disposed between the second semiconductor layer and the second insulating layer.

Abstract: The disclosure provides a display device and another display device. The display device includes a display panel. The display panel has a functional display area. The functional display area includes a pixel. The pixel includes a white pixel and multiple display pixels. The display pixels surround at least a part of the white pixel, and the white pixel includes a pixel electrode. The another display device includes another display panel. The another display panel has a functional display area, and the functional display area includes a pixel and a signal line. The pixel includes a white pixel and multiple display pixels. The signal line includes a branch, and the branch is electrically connected to one of the display pixels. The display device and the another display device of the disclosure is capable of reducing the problem of diffraction or having a better optical sensing effect.

Abstract: The disclosure provides an electronic device, which includes a substrate, two adjacent transistors, a first scan line, and two adjacent light shielding elements. The two adjacent transistors are disposed on the substrate and arranged along a first direction. A first transistor of the two adjacent transistors includes a first active element and a first conductive element electrically connected to the first active element. The first scan line is extending along the first direction. The two adjacent light shielding elements are respectively disposed between the two adjacent transistors and the substrate. The two adjacent light shielding elements are spaced apart by a first gap region, and the first gap region overlaps the first conductive element. The display device of the disclosure can reduce the problem of image quality degradation caused by photo-leakage current.

Abstract: A connection structure and a display device including the connection structure are provided. The connection structure includes a first wire, a second wire, and an insulating layer. The insulating layer is disposed between the first wire and the second wire, and the insulating layer has a through hole surrounded by a side wall. A connection portion of the second wire is electrically connected to the first wire through the through hole. The connection portion of the second wire ends on the side wall of the through hole.

Abstract: A display device having a first region, a second region, and a third region set between the first region and the second region is provided. The display device includes a first sub-pixel, a second sub-pixel, and a first signal line. The first sub-pixel is arranged in the first region. The second sub-pixel is arranged in the second region, the area of the first sub-pixel is larger than the area of the second sub-pixel. The first signal line is arranged in the first region and the third region, and is electrically connected to the first sub-pixel and the second sub-pixel. At least a part of the first signal line extends in the first direction in the first region. At least another part of the first signal line extends in the second direction in the third region. The first direction is different from the second direction.

Abstract: The invention provides an electronic device, including a substrate, a semiconductor layer, a light blocking layer, and a spacer. The semiconductor layer is disposed on the substrate and has a channel area. The light blocking layer is disposed between the substrate and the channel area. The spacer is disposed on the semiconductor layer. The light blocking layer overlaps with the spacer and the channel area. The electronic device of the embodiment of the invention may have an enhanced opening rate.