Patents by Inventor Chia-Hsien Chang

Chia-Hsien Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11981617
    Abstract: Provided are pamoate salts of ketamine having a stoichiometry of 2:1 of ketamine to pamoate, including R, S-ketamine pamoate, S-ketamine pamoate, or R-ketamine pamoate, and crystalline or amorphous forms of the pamoate salts, and having excellent safety and properties for pharmaceutical applications. Also provided are pharmaceutical compositions including the pamoate salts of ketamine and their uses in treating a CNS disease or serving as an anesthetic.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: May 14, 2024
    Assignee: Alar Pharmaceuticals Inc.
    Inventors: Tong-Ho Lin, Yung-Shun Wen, Chia-Hsien Chen, Wei-Ju Chang
  • Publication number: 20240145403
    Abstract: An electronic package is provided, in which electronic elements and at least one packaging module including a semiconductor chip and a shielding structure covering the semiconductor chip are disposed on a carrier structure, an encapsulation layer encapsulates the electronic elements and the packaging module, and a shielding layer is formed on the encapsulation layer and in contact with the shielding structure. Therefore, the packaging module includes the semiconductor chip and the shielding structure and has a chip function and a shielding wall function simultaneously.
    Type: Application
    Filed: February 6, 2023
    Publication date: May 2, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chih-Hsien CHIU, Wen-Jung TSAI, Chih-Chiang HE, Ko-Wei CHANG, Chia-Yang CHEN
  • Publication number: 20240145132
    Abstract: An over-current protection device includes first and second electrode layers and a PTC material layer laminated therebetween. The PTC material layer includes a polymer matrix, and a conductive filler. The polymer matrix has a fluoropolymer. The total volume of the PTC material layer is calculated as 100%, and the fluoropolymer accounts for 47-62% by volume of the PTC material layer. The fluoropolymer has a melt viscosity higher than 3000 Pa·s.
    Type: Application
    Filed: March 16, 2023
    Publication date: May 2, 2024
    Inventors: CHENG-YU TUNG, CHEN-NAN LIU, Chia-Yuan Lee, HSIU-CHE YEN, YUNG-HSIEN CHANG, Yao-Te Chang, FU-HUA CHU
  • Publication number: 20240145133
    Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a polymer matrix and a first conductive filler. The polymer matrix includes a polyolefin-based polymer and a fluoropolymer. The fluoropolymer has a melt flow index higher than 1.9 g/10 min, and the polyolefin-based polymer and the fluoropolymer together form an interpenetrating polymer network (IPN). The first conductive filler has a metal-ceramic compound dispersed in the polymer matrix.
    Type: Application
    Filed: April 5, 2023
    Publication date: May 2, 2024
    Inventors: CHEN-NAN LIU, YUNG-HSIEN CHANG, CHENG-YU TUNG, HSIU-CHE YEN, Chia-Yuan LEE, Yao-Te CHANG, FU-HUA CHU
  • Publication number: 20240127988
    Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 48% to 55%. The conductive filler has a metal-ceramic compound.
    Type: Application
    Filed: March 2, 2023
    Publication date: April 18, 2024
    Inventors: HSIU-CHE YEN, YUNG-HSIEN CHANG, CHENG-YU TUNG, Chia-Yuan Lee, CHEN-NAN LIU, Yao-Te Chang, FU-HUA CHU
  • Publication number: 20240127989
    Abstract: An over-current protection device includes a first metal layer, a second metal layer and a heat-sensitive layer laminated therebetween. The heat-sensitive layer exhibits a positive temperature coefficient (PTC) characteristic and includes a first polymer and a conductive filler. The first polymer consists of polyvinylidene difluoride (PVDF), and PVDF exists in different phases such as ?-PVDF, ?-PVDF and ?-PVDF. The total amount of ?-PVDF, ?-PVDF and ?-PVDF is calculated as 100%, and the amount of ?-PVDF accounts for 33% to 42%.
    Type: Application
    Filed: January 25, 2023
    Publication date: April 18, 2024
    Inventors: CHIA-YUAN LEE, CHENG-YU TUNG, HSIU-CHE YEN, CHEN-NAN LIU, YUNG-HSIEN CHANG, YAO-TE CHANG, FU-HUA CHU
  • Patent number: 11956888
    Abstract: An electronic device includes a casing, a circuit board and a grounding assembly. The circuit board has a first surface and a second surface, wherein an input terminal and an output terminal are disposed on the second surface. The grounding assembly comprises a conducting terminal, a first grounding element and a second grounding element. The conducting terminal is disposed on the first surface of the circuit board, and the first grounding element is disposed adjacent to the conducting terminal. The first grounding element penetrates the circuit board and electrically couples with the conducting terminal and the casing, and the second grounding element correspondingly penetrates the circuit board and the conducting element, so that a first portion of the second grounding element electrically couples with the input terminal and the output terminal of the circuit board, and a second portion of the second grounding element electrically couples with the conducting terminal.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: April 9, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Chia-Hsien Chu, Yi-Hua Chang
  • Patent number: 11929314
    Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsien Huang, Peng-Fu Hsu, Yu-Syuan Cai, Min-Hsiu Hung, Chen-Yuan Kao, Ken-Yu Chang, Chun-I Tsai, Chia-Han Lai, Chih-Wei Chang, Ming-Hsing Tsai
  • Patent number: 11227891
    Abstract: A chip-scale linear light-emitting device includes a submount substrate, light-emitting diode (LED) semiconductor chips, a chip-scale packaging structure and a reflective structure. The LED semiconductor chips, the packaging structure and the reflective structure are disposed on the submount substrate, wherein the packaging structure partially covers the chip-upper surface and/or the chip-edge surfaces of the LED semiconductor chips, and the reflective structure partially covers the package-top surface and/or the package-side surfaces of the packaging structure. If one of the chip-edge surfaces and the package-side surface of the packaging structure are exposed from the reflective structure as a primary light-emitting side surface, a side-view type linear light-emitting device is formed. If the package-top surface of the packaging structure is exposed from the reflective structure as a primary light-emitting top surface, a top-view type linear light-emitting device is formed.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: January 18, 2022
    Assignee: Maven Optronics Co., Ltd.
    Inventors: Chieh Chen, Chia-Hsien Chang
  • Patent number: 11081631
    Abstract: An asymmetrically shaped chip-scale packaging (CSP) light-emitting device (LED) includes an LED chip, a photoluminescent structure (or a light-transmitting structure), and a reflective structure. The photoluminescent structure covers the upper surface and/or the edge surface of the LED chip; and the reflective structure at least partially covers the edge surface of the photoluminescent structure. The reflective structure partially reflects the primary light emitted from the edge surface of the LED chip or the converted secondary light radiated from the edge surface of the photoluminescent structure, therefore shaping the radiation pattern asymmetrically.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: August 3, 2021
    Assignee: Maven Optronics Co., LTD.
    Inventors: Chieh Chen, Chia-Hsien Chang
  • Publication number: 20210208689
    Abstract: A proximity detection method is for detecting if a user is proximate to a proximity detection keyboard, and the proximity detection keyboard includes a plurality of electrodes and at least one grounding element, which is disposed correspondingly to the electrodes. The proximity detection method includes an equivalent capacitance detecting step and a proximity event determining step. The equivalent capacitance detecting step is for detecting an equivalent capacitance of each of the electrodes. The equivalent capacitance of each of the electrodes is defined by a corresponding proximity capacitance and a corresponding parasitic capacitance. A proximity event determining step is for comparing the equivalent capacitance of at least one of the electrodes and a corresponding capacitance threshold value to determine if a proximity event is existed. The electrodes are respectively corresponding to the capacitance threshold values being predetermined.
    Type: Application
    Filed: November 4, 2020
    Publication date: July 8, 2021
    Inventors: Huai-Tsu CHANG, Ku-Hsiung FENG, Chia-Hsien CHANG, Wen-Hsiang LIN
  • Publication number: 20210036051
    Abstract: A chip-scale linear light-emitting device includes a submount substrate, light-emitting diode (LED) semiconductor chips, a chip-scale packaging structure and a reflective structure. The LED semiconductor chips, the packaging structure and the reflective structure are disposed on the submount substrate, wherein the packaging structure partially covers the chip-upper surface and/or the chip-edge surfaces of the LED semiconductor chips, and the reflective structure partially covers the package-top surface and/or the package-side surfaces of the packaging structure. If one of the chip-edge surfaces and the package-side surface of the packaging structure are exposed from the reflective structure as a primary light-emitting side surface, a side-view type linear light-emitting device is formed. If the package-top surface of the packaging structure is exposed from the reflective structure as a primary light-emitting top surface, a top-view type linear light-emitting device is formed.
    Type: Application
    Filed: October 5, 2020
    Publication date: February 4, 2021
    Applicant: MAVEN OPTRONICS CO., LTD.
    Inventors: Chieh CHEN, Chia-Hsien CHANG
  • Publication number: 20200335678
    Abstract: An asymmetrically shaped chip-scale packaging (CSP) light-emitting device (LED) includes an LED chip, a photoluminescent structure (or a light-transmitting structure), and a reflective structure. The photoluminescent structure covers the upper surface and/or the edge surface of the LED chip; and the reflective structure at least partially covers the edge surface of the photoluminescent structure. The reflective structure partially reflects the primary light emitted from the edge surface of the LED chip or the converted secondary light radiated from the edge surface of the photoluminescent structure, therefore shaping the radiation pattern asymmetrically.
    Type: Application
    Filed: July 6, 2020
    Publication date: October 22, 2020
    Applicant: Maven Optronics Co., Ltd.
    Inventors: Chieh CHEN, Chia-Hsien CHANG
  • Patent number: 10797102
    Abstract: A chip-scale linear light-emitting device includes a submount substrate, light-emitting diode (LED) semiconductor chips, a chip-scale packaging structure and a reflective structure. The LED semiconductor chips, the packaging structure and the reflective structure are disposed on the submount substrate, wherein the packaging structure partially covers the chip-upper surface and/or the chip-edge surfaces of the LED semiconductor chips, and the reflective structure partially covers the package-top surface and/or the package-side surfaces of the packaging structure. If one of the chip-edge surfaces and the package-side surface of the packaging structure are exposed from the reflective structure as a primary light-emitting side surface, a side-view type linear light-emitting device is formed. If the package-top surface of the packaging structure is exposed from the reflective structure as a primary light-emitting top surface, a top-view type linear light-emitting device is formed.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: October 6, 2020
    Assignee: Maven Optronics Co., Ltd.
    Inventors: Chieh Chen, Chia-Hsien Chang
  • Patent number: 10749086
    Abstract: An asymmetrically shaped chip-scale packaging (CSP) light-emitting device (LED) includes an LED chip, a photoluminescent structure (or a light-transmitting structure), and a reflective structure. The photoluminescent structure covers the upper surface and/or the edge surface of the LED chip; and the reflective structure at least partially covers the edge surface of the photoluminescent structure. The reflective structure partially reflects the primary light emitted from the edge surface of the LED chip or the converted secondary light radiated from the edge surface of the photoluminescent structure, therefore shaping the radiation pattern asymmetrically.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: August 18, 2020
    Assignee: Maven Optronics Co., Ltd.
    Inventors: Chieh Chen, Chia-Hsien Chang
  • Publication number: 20190296077
    Abstract: A chip-scale linear light-emitting device includes a submount substrate, light-emitting diode (LED) semiconductor chips, a chip-scale packaging structure and a reflective structure. The LED semiconductor chips, the packaging structure and the reflective structure are disposed on the submount substrate, wherein the packaging structure partially covers the chip-upper surface and/or the chip-edge surfaces of the LED semiconductor chips, and the reflective structure partially covers the package-top surface and/or the package-side surfaces of the packaging structure. If one of the chip-edge surfaces and the package-side surface of the packaging structure are exposed from the reflective structure as a primary light-emitting side surface, a side-view type linear light-emitting device is formed. If the package-top surface of the packaging structure is exposed from the reflective structure as a primary light-emitting top surface, a top-view type linear light-emitting device is formed.
    Type: Application
    Filed: March 15, 2019
    Publication date: September 26, 2019
    Applicant: MAVEN OPTRONICS CO., LTD.
    Inventors: Chieh CHEN, Chia-Hsien CHANG
  • Publication number: 20190025650
    Abstract: An asymmetrically shaped chip-scale packaging (CSP) light-emitting device (LED) includes an LED chip, a photoluminescent structure (or a light-transmitting structure), and a reflective structure. The photoluminescent structure covers the upper surface and/or the edge surface of the LED chip; and the reflective structure at least partially covers the edge surface of the photoluminescent structure. The reflective structure partially reflects the primary light emitted from the edge surface of the LED chip or the converted secondary light radiated from the edge surface of the photoluminescent structure, therefore shaping the radiation pattern asymmetrically.
    Type: Application
    Filed: July 19, 2018
    Publication date: January 24, 2019
    Applicant: MAVEN OPTRONICS CO., LTD.
    Inventors: Chieh CHEN, Chia-Hsien CHANG
  • Publication number: 20160047070
    Abstract: A fabric weaved at least by a first yarn and a second yarn is provided. A first quantum dot material is distributed in the first yarn, and a second quantum dot material is distributed in the second yarn. An average particle size of the first quantum dot material is different from the average particle size of the second quantum dot material.
    Type: Application
    Filed: June 16, 2015
    Publication date: February 18, 2016
    Inventors: Wen-Chang Hung, Chia-Hsien Chang
  • Publication number: 20130168063
    Abstract: An electronic device includes a chassis, a cooler, and a fan assembly. The chassis includes a bottom plate and defines an air inlet and an air outlet. The cooler is secured to the bottom plate. The fan assembly is secured to the bottom plate and defines a case and a roller received in the case. The roller includes a shaft and a number of blades secured to the shaft. An area of the air inlet is greater than an area of the air outlet. The fan assembly is capable of drawing in air into the roller. The air flows into the air inlet along a first direction. The air flows out of the air outlet along a second direction. The first direction is substantially parallel to the second direction. The first direction is substantially perpendicular to the shaft.
    Type: Application
    Filed: September 12, 2012
    Publication date: July 4, 2013
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: CHIA-HUNG HUNG, TE-YAO YEH, KENG-CHIH LIN, CHIA-HSIEN CHANG
  • Patent number: 8368110
    Abstract: A side view light emitting diode (LED) package structure includes a package housing, a side view LED chip and a thermal conductive member. The side view LED chip is enclosed by the package housing and an emitting direction of the side view LED chip is perpendicular to a thickness direction of a substrate. The thermal conductive member connected with the side view LED chip is disposed inside the package housing and a portion of which extends out of a dissipation opening of the package housing to be exposed so that heat of the side view LED chip is dissipated.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: February 5, 2013
    Assignee: Everlight Electronics Co., Ltd.
    Inventors: Yi-Tsuo Wu, Chung-Chuan Hsieh, Chia-Hsien Chang