Patents by Inventor Chia Hsu

Chia Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096873
    Abstract: Electrostatic discharge (ESD) structures are provided. An ESD structure includes a semiconductor substrate, a first epitaxy region with a first type of conductivity over the semiconductor substrate, a second epitaxy region with a second type of conductivity over the semiconductor substrate, and a plurality of semiconductor layers. The semiconductor layers are stacked over the semiconductor substrate and between the first and second epitaxy regions. A first conductive feature is formed over the first epitaxy region and outside an oxide diffusion region. A second conductive feature is formed over the second epitaxy region and outside the oxide diffusion region. A third conductive feature is formed over the first epitaxy region and within the oxide diffusion region. A fourth conductive feature is formed over the second epitaxy region and within the oxide diffusion region. The oxide diffusion region is disposed between the first and second conductive features.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Chun-Chia HSU, Tung-Heng HSIEH, Yung-Feng CHANG, Bao-Ru YOUNG, Jam-Wem LEE, Chih-Hung WANG
  • Patent number: 11927312
    Abstract: The disclosure provides an electronic device, including a circuit board, multiple semiconductor components, a first light reflecting structure, and a second light reflecting structure. The circuit board includes a substrate, and the substrate may have a first surface and at least one side surface. The multiple semiconductor components are disposed on the first surface. The first light reflecting structure is disposed on the first surface. The second light reflecting structure is disposed on the first surface and the at least one side surface.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: March 12, 2024
    Assignee: Innolux Corporation
    Inventors: Chin-Chia Huang, Chieh-Ying Chen, Jia-Huei Lin, Chin-Tai Hsu, Tzu-Chien Huang, Fu-Sheng Tsai
  • Patent number: 11923199
    Abstract: Aspects of the disclosure provide a method. The method includes forming a structure over a substrate, and forming a spacer layer on the structure, wherein the spacer layer has a recess. The method includes forming a mask layer over the spacer layer and in the recess, the mask layer including a first layer, a second layer and a third layer. The method includes patterning the third layer of the mask layer, and etching the first layer and the second layer of the mask layer to form an opening to expose the recess of the spacer layer, wherein the opening in the second layer has a first width; and. The method includes removing the second layer using a wet etchant, wherein the opening in the third layer has a second width, and the second with is greater than the first width.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Nai-Chia Chen, Wan Hsuan Hsu, Chia-Wei Wu, Neng-Jye Yang, Chun-Li Chou
  • Publication number: 20240072411
    Abstract: An electronic device includes a metal back cover, a metal frame, a first antenna module and a second antenna module. The metal frame includes a first and a second disconnection portion, a first and a second connection portion. The first and the second connection portion are connected to the metal back cover. The first disconnection portion is separated from the first connection portion, the metal back cover and the second disconnection portion to form a first slot. The second disconnection portion is connected to the second connection portion and is separated from the metal back cover to form a second slot. The first antenna module is connected to the first disconnection portion, and forms a first antenna path. The second antenna module is connected to the second disconnection portion, and forms a second and a third antenna path with the second disconnection portion and the metal back cover.
    Type: Application
    Filed: July 28, 2023
    Publication date: February 29, 2024
    Applicant: Pegatron Corporation
    Inventors: Chien-Yi Wu, Hau Yuen Tan, Chao-Hsu Wu, Chih-Wei Liao, Chia-Hung Chen, Chen-Kuang Wang, Wen-Hgin Chuang, Chia-Hong Chen, Hsi Yung Chen
  • Publication number: 20240071947
    Abstract: A semiconductor package including a ring structure with one or more indents and a method of forming are provided. The semiconductor package may include a substrate, a first package component bonded to the substrate, wherein the first package component may include a first semiconductor die, a ring structure attached to the substrate, wherein the ring structure may encircle the first package component in a top view, and a lid structure attached to the ring structure. The ring structure may include a first segment, extending along a first edge of the substrate, and a second segment, extending along a second edge of the substrate. The first segment and the second segment may meet at a first corner of the ring structure, and a first indent of the ring structure may be disposed at the first corner of the ring structure.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Inventors: Yu-Ling Tsai, Lai Wei Chih, Meng-Tsan Lee, Hung-Pin Chang, Li-Han Hsu, Chien-Chia Chiu, Cheng-Hung Lin
  • Patent number: 11899419
    Abstract: An integrated control management system includes an input output device. The input output device includes a database, a memory module, a first processing module, and a second processing module. The memory module receives and stores a plurality of integrated control commands, and one of the integrated control commands is generated based on a hardware control command for setting a hardware control transmitted by another input and output device. The first processing module reads the integrated control command from the memory module and obtains the hardware control data from the integrated control command. The first processing module updates the hardware control data to the database. The second processing module reads the database and updates the hardware control data stored in the database to another database in another input output device. The second processing module sets the hardware control based on the hardware control data stored in the database.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: February 13, 2024
    Assignee: MITAC COMPUTING TECHNOLOGY CORPORATION
    Inventors: Heng-Chia Hsu, Chen-Yin Lin, Yu-Shu Yeh, Chien-Chung Wang, Chin-Hung Tan
  • Publication number: 20240038978
    Abstract: The present invention provides a titanium-niobium composite oxide, which includes titanium, niobium, dopant M and oxygen, and the molar ratio of the titanium, niobium and dopant M is 1:(2?x):x, and x is 0.01 to 0.2; wherein the dopant M is doped in a crystal structure with a monoclinic crystal structure formed from the titanium, niobium and oxygen, and the dopant M is at least one metal element selected from the group consisting of Sn, Al and Zr. The present invention further provides a preparation method of the titanium-niobium composite oxide, an active material and a lithium ion secondary battery using the same. The titanium-niobium composite oxide produced by the present invention has better electrical performance than the existing negative electrode materials, so that the lithium ion secondary battery using it can exhibit longer cycle life, larger electric capacity and faster charging and discharging performance, thereby having a bright prospect of the application.
    Type: Application
    Filed: February 6, 2023
    Publication date: February 1, 2024
    Applicant: GUS TECHNOLOGY CO., LTD.
    Inventors: Chung-Chieh CHANG, Kuo-Wei YEH, Wen-Chia HSU, Jia-Hui WANG, Chia-Huan CHUNG, Dong-Ze WU, PREM CHANDAN DEVANGA
  • Patent number: 11881477
    Abstract: An array of poly lines on an active device area of an integrated chip is extended to form a dummy device structure on an adjacent isolation region. The resulting dummy device structure is an array of poly lines having the same line width, line spacing, and pitch as the array of poly lines on the active device area. The poly lines of the dummy device structure are on grid with the poly lines on the active device area. Because the dummy device structure is formed of poly lines that are on grid with the poly lines on the active device area, the dummy device structure may be much closer to the active device area than would otherwise be possible. The resulting proximity of the dummy device structure to the active device area improves anti-dishing performance and reduces empty space on the integrated chip.
    Type: Grant
    Filed: June 16, 2020
    Date of Patent: January 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yung Feng Chang, Bao-Ru Young, Yu-Jung Chang, Tzung-Chi Lee, Tung-Heng Hsieh, Chun-Chia Hsu
  • Publication number: 20240015446
    Abstract: A MEMS structure is provided. The MEMS structure includes a substrate and a backplate, the substrate has an opening portion, and the backplate is disposed on one side of the substrate and has acoustic holes. The MEMS structure also includes a diaphragm disposed between the substrate and the backplate, and the diaphragm extends across the opening portion of the substrate and includes outer ventilation holes and inner ventilation holes arranged in a concentric manner. The outer ventilation holes and the inner ventilation holes are relatively arranged in a ring shape and surround the center of the diaphragm. The MEMS structure further includes a pillar disposed between the backplate and the diaphragm. The pillar prevents the diaphragm from being electrically connected to the backplate.
    Type: Application
    Filed: October 28, 2022
    Publication date: January 11, 2024
    Inventors: Wen-Shan LIN, Chun-Kai MAO, Chih-Yuan CHEN, Jien-Ming CHEN, Feng-Chia HSU, Nai-Hao KUO
  • Patent number: 11855073
    Abstract: Electrostatic discharge (ESD) structures are provided. An ESD structure includes a semiconductor substrate, a first epitaxy region with a first type of conductivity over the semiconductor substrate, a second epitaxy region with a second type of conductivity over the semiconductor substrate, and a plurality of first semiconductor layers and a plurality of second semiconductor layers. The first and second semiconductor layers are alternatingly stacked over the semiconductor substrate and between the first and second epitaxy regions. A first conductive feature is formed over the first epitaxy region and outside an oxide diffusion region. A second conductive feature is formed over the second epitaxy region and outside the oxide diffusion region. The oxide diffusion region is disposed between the first and second conductive features.
    Type: Grant
    Filed: September 30, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Chia Hsu, Tung-Heng Hsieh, Yung-Feng Chang, Bao-Ru Young, Jam-Wem Lee, Chih-Hung Wang
  • Patent number: 11847467
    Abstract: A boot method for an embedded system is provided. The embedded system includes two mainboards each provided with a baseboard management controller (BMC), a non-volatile memory unit and a network adapter. When the embedded system is turned on, each of the BMCs performs a boot procedure, and then loads an operating system (OS) image file from a corresponding non-volatile memory unit to execute an operating system. When one BMC fails to load the OS image file or to execute the operating system, the BMC causes the corresponding network adapter to communicate with the other network adapter to acquire the OS image file from the non-volatile memory unit on the other mainboard, so as to replace the OS image file in the corresponding non-volatile memory unit, and directly loads the OS image thus acquired to execute the operating system.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: December 19, 2023
    Assignee: MITAC COMPUTING TECHNOLOGY CORPORATION
    Inventors: Yu-Shu Yeh, Heng-Chia Hsu, Chen-Yin Lin, Chien-Chung Wang, Chin-Hung Tan
  • Publication number: 20230386985
    Abstract: A semiconductor structure includes a solder resist layer disposed on a circuit substrate and partially covering contact pads of the circuit substrate, and external terminals disposed on the solder resist layer and extending through the solder resist layer to land on the contact pads. The external terminals include a first external terminal and a second external terminal which have different heights. A first interface between the first external terminal and corresponding one of the contact pads underlying the first external terminal is less than a second interface between the second external terminal and another corresponding one of the contact pads underlying the second external terminal.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 30, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Yu Yeh, Cing-He Chen, Kuo-Chiang Ting, Weiming Chris Chen, Chia-Hao Hsu, Kuan-Yu Huang, Shu-Chia Hsu
  • Publication number: 20230387058
    Abstract: In an embodiment, an interposer has a first side, a first integrated circuit device attached to the first side of the interposer with a first set of conductive connectors, each of the first set of conductive connectors having a first height, a first die package attached to the first side of the interposer with a second set of conductive connectors, the second set of conductive connectors including a first conductive connector and a second conductive connector, the first conductive connector having a second height, the second conductive connector having a third height, the third height being different than the second height, a first dummy conductive connector being between the first side of the interposer and the first die package, an underfill disposed beneath the first integrated circuit device and the first die package, and an encapsulant disposed around the first integrated circuit device and the first die package.
    Type: Application
    Filed: August 9, 2023
    Publication date: November 30, 2023
    Inventors: Kuan-Yu Huang, Sung-Hui Huang, Shang-Yun Hou, Shu Chia Hsu, Yu-Yun Huang, Wen-Yao Chang, Yu-Jen Cheng
  • Publication number: 20230378158
    Abstract: A semiconductor structure includes a substrate having a first well of a first conductivity type and a second well of a second conductivity type. From a top view, the first well includes first and seconds edges extending along a first direction. The second edge has multiple turns, resulting in the first well having a protruding section and a recessed section. The semiconductor structure further includes a first source/drain feature over the protruding section and a second source/drain feature over a main body of the first well. The first source/drain feature is of the first conductivity type. The second source/drain feature is of the second conductivity type. The first and the second source/drain features are generally aligned along a second direction perpendicular to the first direction from the top view.
    Type: Application
    Filed: July 28, 2023
    Publication date: November 23, 2023
    Inventors: Yung Feng Chang, Chun-Chia Hsu, Tung-Heng Hsieh, Bao-Ru Young
  • Publication number: 20230377817
    Abstract: A circuit structure includes a light-transmissive insulation layer, a patterned conductive layer and an electronic component. The patterned conductive layer is disposed on the light-transmissive insulation layer. The electronic component is disposed on the patterned conductive layer and electrically connected to the patterned conductive layer.
    Type: Application
    Filed: August 1, 2023
    Publication date: November 23, 2023
    Inventors: Ching-Lung CHENG, Chin-Chia HSU
  • Patent number: 11808560
    Abstract: A measuring equipment, applied to carry a workpiece to be measured, includes a main base and a positioning device. The main base includes a measuring center axis. The positioning device includes at least two positioning elements. Each of the at least two positioning elements is disposed movably on the main base, and each of the at least two positioning elements is moved with respect to the measuring center axis. An identical distance is there from each of the at least two positioning elements to the measuring center axis. Each of the at least two positioning elements is used for the workpiece to contact and to be positioned to the measuring center axis.
    Type: Grant
    Filed: July 7, 2021
    Date of Patent: November 7, 2023
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Cheng Chen, Yi-Chia Hsu, Chia-Ching Lin, Chih-Chieh Chao
  • Publication number: 20230350520
    Abstract: Provided is an electronic device including a touch panel, a communication unit, and a processing unit coupled to the touch control panel and the communication unit. The communication unit sends a detection signal and receives a response signal based on the detection signal. The processing unit determines an operation mode of the electronic device based on the response signal. The operation mode includes a first mode and a second mode. An input signal source of the electronic device of the first mode includes a finger. The input signal source of the second mode includes the finger and a stylus. When the response signal includes a pen-tip signal of the stylus and a pen-ring signal of the stylus, the processing unit determines whether to set the operation mode to the second mode according to the numerical relationship between the pen-tip signal and the pen-ring signal.
    Type: Application
    Filed: August 17, 2022
    Publication date: November 2, 2023
    Applicant: Novatek Microelectronics Corp.
    Inventors: Chih Hsien Ou, ChengFeng Hsieh, Chin-Lin Lee, Che-Chia Hsu
  • Patent number: 11803272
    Abstract: Provided is an electronic device including a touch panel, a communication unit, and a processing unit coupled to the touch control panel and the communication unit. The communication unit sends a detection signal and receives a response signal based on the detection signal. The processing unit determines an operation mode of the electronic device based on the response signal. The operation mode includes a first mode and a second mode. An input signal source of the electronic device of the first mode includes a finger. The input signal source of the second mode includes the finger and a stylus. When the response signal includes a pen-tip signal of the stylus and a pen-ring signal of the stylus, the processing unit determines whether to set the operation mode to the second mode according to the numerical relationship between the pen-tip signal and the pen-ring signal.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: October 31, 2023
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chih Hsien Ou, ChengFeng Hsieh, Chin-Lin Lee, Che-Chia Hsu
  • Publication number: 20230339742
    Abstract: A MEMS structure is provided. The MEMS structure includes a substrate having an opening portion and a backplate disposed on one side of the substrate and having acoustic holes. The MEMS structure also includes a diaphragm disposed between the substrate and the backplate and extending across the opening portion of the substrate. The diaphragm includes ventilation holes, and an air gap is formed between the diaphragm and the backplate. The MEMS structure further includes a coverage structure disposed on the sidewall of at least one ventilation hole.
    Type: Application
    Filed: August 3, 2022
    Publication date: October 26, 2023
    Inventors: Jien-Ming CHEN, Wen-Shan LIN, Chun-Kai MAO, Feng-Chia HSU, Chih-Yuan CHEN, Nai-Hao KUO
  • Patent number: 11800048
    Abstract: Embodiments of the disclosure provided herein generally relate to methods and video system components that have integrated background differentiation capabilities that allow for background replacement and/or background modification. In some embodiments, undesired portions of video data generated in a video environment are separated from desired portions of the video data by taking advantage of the illumination and decay of the intensity of electromagnetic radiation, provided from an illuminator, over a distance. Due to the decay of intensity with distance, the electromagnetic radiation reflected from the undesired background has a lower intensity when received by the sensor than the electromagnetic radiation reflected from the desired foreground. The difference in the detected intensity at the one or more wavelengths can then be used to separate and/or modify the undesired background from the desired foreground for use in a video feed.
    Type: Grant
    Filed: February 24, 2021
    Date of Patent: October 24, 2023
    Assignee: Logitech Europe S.A.
    Inventors: Joseph Yao-Hua Chu, Jeffrey Phillip Fisher, Ting Chia Hsu