Patents by Inventor Chia-Hua Chu

Chia-Hua Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11533565
    Abstract: A MEMS microphone includes a substrate having an opening, a first diaphragm, a first backplate, a second diaphragm, and a backplate. The first diaphragm faces the opening in the substrate. The first backplate includes multiple accommodating-openings and it is spaced apart from the first diaphragm. The second diaphragm joints the first diaphragm together at multiple locations by pillars passing through the accommodating-openings in the first backplate. The first backplate is located between the first diaphragm and the second diaphragm. The second backplate includes at least one vent hole and it is spaced apart from the second diaphragm. The second diaphragm is located between the first backplate and the second backplate.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: December 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Wen-Tuan Lo
  • Patent number: 11530130
    Abstract: Various embodiments of the present disclosure are directed towards a method for forming a microelectromechanical systems (MEMS) structure including an epitaxial layer overlying a MEMS substrate. The method includes bonding a MEMS substrate to a carrier substrate. The epitaxial layer is formed over the MEMS substrate, where the epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts is formed over the epitaxial layer.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: December 20, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Sung Chang, Chia-Hua Chu, Shang-Ying Tsai
  • Publication number: 20220380208
    Abstract: A stacked semiconductor structure includes a first substrate. A multilayer interconnect is disposed over the first substrate. Metal sections are disposed over the multilayer interconnect. First bonding features are over the metal sections. A second substrate has a front surface. A cavity extends from the front surface into a depth D in the second substrate. A movable structure is disposed over the front surface of the second substrate and suspending over the cavity. The movable structure includes a dielectric membrane, metal units over the dielectric membrane and a cap dielectric layer over the metal units. Second bonding features are over the cap dielectric layer and bonded to the first bonding features. The second bonding features extend through the cap dielectric layer and electrically coupled to the metal units.
    Type: Application
    Filed: August 10, 2022
    Publication date: December 1, 2022
    Inventors: Chia-Hua Chu, Chun-Wen Cheng
  • Publication number: 20220369041
    Abstract: A MEMS device and a method of manufacturing the same are provided. A semiconductor device includes a substrate; and a membrane over the substrate and configured to generate charges in response to an acoustic wave, the membrane being in a polygonal shape including vertices. The membrane includes a via pattern having first lines that partition the membrane into slices and extend to the vertices of the membrane such that the slices are separated from each other near an anchored region of the membrane and connected to each other around a central region. The via pattern further includes second lines extending from the anchored region of the membrane toward the central region of the membrane. Each of the second lines includes a length less than a length of each of the first lines.
    Type: Application
    Filed: July 27, 2022
    Publication date: November 17, 2022
    Inventors: CHUN-WEN CHENG, CHUN YIN TSAI, CHIA-HUA CHU
  • Patent number: 11498832
    Abstract: A stacked semiconductor structure includes a first substrate. A multilayer interconnect is disposed over the first substrate. Metal sections are disposed over the multilayer interconnect. First bonding features are over the metal sections. A second substrate has a front surface. A cavity extends from the front surface into a depth D in the second substrate. A movable structure is disposed over the front surface of the second substrate and suspending over the cavity. The movable structure includes a dielectric membrane, metal units over the dielectric membrane and a cap dielectric layer over the metal units. Second bonding features are over the cap dielectric layer and bonded to the first bonding features. The second bonding features extend through the cap dielectric layer and electrically coupled to the metal units.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: November 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 11485631
    Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical systems (MEMS) structure including an epitaxial layer overlying a MEMS substrate. The MEMS substrate comprises a moveable element arranged over a carrier substrate. The epitaxial layer has a higher doping concentration than the MEMS substrate. A plurality of contacts overlies the epitaxial layer. A first subset of the plurality of contacts overlies the moveable element. The plurality of contacts respectively has an ohmic contact with the epitaxial layer.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: November 1, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Sung Chang, Chia-Hua Chu, Shang-Ying Tsai
  • Patent number: 11486854
    Abstract: The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: November 1, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Alexander Kalnitsky, Yi-Shao Liu, Kai-Chih Liang, Chia-Hua Chu, Chun-Ren Cheng, Chun-Wen Cheng
  • Publication number: 20220333251
    Abstract: The present disclosure provides a gas sensor. The gas sensor includes a substrate, a conductor layer over the substrate, wherein the conductor layer includes a conductive pattern including a plurality of openings, the openings being arranged in a repeating pattern, an insulating layer in the plurality of openings and over a top surface of the conductive pattern, wherein the conductive pattern is embedded in the insulating layer, and a gas sensing film over a portion of the insulating layer.
    Type: Application
    Filed: June 20, 2022
    Publication date: October 20, 2022
    Inventors: MING-TA LEI, CHIA-HUA CHU, HSIN-CHIH CHIANG, TUNG-TSUN CHEN, CHUN-WEN CHENG
  • Publication number: 20220289556
    Abstract: Various embodiments of the present disclosure are directed towards an electronic device that comprises a semiconductor substrate having a first surface opposite a second surface. The semiconductor substrate at least partially defines a cavity. A first microelectromechanical systems (MEMS) device is disposed along the first surface of the semiconductor substrate. The first MEMS device comprises a first backplate and a diaphragm vertically separated from the first backplate. A second MEMS device is disposed along the first surface of the semiconductor substrate. The second MEMS device comprises spring structures and a moveable element. The spring structures are configured to suspend the moveable element in the cavity. A segment of the semiconductor substrate continuously laterally extends from under a sidewall of the first MEMS device to under a sidewall of the second MEMS device.
    Type: Application
    Filed: June 21, 2021
    Publication date: September 15, 2022
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Chun Yin Tsai, Wen Cheng Kuo
  • Patent number: 11418887
    Abstract: A MEMS device and a method of manufacturing the same are provided. A semiconductor device includes a substrate and a membrane over the substrate. The membrane includes a piezoelectric material configured to generate charges in response to an acoustic wave. The membrane includes a via pattern having first lines that partition the membrane into slices such that the slices are separated from each other at a first region near an edge of the membrane and connected to each other at a second region.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: August 16, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Wen Cheng, Chun Yin Tsai, Chia-Hua Chu
  • Patent number: 11414763
    Abstract: The present disclosure provides a method of manufacturing a gas sensor. The method includes the following operations: a substrate is received; a conductor layer is formed over the substrate; the conductor layer is patterned to form a conductor with a plurality of openings by an etching operation, the openings being arranged in a repeating pattern, a minimal dimension of the opening being about 4 micrometers; and a gas-sensing film is formed over the conductor.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: August 16, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ming-Ta Lei, Chia-Hua Chu, Hsin-Chih Chiang, Tung-Tsun Chen, Chun-Wen Cheng
  • Publication number: 20220227618
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a substrate and a first dielectric layer formed over the substrate. The semiconductor device structure also includes a first movable membrane formed over the first dielectric layer. In addition, the first movable membrane has a first corrugated portion and a first edge portion connecting to the first corrugated portion. The semiconductor device structure further includes a second dielectric layer formed over the first movable membrane. In addition, the first edge portion is sandwiched between the first dielectric layer and the second dielectric layer, the first corrugated portion is partially sandwiched between the first dielectric layer and the second dielectric layer and is partially exposed by a cavity, and a bottom surface of the first corrugated portion is lower than a bottom surface of the first edge portion.
    Type: Application
    Filed: April 1, 2022
    Publication date: July 21, 2022
    Inventors: Yi-Chuan TENG, Chun-Yin TSAI, Chia-Hua CHU, Chun-Wen CHENG
  • Patent number: 11342266
    Abstract: An integrated circuit (IC) with an integrated microelectromechanical systems (MEMS) structure is provided. In some embodiments, the IC comprises a semiconductor substrate, a back-end-of-line (BEOL) interconnect structure, the integrated MEMS structure, and a cavity. The BEOL interconnect structure is over the semiconductor substrate, and comprises wiring layers stacked in a dielectric region. Further, an upper surface of the BEOL interconnect structure is planar or substantially planar. The integrated MEMS structure overlies and directly contacts the upper surface of the BEOL interconnect structure, and comprises an electrode layer. The cavity is under the upper surface of the BEOL interconnect structure, between the MEMS structure and the BEOL interconnect structure.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: May 24, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu
  • Publication number: 20220146909
    Abstract: Examples of control of detachable camera devices are discussed. A detachable camera device may include a camera and an illumination module. Based on user inputs provided on an apparatus to which the device is detachably coupled, the position of the camera and the intensity of light provided by the illumination module can be changed. The device may include a controller to receive the user inputs from the apparatus and control the camera and the illumination module.
    Type: Application
    Filed: July 31, 2019
    Publication date: May 12, 2022
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Yi-Hsuan Huang, Yi-Lin Lee, Chia Hua Chu
  • Patent number: 11312623
    Abstract: The present disclosure relates to a method of forming an integrated chip structure. The method includes forming a plurality of interconnect layers within a dielectric structure over a substrate. A dielectric layer arranged along a top of the dielectric structure is patterned to define a via hole exposing an uppermost one of the plurality of interconnect layers. An extension via is formed within the via hole and one or more conductive materials are formed over the dielectric layer and the extension via. The one or more conductive materials are patterned to define a sensing electrode over and electrically coupled to the extension via. A microelectromechanical systems (MEMS) substrate is bonded to the substrate. The MEMs substrate is vertically separated from the sensing electrode.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: April 26, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chia Liu, Chia-Hua Chu, Chun-Wen Cheng, Jung-Huei Peng
  • Patent number: 11292712
    Abstract: Structures and formation methods of a semiconductor device structure are provided. The method includes forming a first dielectric layer over a substrate and forming a first recess in the first dielectric layer. The method also includes conformally forming a first movable membrane over the first dielectric layer. In addition, the first movable membrane has a first corrugated portion in the first recess. The method further includes forming a second dielectric layer over the first movable membrane and partially removing the substrate, the first dielectric layer, and the second dielectric layer to form a cavity. In addition, the first corrugated portion of the first movable membrane is partially sandwiched between the first dielectric layer and the second dielectric layer.
    Type: Grant
    Filed: December 31, 2019
    Date of Patent: April 5, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Yi-Chuan Teng, Chun-Yin Tsai, Chia-Hua Chu, Chun-Wen Cheng
  • Patent number: 11280786
    Abstract: The present disclosure provides biochips and methods of fabricating biochips. The method includes combining three portions: a transparent substrate, a first substrate with microfluidic channels therein, and a second substrate. Through-holes for inlet and outlet are formed in the transparent substrate or the second substrate. Various non-organic landings with support medium for bio-materials to attach are formed on the first substrate and the second substrate before they are combined. In other embodiments, the microfluidic channel is formed of an adhesion layer between a transparent substrate and a second substrate with landings on the substrates.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: March 22, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Allen Timothy Chang, Ching-Ray Chen, Yi-Hsien Chang, Yi-Shao Liu, Chun-Ren Cheng, Chun-Wen Cheng
  • Patent number: 11254564
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of vias, a signal transmitting portion, a heater and a sensing material. The plurality of vias penetrates the substrate, wherein each of the plurality of vias includes a conductive or semiconductive portion surrounded by an oxide layer. The signal transmitting portion is disposed in the substrate, wherein adjacent vias of the plurality of vias surrounds the signal transmitting portion. The heater is electrically connected to the signal transmitting portion, and the sensing material is disposed over the heater and electrically connected to the substrate. A method of manufacturing a semiconductor structure is also provided.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: February 22, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • Patent number: 11235969
    Abstract: The integrated CMOS-MEMS device includes a CMOS structure, a cap structure, and a MEMS structure. The CMOS structure, fabricated on a first substrate, includes at least one conducting layer. The cap structure, including vias passing through the cap structure, has an isolation layer deposited on its first side and has a conductive routing layer deposited on its second side. The MEMS structure is deposited between the first substrate and the cap structure. The integrated CMOS-MEMS device also includes a conductive connector that passes through one of the vias and through an opening in the isolation layer on the cap structure. The conductive connector conductively connects a conductive path in the conductive routing layer on the cap structure with the at least one conducting layer of the CMOS structure.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: February 1, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Wen Cheng Kuo, Wei-Jhih Mao
  • Patent number: 11206493
    Abstract: A micro electro mechanical system (MEMS) microphone includes a first membrane, a second membrane, a third membrane disposed between the first membrane and the second membrane, a first cavity disposed between the first membrane and the third membrane and surrounded by a first wall, a second cavity disposed between the second membrane and the third membrane and surrounded by a second wall, and one or more first supports disposed in the first cavity and connecting the first membrane and the third membrane.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: December 21, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chen Hsiung Yang, Chun-Wen Cheng, Chia-Hua Chu, En-Chan Chen