Abstract: An immersion cooling system includes a cooling tank, a housing and a valve. The coolant tank is configured to accommodate a liquid coolant and an electronic device immersed in the liquid coolant. The housing covers a side of the cooling tank and thereby forms an enclosure. The valve has two ports, one of which communicates with the enclosure and the other communicates with a part of the cooling tank above the liquid coolant. The valve is configured to open in response to a gas pressure inside the cooling tank exceeding an upper limit.

Abstract: A method includes forming a gate stack, and etching the gate stack to form a trench penetrating through the gate stack. A dielectric isolation region underlying the gate stack is exposed to the trench, and a first portion and a second portion of the gate stack are separated by the trench. The method includes performing a first deposition process to form a first dielectric layer extending into the trench and lining sidewalls of the first portion and the second portion of the gate stack, and performing a second deposition process to form a second dielectric layer on the first dielectric layer. The second dielectric layer fills the trench. The first dielectric layer has a first dielectric constant, and the second dielectric layer has a second dielectric constant greater than the first dielectric constant.

Abstract: A semiconductor device structure, along with methods of forming such, are described. The structure includes a first channel region disposed over a substrate, a second channel region disposed adjacent the first channel region, a gate electrode layer disposed in the first and second channel regions, and a first dielectric feature disposed adjacent the gate electrode layer. The first dielectric feature includes a first dielectric material having a first thickness. The structure further includes a second dielectric feature disposed between the first and second channel regions, and the second dielectric feature includes a second dielectric material having a second thickness substantially less than the first thickness. The second thickness ranges from about 1 nm to about 20 nm.

Abstract: An electromagnetic interference shielding film includes an insulation layer, a first adhesive layer, a porous metal layer and a conductive adhesive layer including a plurality of conductive particles. The first adhesive layer is located between the insulation layer and the porous metal layer, and the porous metal layer is formed on the first adhesive layer, and making the first adhesive layer locate between the porous metal layer and the insulation layer. The conductive adhesive layer is located on the porous metal layer so that the porous metal layer is located between the first adhesive layer and the conductive adhesive layer. The present invention further provides a preparation method thereof.

Abstract: A titanium precursor is used to selectively form a titanium silicide (TiSix) layer in a semiconductor device. A plasma-based deposition operation is performed in which the titanium precursor is provided into an opening, and a reactant gas and a plasma are used to cause silicon to diffuse to a top surface of a transistor structure. The diffusion of silicon results in the formation of a silicon-rich surface of the transistor structure, which increases the selectivity of the titanium silicide formation relative to other materials of the semiconductor device. The titanium precursor reacts with the silicon-rich surface to form the titanium silicide layer. The selective titanium silicide layer formation results in the formation of a titanium silicon nitride (TiSixNy) on the sidewalls in the opening, which enables a conductive structure such as a metal source/drain contact to be formed in the opening without the addition of another barrier layer.

Abstract: In a method of forming a pattern, a photo resist layer is formed over an underlying layer, the photo resist layer is exposed to an actinic radiation carrying pattern information, the exposed photo resist layer is developed to form a developed resist pattern, a directional etching operation is applied to the developed resist pattern to form a trimmed resist pattern, and the underlying layer is patterned using the trimmed resist pattern as an etching mask.

Abstract: Provided herein are methods of assaying a methylated DNA-binding protein comprising contacting methylated DNA-binding proteins with labeled oligonucleotides, obtaining sample partitions for oligonucleotides with different methylation states, and quantifying the labeled oligonucleotides in the partitions.

Abstract: A window cleaning machine provided according to an embodiment of the disclosure comprises a resilient member disposed between a body and a first cleaning device to prevent external air from passing between the body and the first cleaning device and entering a primary suction space of the body.

Abstract: Provided is a window cleaning machine including a body, air extracting module, first cleaning device, second cleaning device, walking module disposed near the body, and driving device connected to the first and second cleaning devices to cause a reciprocating motion thereof. The body defines a primary suction space. The air extracting module is disposed on the body and is in communication with the primary suction space. The first and second cleaning devices are each in contact with a pane surface while performing a cleaning operation. The first cleaning device defines a first subsidiary space in communication with the primary suction space. The second cleaning device defines a second subsidiary space in communication with the primary suction space. The walking module is disposed outside the first and second subsidiary spaces. The window cleaning machine undergoes the reciprocating motion across a non-horizontal pane surface while clinging firmly thereto by suction.

Abstract: A window cleaning machine includes a body, walking module, air extracting module, first cleaning device and driving device. The body defines a primary suction space. The walking module is disposed near the body. The air extracting module is disposed on the body and is in communication with the primary suction space, allowing the body to cling to the pane surface by suction. The first cleaning device is in contact with the pane surface while performing a cleaning operation. The driving device is connected to the first cleaning device to cause the first cleaning device to undergo a reciprocating motion so as to wipe the pane surface back and forth. The body further comprises a bottom board and a carrying board. The bottom board comprises a bottom board wall portion enclosing a first bottom board through hole. The carrying board is disposed between the first cleaning device and the bottom board.

Abstract: The present disclosure provides an electronic device including a substrate, a plurality of bumps, a plurality of diodes, and a shielding layer. The substrate has a plurality of first through holes. The bumps are disposed on the substrate. The diodes are disposed on the substrate. The shielding layer is disposed on the substrate. One of the bumps is located between two adjacent ones of the diodes in a cross-sectional view, and the shielding layer overlaps at least a portion of the bumps and at least a portion of the first through holes.

Abstract: A memory device is provided which includes a first memory cell including a first transistor and a second transistor coupled to the first transistor in parallel. Gates of the first transistor and the second transistor are coupled to each other, and the gates of the first transistor and the second transistor pass different layers and overlap with each other. Types of the first transistor and the second transistor are the same.

Abstract: A method for testing LEDs includes: Step 1: providing a wafer including a plurality of LEDs and selecting N LEDs from the plurality of LEDs to form an LED group; Step 2: selecting n LEDs from the LED group, where 1<n<N, and testing the n LEDs at a time to obtain a subgroup optical parameter of the LED group; Step 3: performing the Step 2 on the N LEDs repeatedly and alternately for another n LEDs in the LED group to obtain a plurality of the subgroup optical parameters; and Step 4: obtaining an optical parameter of each of the LEDs in the LED group from the plurality of the subgroup optical parameters.

Abstract: A semiconductor device is provided. The semiconductor device includes a source/drain structure, a contact structure, a glue layer, a barrier layer, and a silicide layer. The contact structure is over the source/drain structure. The glue layer surrounds the contact structure. The barrier layer is formed on at least a portion of a sidewall surface of the contact structure. The silicide layer is between the source/drain structure and the contact structure, and the silicide layer is in direct contact with the glue layer. The bottom surface of the glue layer is lower than the top surface of the source/drain structure and the bottom surface of the barrier layer.

Abstract: The present disclosure provides an electronic device including a substrate, a plurality of bumps, a plurality of diodes, and a shielding layer. The substrate has a plurality of first through holes. The bumps are disposed on the substrate. The diodes are disposed on the substrate. The shielding layer is disposed on the substrate. One of the bumps is located between two adjacent ones of the diodes in a cross-sectional view, and the shielding layer overlaps at least a portion of the bumps and at least a portion of the first through holes.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a gate structure, a source/drain structure, a barrier layer, and a glue layer. The gate structure is over a fin structure. The source/drain structure is in the fin structure and adjacent to the gate structure. The barrier layer is over the source/drain structure. The glue layer is adjacent to the barrier layer. The glue layer has an extending portion in direct contact with the gate structure.

Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin on a substrate, a second fin on the substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes an insulating liner and a fill material on the insulating liner. The insulating liner abuts a first sidewall of the first fin and a second sidewall of the second fin. The insulating liner includes a material with a band gap greater than 5 eV.

Abstract: The present disclosure provides an electronic device including a substrate, a first circuit layer, and a plurality of diodes. The substrate has a plurality of first through holes. The first circuit layer is disposed on the substrate and has a plurality of light through holes. The diodes disposed on the first circuit layer. One of the light through holes is located between two adjacent ones of the diodes, and the light through holes overlap a portion of the plurality of first through holes and do not overlap another portion of the plurality of first through holes in a normal direction of the substrate.

Abstract: Methods of cutting fins, and structures formed thereby, are described. In an embodiment, a structure includes a first fin on a substrate, a second fin on the substrate, and a fin cut-fill structure disposed between the first fin and the second fin. The first fin and the second fin are longitudinally aligned. The fin cut-fill structure includes an insulating liner and a fill material on the insulating liner. The insulating liner abuts a first sidewall of the first fin and a second sidewall of the second fin. The insulating liner includes a material with a band gap greater than 5 eV.

Abstract: A method includes etching a gate stack in a wafer to form a trench, depositing a silicon nitride liner extending into the trench, and depositing a silicon oxide layer. The process of depositing the silicon oxide layer includes performing a treatment process on the wafer using a process gas including nitrogen and hydrogen, and performing a soaking process on the wafer using a silicon precursor.