Patents by Inventor Chia-jung Liu

Chia-jung Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070090862
    Abstract: An apparatus and a method of controlling and tuning clock phase alignment with a dual loop of a hybrid phase and time domain for clock source synchronization in electronic devices are described. The coarse calibration unit generates a plurality of output signals, the output signals having a plurality of fixed phase intervals therebetween. At least one of the fixed phase intervals is equal to complete 360 degrees which are divided by the number of the output signals to cover the phase range of complete 360 degrees. The first fine calibration unit connected to the coarse calibration unit delays the output signals generated from the coarse calibration unit by coupling a programmable delay circuit to adjust the phase of a feedback signal toward the phase of a reference signal.
    Type: Application
    Filed: December 27, 2005
    Publication date: April 26, 2007
    Inventors: Tze-hsiang Chao, Chia-hao Yang, Chia-jung Liu
  • Patent number: 7202716
    Abstract: An apparatus and a method of controlling and tuning clock phase alignment with a dual loop of a hybrid phase and time domain for clock source synchronization in electronic devices are described. The coarse calibration unit generates a plurality of output signals, the output signals having a plurality of fixed phase intervals therebetween. At least one of the fixed phase intervals is equal to complete 360 degrees which are divided by the number of the output signals to cover the phase range of complete 360 degrees. The first fine calibration unit connected to the coarse calibration unit delays the output signals generated from the coarse calibration unit by coupling a programmable delay circuit to adjust the phase of a feedback signal toward the phase of a reference signal.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: April 10, 2007
    Assignee: Silicon Integrated Systems Corp.
    Inventors: Tze-hsiang Chao, Chia-hao Yang, Chia-jung Liu
  • Patent number: 7183821
    Abstract: An apparatus and a method of controlling clock phase alignment with a dual loop of a hybrid phase and time domain for clock source synchronization in electronic devices are described. The coarse calibration unit generates a plurality of output signals, the output signals having a plurality of phase intervals therebetween. A predetermined phase angle is divided by the number of the output signals to generate one of the phase intervals. The first fine calibration unit connected to the coarse calibration unit delays the output signals generated from the coarse calibration unit by coupling a programmable delay circuit to adjust the phase of a feedback signal toward the phase of a reference signal. The phase detector connected to the first fine calibration unit is used to detect a phase difference between the reference and the feedback signal and outputting an indicating signal corresponding to the phase difference between the reference and the feedback signal.
    Type: Grant
    Filed: October 24, 2005
    Date of Patent: February 27, 2007
    Assignee: Silicon Integrated Systems Corp.
    Inventors: Tze-hsiang Chao, Chia-jung Liu