Patents by Inventor Chia-Kai Chen

Chia-Kai Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8093648
    Abstract: A method for manufacturing a non-volatile memory and a structure thereof are provided. The manufacturing method comprises the following steps. Firstly, a substrate is provided. Next, a semiconductor layer is formed on the substrate. Then, a Si-rich dielectric layer is formed on the semiconductor layer. After that, a plurality of silicon nanocrystals is formed in the Si-rich dielectric layer by a laser annealing process to form a charge-storing dielectric layer. Last, a gate electrode is formed on the charge-storing dielectric layer.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: January 10, 2012
    Assignee: Au Optronics Corp.
    Inventors: An-Thung Cho, Chia-Tien Peng, Chih-Wei Chao, Wan-Yi Liu, Chia-Kai Chen, Chun-Hsiun Chen, Wei-Ming Huang
  • Publication number: 20110156043
    Abstract: A thin film transistor disposed on a substrate is provided. The thin film transistor includes a gate, a gate insulating layer, a silicon-rich channel layer, a source, and a drain. The gate is disposed on the substrate. The gate insulator is disposed over the gate. The silicon-rich channel layer is disposed above the gate, wherein the material of the silicon-rich channel layer is selected from a group consisting of silicon-rich silicon oxide (Si-rich SiOx), silicon-rich silicon nitride (Si-rich SiNx), silicon-rich silicon oxynitride (Si-rich SiOxNy), silicon-rich silicon carbide (Si-rich SiC) and silicon-rich silicon oxycarbide (Si-rich SiOC). The content (concentration) of silicon of the silicon-rich channel layer within a film depth between 10 nm to 170 nm ranges from about 1E23 atoms/cm3 to about 4E23 atoms/cm3. The source and the drain are connected with the silicon-rich channel layer.
    Type: Application
    Filed: December 10, 2010
    Publication date: June 30, 2011
    Applicant: AU OPTRONICS CORPORATION
    Inventors: An-Thung Cho, Wan-Yi Liu, Chia-Kai Chen, Wu-Hsiung Lin, Chun-Hsiun Chen, Wei-Ming Huang
  • Publication number: 20100013001
    Abstract: A method for manufacturing a non-volatile memory and a structure thereof are provided. The manufacturing method comprises the following steps. Firstly, a substrate is provided. Next, a semiconductor layer is formed on the substrate. Then, a Si-rich dielectric layer is formed on the semiconductor layer. After that, a plurality of silicon nanocrystals is formed in the Si-rich dielectric layer by a laser annealing process to form a charge-storing dielectric layer. Last, a gate electrode is formed on the charge-storing dielectric layer.
    Type: Application
    Filed: July 10, 2009
    Publication date: January 21, 2010
    Applicant: AU OPTRONICS CORP.
    Inventors: An-Thung CHO, Chia-Tien PENG, Chih-Wei CHAO, Wan-Yi LIU, Chia-Kai CHEN, Chun-Hsiun CHEN, Wei-Ming HUANG