Abstract: An image output system includes a phase comparator, an image synchronous signal generator, and a video encoder. The phase comparator receives a digital signal and a vertical synchronous signal and compares their period and phase to generate a clock correction signal, where the digital signal is converted from an analog signal through a voltage comparator (or the analog-to-digital conversion). The image synchronous signal generator receives the clock correction signal, generates the vertical synchronous signal, and adjusts a subsequent period of the vertical synchronous signal according to the clock correction signal. The video encoder receives the vertical synchronous signal and target image data and encodes them to output an analog encoded image data.

Abstract: A computer system with vertically offset hard disk drives has a space in one side for containing the two vertically offset hard disk drives held by a mobile rack in a vertically offset manner. The mobile rack fixes the two hard disk drives with two vertically offset screw sets. A holding frame in the space of the computer system has two vertically offset connectors that allow the two hard disk drives to be connected at the same time when the mobile rack is completely inserted into the holding frame.

Abstract: A computer system with vertically offset hard disk drives has a space in one side for containing the two vertically offset hard disk drives held by a mobile rack in a vertically offset manner. The mobile rack fixes the two hard disk drives with two vertically offset screw sets. A holding frame in the space of the computer system has two vertically offset connectors that allow the two hard disk drives to be connected at the same time when the mobile rack is completely inserted into the holding frame.

Abstract: An image output/input system includes a phase comparator, an image synchronous signal generator, a sensor timing generator, a sensor, an image/color processing unit, and a video encoder. The phase comparator receives a digital signal and a vertical synchronous signal and compares their period and phase to generate a clock correction signal. The image synchronous signal generator receives the clock correction signal and adjusts a subsequent period of the vertical synchronous signal according to the clock correction signal. The sensor timing generator receives the vertical synchronous signal and generates the sensor control timing, and the sensor receives the sensor control timing and generates raw image data. The image/color processing unit receives the raw image data and deals with the image and color process of the raw image data to generate target image data. The video encoder receives the vertical synchronous signal and the target image data and encodes them to generate analog encoded image data.