Patents by Inventor Chia-Ling Hsu

Chia-Ling Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10731147
    Abstract: The disclosure relates to methods for nucleic acid purification, comprising (a) combining a sample comprising at least one nucleic acid with a binding buffer comprising at least one magnetic particle and having a pH ranging from about 4 to about 10 to form a solution; (b) incubating the sample with the binding buffer for a time period sufficient to reversibly bind the at least one nucleic acid to the at least one magnetic particle to form at least one modified magnetic particle, (c) separating the at least one modified magnetic particle from the solution, (d) washing the at least one modified magnetic particle with at least one wash buffer; and (e) combining the at least one modified magnetic particle with an elution buffer Kits comprising these buffers and magnetic particles are also disclosed herein.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: August 4, 2020
    Assignee: Corning Incorporated
    Inventors: Yi-Cheng Hsieh, Cheng-I Hsu, Chia-Ling Wu, Hsan Jan Yen
  • Patent number: 10698638
    Abstract: A data transmission method for transmitting first data to a plurality of physical remote target devices by a host system is provided. The method includes: generating a transmission instruction to transmit the first data to a network interface controller of the host system; transforming the first data into a plurality of second data and respectively recording the plurality of second data in a plurality of memory addresses of a memory of the network interface controller; and instructing the plurality of physical remote target devices to acquire the plurality of second data respectively from the plurality of memory addresses of the memory. In addition, a host system using the data transmission method is also provided.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: June 30, 2020
    Assignee: Wiwynn Corporation
    Inventors: Pei-Ling Yu, Chia-Liang Hsu, Bing-Kun Syu
  • Patent number: 10688193
    Abstract: The invention provides a pH-sensitive linker that can simultaneously bind metallic nanoparticles and one or more agents with various molecular size. The linker of the invention can deliver the agents into cells involved in disease processes or close to cells so that the agents can selectively target and effect on the cells. The target delivery provided by the linker of the invention can be used for example for disease sensing, imaging, drug delivery, and therapy.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: June 23, 2020
    Assignee: GNT BIOTECH & MEDICALS CORPORATION
    Inventors: Yu-Jung Liao, Wei-Jan Huang, Chia-Nan Chen, Huan-Yu Lin, Ching-Yi Lin, Meng-Ju Tsai, Wan-Yi Hsu, Li-Ling Chi, Ye-Su Chao, Yi-Hong Wu
  • Publication number: 20200133018
    Abstract: A DOE module including a transparent substrate, a first electrode, a second electrode, a first sensing wire, a sensing layer, a DOE layer, and an insulating layer is provided. The first electrode is disposed on the transparent substrate, and the second electrode is disposed on the transparent substrate. The first sensing wire is distributed on the transparent substrate and electrically connected to the first electrode. The sensing layer is distributed on the transparent substrate and electrically connected to the second electrode. The first sensing wire is insulated from the sensing layer to form a capacitance between the first sensing wire and the sensing layer. The DOE layer is disposed on the transparent substrate. The insulating layer covers the first sensing wire and the sensing layer. The insulating layer has a first opening and a second opening respectively exposing the first electrode and the second electrode.
    Type: Application
    Filed: August 23, 2019
    Publication date: April 30, 2020
    Applicant: HIMAX TECHNOLOGIES LIMITED
    Inventors: Biing-Seng Wu, Han-Yi Kuo, Kuan-Ming Chen, Chih-Yu Chuang, Shi-Jen Wu, Jui-Ni Li, Cheng-Hung Tsai, Chin-Yuan Chiang, Chia-Ming Hsu, Chiau-Ling Huang
  • Publication number: 20200105346
    Abstract: Various embodiments of the present application are directed towards an integrated memory chip with an enhanced device-region layout for reduced leakage current and an enlarged word-line etch process window (e.g., enhanced word-line etch resiliency). In some embodiments, the integrated memory chip comprises a substrate, a control gate, a word line, and an isolation structure. The substrate comprises a first source/drain region. The control gate and the word line are on the substrate. The word line is between and borders the first source/drain region and the control gate and is elongated along a length of the word line. The isolation structure extends into the substrate and has a first isolation-structure sidewall. The first isolation-structure sidewall extends laterally along the length of the word line and underlies the word line.
    Type: Application
    Filed: May 1, 2019
    Publication date: April 2, 2020
    Inventors: Shih Kuang Yang, Ping-Cheng Li, Hung-Ling Shih, Po-Wei Liu, Wen-Tuo Huang, Yu-Ling Hsu, Yong-Shiuan Tsair, Chia-Sheng Lin
  • Publication number: 20200105775
    Abstract: Various embodiments of the present application are directed towards an integrated memory chip comprising a memory array with a strap-cell architecture that reduces the number of distinct strap-cell types and that reduces strap-line density. In some embodiments, the memory array is limited to three distinct types of strap cells: a source line/erase gate (SLEG) strap cell; a control gate/word line (CGWL) strap cell; and a word-line strap cell. The small number of distinct strap-cell types simplifies design of the memory array and further simplifies design of a corresponding interconnect structure. Further, in some embodiments, the three distinct strap-cell types electrically couple word lines, erase gates, and control gates to corresponding strap lines in different metallization layers of an interconnect structure. By spreading the strap lines amongst different metallization layers, strap-line density is reduced.
    Type: Application
    Filed: March 26, 2019
    Publication date: April 2, 2020
    Inventors: Wen-Tuo Huang, Ping-Cheng Li, Hung-Ling Shih, Po-Wei Liu, Yu-Ling Hsu, Yong-Shiuan Tsair, Chia-Sheng Lin, Shih Kuang Yang
  • Publication number: 20200098877
    Abstract: Various embodiments of the present application are directed towards a control gate layout to improve an etch process window for word lines. In some embodiments, an integrated chip comprises a memory array, an erase gate, a word line, and a control gate. The memory array comprises a plurality of cells in a plurality of rows and a plurality of columns. The erase gate and the word line are elongated in parallel along a row of the memory array. The control gate is elongated along the row and is between and borders the erase gate and the word line. Further, the control gate has a pad region protruding towards the erase gate and the word line. Because the pad region protrudes towards the erase gate and the word line, a width of the pad region is spread between word-line and erase-gate sides of the control gate.
    Type: Application
    Filed: January 16, 2019
    Publication date: March 26, 2020
    Inventors: Yu-Ling Hsu, Ping-Cheng Li, Hung-Ling Shih, Po-Wei Liu, Wen-Tuo Huang, Yong-Shiuan Tsair, Chia-Sheng Lin, Shih Kuang Yang
  • Patent number: 10491878
    Abstract: An image synthesizing method and system include capturing a first image using a first aperture, which corresponds to a first depth of field (DOF); capturing a second image using a second aperture, which corresponds to a second DOF and is different from the first aperture; and receiving the first image and the second image, on which an image processing is performed to obtain a synthesized image, which has a DOF being between the first DOF and the second DOF.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: November 26, 2019
    Assignee: Wistron Corporation
    Inventors: Yao-Tsung Chang, Chia Ling Hsu
  • Publication number: 20190300874
    Abstract: The disclosure relates to methods for nucleic acid purification, comprising (a) combining a sample comprising at least one nucleic acid with a binding buffer comprising at least one magnetic particle and having a pH ranging from about 4 to about 10 to form a solution; (b) incubating the sample with the binding buffer for a time period sufficient to reversibly bind the at least one nucleic acid to the at least one magnetic particle to form at least one modified magnetic particle, (c) separating the at least one modified magnetic particle from the solution, (d) washing the at least one modified magnetic particle with at least one wash buffer; and (e) combining the at least one modified magnetic particle with an elution buffer Kits comprising these buffers and magnetic particles are also disclosed herein.
    Type: Application
    Filed: June 18, 2019
    Publication date: October 3, 2019
    Inventors: Yi-Cheng Hsieh, Cheng-I Hsu, Chia-Ling Wu, Hsan Jan Yen
  • Publication number: 20190303046
    Abstract: A data transmission method for transmitting first data to a plurality of physical remote target devices by a host system is provided. The method includes: generating a transmission instruction to transmit the first data to a network interface controller of the host system; transforming the first data into a plurality of second data and respectively recording the plurality of second data in a plurality of memory addresses of a memory of the network interface controller; and instructing the plurality of physical remote target devices to acquire the plurality of second data respectively from the plurality of memory addresses of the memory. In addition, a host system using the data transmission method is also provided.
    Type: Application
    Filed: May 29, 2018
    Publication date: October 3, 2019
    Applicant: Wiwynn Corporation
    Inventors: Pei-Ling Yu, Chia-Liang Hsu, Bing-Kun Syu
  • Patent number: 10418513
    Abstract: A compound semiconductor device includes a substrate, including a top surface, a bottom surface, a side surface connecting the top surface and the bottom surface; and a semiconductor stack formed on the top surface, wherein the side surface includes a first deteriorated surface, a second deteriorated surface, a first crack surface between the first and second deteriorated surfaces, a second crack surface between the first deteriorated surface and the top surface, and a third crack surface between the second deteriorated surface and the bottom surface, wherein the first crack surface is inclined to the first deteriorated surface or the second deteriorated surface; and wherein the second crack surface or the third crack surface is substantially perpendicular to the top surface or the bottom surface.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: September 17, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Chia Chen Tsai, Chen Ou, Chi Ling Lee, Chi Shiang Hsu
  • Patent number: 10394518
    Abstract: An audio synchronization method includes: receiving a first audio signal from a first recording device; receiving a second audio signal from a second recording device; performing a correlation operation upon the first audio signal and the second audio signal to align a first pattern of the first audio signal and the first pattern of the second audio signal; after the first patterns of the first audio signal and the second audio signal are aligned, calculating a difference between a second pattern of the first audio signal and the second pattern of the second audio signal; and obtaining a starting-time difference between the first audio signal and the second audio signal for audio synchronization according to the difference between the second pattern of the first audio signal and the second pattern of the second audio signal.
    Type: Grant
    Filed: March 5, 2017
    Date of Patent: August 27, 2019
    Assignee: MEDIATEK INC.
    Inventors: Xin-Wei Shih, Chia-Ying Li, Chao-Ling Hsu, Yiou-Wen Cheng, Shen-Kai Chang
  • Patent number: 10364428
    Abstract: The disclosure relates to methods for nucleic acid purification, comprising (a) combining a sample comprising at least one nucleic acid with a binding buffer comprising at least one magnetic particle and having a pH ranging from about 4 to about 10 to form a solution; (b) incubating the sample with the binding buffer for a time period sufficient to reversibly bind the at least one nucleic acid to the at least one magnetic particle to form at least one modified magnetic particle, (c) separating the at least one modified magnetic particle from the solution, (d) washing the at least one modified magnetic particle with at least one wash buffer; and (e) combining the at least one modified magnetic particle with an elution buffer Kits comprising these buffers and magnetic particles are also disclosed herein.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: July 30, 2019
    Assignee: Corning Incorporated
    Inventors: Yi-Cheng Hsieh, Cheng-I Hsu, Chia-Ling Wu, Hsan-Jan Yen
  • Publication number: 20190155772
    Abstract: A processing method of data redundancy is utilized for a Non-Volatile Memory express (NVMe) to transfer data via a fabric channel from a host terminal to a Remote-direct-memory-access-enable Network Interface Controller (RNIC) and a Just a Bunch of Flash (JBOF). The processing method comprises virtualizing a Field Programmable Gate Array (FPGA) of the RNIC into a Dynamic Random Access Memory (DRAM) and storing the data to the DRAM; replicating or splitting the data into a plurality of data packets and reporting a plurality of virtual memory addresses corresponding to the plurality of data packets to the RNIC by the FPGA; and reading and transmitting the plurality of data packets to a plurality of corresponding NVMe controllers according to the plurality of virtual memory addresses; wherein the FPGA reports to the RNIC that a memory size of the FPGA is larger than that of the DRAM.
    Type: Application
    Filed: April 11, 2018
    Publication date: May 23, 2019
    Inventors: Pei-Ling Yu, Chia-Liang Hsu, Bing-Kun Syu
  • Patent number: 9475240
    Abstract: A manufacturing device includes a feeder, a first pressing roller, a second pressing roller, a third pressing roller, a transmission assembly, and a driving assembly. The first pressing roller and the second pressing roller cooperatively press a hot melt adhesive from the feeder to obtain a preprocessed light guide plate. A temperature of the second pressing roller is lower than a temperature of the hot melt adhesive. The third pressing roller separates the preprocessed light guide plate from the second pressing roller to obtain a light guide plate. The transmission assembly connects the second pressing roller and the third pressing roller. The driving element is connected to the transmission assembly, and drives the transmission assembly to rotate the third pressing roller around the second pressing roller, and thus adjusting a contact area and a contact time between the light guide plate and the second pressing roller.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: October 25, 2016
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Chia-Ling Hsu
  • Publication number: 20160278174
    Abstract: A light-emitting device includes an insulating carrier; a light-emitting array formed on the insulating carrier including a first light-emitting circuit having a first light-emitting unit, wherein the first light-emitting circuit is a one-way circuit, a second light-emitting circuit having a second light-emitting unit, wherein the second light-emitting circuit is a one-way circuit, a first conductive layer, a second conductive layer, and a third conductive layer, wherein the first light-emitting circuit is formed between the first conductive layer and the second conductive layer and connects with them electrically, the second light-emitting circuit is formed between the second conductive layer and the third conductive layer and connects with them electrically, wherein an area of the second conductive layer is greater or equal to 1.9×103 ?m2.
    Type: Application
    Filed: June 2, 2016
    Publication date: September 22, 2016
    Inventors: Chao Hsing CHEN, Alexander Chang WANG, Chia-Ling HSU
  • Patent number: 9234289
    Abstract: A method for manufacturing a molding core includes: providing a cylindrical roller having a circumference surface coated with a first film layer; coating a second film layer on the first film layer; coating a preprocessed molding film on the second film layer; engraving a number of molding patterns on the preprocessed molding film to obtain a molding film; separating the molding film from the roller and spreading out the molding film to be a flat plate; and manufacturing the molding core using the molding film by electroforming method.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: January 12, 2016
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Chia-Ling Hsu
  • Patent number: 9188704
    Abstract: A method of manufacturing an optical film includes: providing a template; coating an aluminum film on one surface of the template; electrolyzing the aluminum film and generating a plurality of regular microstructures on the aluminum film; providing a substrate; transferring the microstructures of the template to the substrate to form a plurality of microstructures on the substrate; and modifying the surfaces of the microstructures of the substrate to obtain a layer containing hydrophobic functional groups on the surfaces of the microstructures of the substrate.
    Type: Grant
    Filed: December 23, 2012
    Date of Patent: November 17, 2015
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Chia-Ling Hsu
  • Patent number: 9030447
    Abstract: A surface acoustic wave touch panel includes a flexible substrate, an acoustic wave transmitting layer, an adhering layer, a piezoelectricity layer, and an electrode layer. The acoustic wave transmitting layer is made of nano-diamond and formed on the flexible substrate. The adhering layer is formed on the acoustic wave transmitting layer. The piezoelectricity layer is formed on the acoustic wave transmitting layer in an interdigitated electrode pattern. The electrode layer is formed on the piezoelectricity layer. A method of manufacturing the surface acoustic wave touch panel is also provided.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: May 12, 2015
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Chia-Ling Hsu
  • Publication number: 20140363533
    Abstract: A manufacturing device includes a feeder, a first pressing roller, a second pressing roller, a third pressing roller, a transmission assembly, and a driving assembly. The first pressing roller and the second pressing roller cooperatively press a hot melt adhesive from the feeder to obtain a preprocessed light guide plate. A temperature of the second pressing roller is lower than a temperature of the hot melt adhesive. The third pressing roller separates the preprocessed light guide plate from the second pressing roller to obtain a light guide plate. The transmission assembly connects the second pressing roller and the third pressing roller. The driving element is connected to the transmission assembly, and drives the transmission assembly to rotate the third pressing roller around the second pressing roller, and thus adjusting a contact area and a contact time between the light guide plate and the second pressing roller.
    Type: Application
    Filed: August 23, 2013
    Publication date: December 11, 2014
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: CHIA-LING HSU