Abstract: A method for displaying error rates of data channels of a display is provided. A timing controller of the display repeatedly transmits a test signal with a specific format to a first and a second source drivers of the display via a first and a second data channels of the display. During testing, a first number and a second number of times of the first source driver and the second source driver determining that the received test signal does not have the specific format are counted respectively. The first and the second source drivers control displaying of a first area and a second area of a panel of the display respectively according to the counted first and second numbers of times. Accordingly, the error rates of the data channels are presented on the panel of the display in a way that the error rates could be recognized more easily.

Abstract: An antenna module includes a substrate, a main radiation structure, a strip-shaped radiation structure, a grounding structure, a shorting structure, a parasitic radiation structure and a metal radiation member. An acute angle is included between a first edge of the main radiation structure and a longitudinal edge of the substrate. The main radiation structure has a signal feeding portion and a connecting portion. The strip-shaped radiation structure is extended from a second edge of the main radiation structure. The shorting structure is U-shaped. A first end of the shorting structure is connected to the signal feeding portion and a second end of the shorting structure is connected to the grounding structure. The parasitic radiation structure is extended from the grounding structure and parallel to the first edge. A constant distance is between the parasitic radiation structure and the first edge. The metal radiation member is connected to the connecting portion.

Abstract: A flat panel display with multi-drop interfaces is disclosed. The flat panel display with multi-drop interfaces includes a plurality of driver chips having a plurality of respective hardware setting values via a hardware setting, and a timing controller for transmitting at least one signal to the plurality of driver chips via at least one multi-drop interface, wherein the timing controller and a specific driver chip among the plurality of driver chips negotiate with each other according to a corresponding specific respective hardware setting value among the plurality of respective hardware setting values.

Abstract: A mobile communication device including a system ground plane, an antenna, a signal distributor, a transceiver and a sensing controller is provided. The antenna converts an electromagnetic wave to a radio-frequency signal. Besides, the antenna and the system ground plane form a sensing capacitor to detect an object and generate a detecting signal accordingly. The signal distributor is electrically connected to the antenna through a first connection terminal and a second connection terminal and guides the radio-frequency signal and the detecting signal from the antenna to a third connection terminal and a fourth connection terminal. The transceiver is electrically connected to the third connection terminal and processes the radio-frequency signal. The sensing controller is electrically connected to the fourth connection terminal and determines whether the object exists around the antenna according to the sensing signal.

Abstract: An antenna module is provided. The antenna module includes a first ground element, a body, a radiator and a parasitic element. The body is electrically connected to the first ground element. The radiator is connected to the body, wherein the radiator includes an extending portion, a bending portion and a terminal portion, and the bending portion is connected to the extending portion, and the terminal portion is connected to the bending portion. The parasitic element includes a parasitic extending portion and a parasitic conductive portion, wherein the parasitic extending portion is connected to the parasitic conductive portion, and the terminal portion and the parasitic extending portion is located on a same straight line, and the terminal portion is separated from the parasitic extending portion.

Abstract: A drug carrier is provided with a structure of a lipid shell enclosing aqueous micelles. The lipid shell includes lipid and emulsifier, in which the emulsifier encloses the lipid. The components of the aqueous micelles are phospholipids and amphiphilic chitosan, and the aqueous micelles enclose an aqueous solution containing a drug. Furthermore, the method of preparing the drug carrier is also provided. Therefore, with the pharmaceutical advantages of lipid-based nanoparticle included low drug leakage and the ability of to overcome the multiple drug resistance, this new formulation were further incorporated with the chitosan and featured with high payload efficiency. The features could enhance intracellular concentration of anti-cancer drug and oral bioavailability.

Abstract: A data transmission device includes a data division unit for receiving an original transmission data and dividing the original transmission data into a plurality of division data; a data generation unit for generating a plurality of packet data according to the plurality of division data and a plurality of clock data, wherein each of the clock data is a multi-bit data; and a data output unit for outputting the plurality of packet data to a data reception device; where each of the packet data includes a division data and a clock data, each of the packet data corresponds to a packet data period, and the division data corresponds to a division data period of the packet data period and the clock data corresponds to a clock period of the packet data period.

Abstract: A method of transporting data with embedded clock including following steps is provided. In an initial stage, a first bit length and a second bit length are determined. Original data is received. The original data is packed with every N bits as a packet, where N is at least 4. It is analyzed whether a long-run length of long-run data with consecutive same bit data in the packet is greater than N/2. The packet is coded to embed clock/toggle information with the first bit length into the packet. The clock/toggle information determines whether the long-run data is toggled. An appearance frequency of the clock/toggle information is clock information. If the long-run length is not greater than N/2, the long-run data is not toggled. If the long-run length is greater than N/2, bit with the second bit length after an Lth bit of the long-run data is toggled.

Abstract: An antenna module includes a substrate, a main radiation structure, a strip-shaped radiation structure, a grounding structure, a shorting structure, a parasitic radiation structure and a metal radiation member. An acute angle is included between a first edge of the main radiation structure and a longitudinal edge of the substrate. The main radiation structure has a signal feeding portion and a connecting portion. The strip-shaped radiation structure is extended from a second edge of the main radiation structure. The shorting structure is U-shaped. A first end of the shorting structure is connected to the signal feeding portion and a second end of the shorting structure is connected to the grounding structure. The parasitic radiation structure is extended from the grounding structure and parallel to the first edge. A constant distance is between the parasitic radiation structure and the first edge. The metal radiation member is connected to the connecting portion.

Abstract: An amplifier circuit with overshoot suppress scheme including an input amplifier, an output amplifier, and a diode is provided. A first and a second input ends of the output amplifier are coupled to a differential output pair of the input amplifier. The diode is coupled between an output end and the first input end of the output amplifier. When the voltage difference between the output and the input ends of the output amplifier is greater then the barrier voltage of the diode, the diode is turned on, so that the output end of the output amplifier is coupled to the input end of the output amplifier. In the transient state, it rapidly smoothes the overshoot signal. In the steady state, the diode is cut off to maintain the normal operation of the operational amplifier.

Abstract: Circuits and methods for transmitting and receiving small swing differential voltage data to and from a memory are described. A plurality of memory cells is formed in arrays within a plurality of memory banks. Each memory bank is coupled to a pair of small swing differential voltage global bit lines that extend across the memory. A small signal write driver circuit is coupled to the global bit lines and configured to output a small signal differential voltage on the global bit lines during write cycles. A global sense amplifier is coupled to the global bit line pairs and configured to output a full swing voltage on a data line during a read cycle. Methods for providing small swing global bit line signals to memory cells are disclosed. The use of small swing differential voltage signals across the memory reduces power consumption and shortens memory cycle time.

Abstract: An amplifier circuit with overshoot suppress scheme including an input amplifier, an output amplifier, and a diode is provided. A first and a second input ends of the output amplifier are coupled to a differential output pair of the input amplifier. A first end of the diode is coupled to an output end of the output amplifier. A second end of the diode is coupled to the first input end of the output amplifier. When the voltage difference between the output and the input ends of the output amplifier is greater then the barrier voltage of the diode, the diode is turned on, so that the output end of the output amplifier is coupled to the input end of the output amplifier. In the transient state, it rapidly smoothes the overshoot signal. In the steady state, the diode is cut off to maintain the normal operation of the operational amplifier.

Abstract: A coupling isolation method for preventing a load signal from coupling into an operational amplifier is disclosed. The coupling isolation method includes generating a system signal before the operational amplifier outputs a computation result, switching off a Miller compensation signal path of the operational amplifier at a first time point according to the system signal, and electrically connecting an output end of the operational amplifier and a load at a second time point according to the system signal to output the computation result.

Abstract: A coupling isolation method for preventing a load signal from coupling into an operational amplifier is disclosed. The coupling isolation method includes generating a system signal before the operational amplifier outputs a computation result, switching off a Miller compensation signal path of the operational amplifier at a first time point according to the system signal, and electrically connecting an output end of the operational amplifier and a load at a second time point according to the system signal to output the computation result.

Abstract: A two-channel operational amplifier circuit includes a first operational amplifier and a second operational amplifier. In a first frame period, the two-channel operational amplifier circuit switches a first input stage, a first gain stage and a first output stage to work between a working voltage and a half working voltage, and switches a second input stage, a second gain stage and a second output stage to work between the half working voltage and a ground voltage. In a second frame period, the two-channel operational amplifier circuit switches the second input stage and the second gain stage to work between the working voltage and the half working voltage, and switches the first input stage and the first gain stage to work between the half working voltage and the ground voltage.

Abstract: An amplifier circuit with overshoot suppress scheme including an input amplifier, an output amplifier, and a diode is provided. A first and a second input ends of the output amplifier are coupled to a differential output pair of the input amplifier. A first end of the diode is coupled to an output end of the output amplifier. A second end of the diode is coupled to the first input end of the output amplifier. When the voltage difference between the output and the input ends of the output amplifier is greater then the barrier voltage of the diode, the diode is turned on, so that the output end of the output amplifier is coupled to the input end of the output amplifier. In the transient state, it rapidly smoothes the overshoot signal. In the steady state, the diode is cut off to maintain the normal operation of the operational amplifier.

Abstract: Circuits and methods for transmitting and receiving small swing differential voltage data to and from a memory are described. A plurality of memory cells is formed in arrays within a plurality of memory banks. Each memory bank is coupled to a pair of small swing differential voltage global bit lines that extend across the memory. A small signal write driver circuit is coupled to the global bit lines and configured to output a small signal differential voltage on the global bit lines during write cycles. A global sense amplifier is coupled to the global bit line pairs and configured to output a full swing voltage on a data line during a read cycle. Methods for providing small swing global bit line signals to memory cells are disclosed. The use of small swing differential voltage signals across the memory reduces power consumption and shortens memory cycle time.