Patents by Inventor CHIA-YU PENG

CHIA-YU PENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220068832
    Abstract: An integrated circuit (IC) package structure includes a chip, a redistribution layer (RDL) structure, a molding compound structure and an electromagnetic interference (EMI) shielding structure. The RDL structure is formed on the chip and electrically connected thereto. The molding compound layer is provided on outer surfaces of the chip and the RDL structure. The EMI shielding structure is provided on outer surfaces of the molding compound structure. The molding compound structure layer provided on outer surfaces of the chip and the RDL structure provide protection and reinforcement to multiple faces of the IC package structure; and the EMI shielding structure provided on outer surfaces of the molding compound structure provides EMI protection to multiple faces of the chip and the RDL structure. The IC package structure has upgraded structural strength, reliability and stability in use. A method of manufacturing the above IC package structure is also introduced.
    Type: Application
    Filed: November 2, 2020
    Publication date: March 3, 2022
    Inventors: KAI-MING YANG, CHIA-YU PENG, JOHN HON-SHING LAU
  • Publication number: 20220069489
    Abstract: A circuit board structure, including a redistribution circuit structure layer, a build-up circuit structure layer, and a connection structure layer, is provided. The redistribution circuit structure layer includes multiple first connecting pads. The build-up circuit structure layer is disposed on one side of the redistribution circuit structure layer and includes multiple second connecting pads. A line width and a line spacing of the redistribution circuit structure layer are smaller than a line width and a line spacing of the build-up circuit structure layer. The connection structure layer is disposed between the redistribution circuit structure layer and the build-up circuit structure layer, and includes a substrate and multiple conductive paste pillars penetrating the substrate. The first connecting pads are electrically connected to the second connecting pads respectively through the conductive paste pillars.
    Type: Application
    Filed: May 13, 2021
    Publication date: March 3, 2022
    Applicant: Unimicron Technology Corp.
    Inventors: John Hon-Shing Lau, Chia-Yu Peng, Kai-Ming Yang, Pu-Ju Lin, Cheng-Ta Ko, Tzyy-Jang Tseng