Abstract: A gate structure includes a gate and a first isolation structure having a top surface and a bottom surface. The gate includes a first sidewall adjacent to the first isolation structure, a second sidewall, a first horizontal surface adjacent to a bottom edge of the first sidewall and a bottom edge of the second sidewall, the first horizontal surface being between the top surface of the first isolation structure and the bottom surface of the first isolation structure. The gate also includes a second horizontal surface adjacent to a top edge of the second sidewall. An effective channel width defined by the gate structure includes a height of the second sidewall and a width of the second horizontal surface.

Abstract: A semiconductor structure includes a semiconductive substrate including a first side and a second side opposite to the first side, a radiation sensing device disposed in the semiconductive substrate, and an ILD disposed over the first side of the semiconductive substrate, and a conductive pad disposed within the semiconductive substrate and the ILD, and electrically connected to an interconnect structure. A top surface of the conductive pad is between the first side of the semiconductive substrate and the second side of the semiconductor substrate.

Abstract: The present disclosure is directed to anchor structures and methods for forming anchor structures such that planarization and wafer bonding can be uniform. Anchor structures can include anchor layers formed on a dielectric layer surface and anchor pads formed in the anchor layer and on the dielectric layer surface. The anchor layer material can be selected such that the planarization selectivity of the anchor layer, anchor pads, and the interconnection material can be substantially the same as one another. Anchor pads can provide uniform density of structures that have the same or similar material.

Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a device layer and a trench isolation. The semiconductor substrate has a front side surface and a back side surface opposite to the front side surface. The radiation sensing member is disposed in a photosensitive region of the semiconductor substrate and extends from the front side surface of the semiconductor substrate. The radiation sensing member includes a semiconductor material with an optical band gap energy smaller than 1.77 eV. The device layer is over the front side surface of the semiconductor substrate and the radiation sensing member. The trench isolation is disposed in an isolation region of the semiconductor substrate and extends from the back side surface of the semiconductor substrate.

Abstract: The present disclosure relates to a CMOS image sensor, and an associated method of formation. In some embodiments, the CMOS image sensor comprises a floating diffusion region disposed at one side of a transfer gate within a substrate and a photo detecting column disposed at the other side of the transfer gate opposing to the floating diffusion region within the substrate. The photo detecting column comprises a doped sensing layer with a doping type opposite to that of the substrate. The photo detecting column and the substrate are in contact with each other at a junction interface comprising one or more recessed portions. By forming the junction interface with recessed portions, the junction interface is enlarged compared to a previous p-n junction interface without recessed portions, and thus a full well capacity of the photodiode structure is improved.

Abstract: A semiconductor structure is provided. A first semiconductor device includes a first conductive layer formed over a first substrate; a first etching stop layer formed over the first conductive layer, and the first etching stop layer is in direct contact with the first conductive layer. A first bonding layer is formed over the first etching stop layer, and a first bonding via is formed through the first bonding layer and the first etching stop layer. The semiconductor structure includes a second semiconductor device. The second semiconductor device includes a second bonding layer formed over the second etching stop layer and a second bonding via formed through the second bonding layer and a second etching stop layer. A bonding structure between the first substrate and the second substrate, and the bonding structure includes the first bonding via bonded to the second bonding via.

Abstract: A semiconductor structure includes a semiconductive substrate includes a first side and a second side opposite to the first side, a radiation sensing device disposed in the semiconductive substrate, an interlayer dielectric (ILD) disposed over the first side of the semiconductive substrate, and a conductive pad disposed in the semiconductive substrate and the ILD, wherein a thickness of the conductive pad is less than a sum of a thickness of the semiconductive substrate and a thickness of the ILD.

Abstract: A method of manufacturing a semiconductor structure includes receiving a substrate and an interlayer dielectric (ILD) over the substrate; bonding the substrate and the ILD over a carrier substrate; forming a recessed portion extended through the substrate and the ILD; disposing a conductive material into the recessed portion; and removing the carrier substrate, wherein the conductive material is in contact with the ILD and is separated from the substrate.

Abstract: A photodetector includes: a substrate having a first doping type; a first semiconductor region having a second doping type, the first semiconductor region extending into the substrate from a front side of the substrate; and a second semiconductor region having the first doping type, the second semiconductor region further extending into the substrate from a bottom boundary of the first semiconductor region, wherein when the photodetector operates under a Geiger mode, the second semiconductor region is fully depleted to absorb a radiation source received from a back side of the substrate.

Abstract: A semiconductor structure includes a semiconductive substrate includes a first side and a second side opposite to the first side, a radiation sensing device disposed in the semiconductive substrate, an interlayer dielectric (ILD) disposed over the first side of the semiconductive substrate, and a conductive pad disposed in the semiconductive substrate and the ILD, wherein a thickness of the conductive pad is less than a sum of a thickness of the semiconductive substrate and a thickness of the ILD.

Abstract: A gate structure includes a gate and a first isolation structure having a top surface and a bottom surface. The gate includes a first sidewall adjacent to the first isolation structure, a second sidewall, a first horizontal surface adjacent to a bottom edge of the first sidewall and a bottom edge of the second sidewall, the first horizontal surface being between the top surface of the first isolation structure and the bottom surface of the first isolation structure. The gate also includes a second horizontal surface adjacent to a top edge of the second sidewall. An effective channel width defined by the gate structure includes a height of the second sidewall and a width of the second horizontal surface.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a light sensing feature, a negative oxide layer, a gate dielectric layer and a transfer gate. The light sensing feature is configured in the substrate to detect an incoming radiation. The negative oxide layer is over the light sensing feature. The gate dielectric layer is over the negative oxide layer. The transfer gate is over the gate dielectric layer.

Abstract: An image sensor including a substrate, a trench isolation, a plurality of image sensing units, at least one phase detection unit, and an interconnection layer is provided. The trench isolation is in the substrate, and a plurality of active areas of the substrate are separated from each other by the trench isolation. The image sensing units and the at least one phase detection unit are in the active areas arranged in an array, and a sensing area of the at least one phase detection unit is smaller than a sensing area of each of the image sensing units. The interconnection layer is disposed on the image sensing units and the at least one phase detection unit. In addition, a method of fabricating an image sensor is also provided.

Abstract: A method of manufacturing a semiconductor structure includes receiving a substrate and an interlayer dielectric (ILD) over the substrate; bonding the substrate and the ILD over a carrier substrate; forming a recessed portion extended through the substrate and the ILD; disposing a conductive material into the recessed portion; and removing the carrier substrate, wherein the conductive material is in contact with the ILD and is separated from the substrate.

Abstract: A semiconductor structure includes a semiconductive substrate includes a first side and a second side opposite to the first side, a radiation sensing device disposed in the semiconductive substrate, an interlayer dielectric (ILD) disposed over the first side of the semiconductive substrate, and a conductive pad passing through the ILD, disposed in the semiconductive substrate and configured to couple with an interconnect structure disposed over the ILD, wherein a portion of the conductive pad is surrounded by the semiconductive substrate, and a step height is configured by a surface of the portion of the conductive pad and the second side of the semiconductive substrate.

Abstract: An image sensor including a substrate, a trench isolation, a plurality of image sensing units, at least one phase detection unit, and an interconnection layer is provided. The trench isolation is in the substrate, and a plurality of active areas of the substrate are separated from each other by the trench isolation. The image sensing units and the at least one phase detection unit are in the active areas arranged in an array, and a sensing area of the at least one phase detection unit is smaller than a sensing area of each of the image sensing units. The interconnection layer is disposed on the image sensing units and the at least one phase detection unit. In addition, a method of fabricating an image sensor is also provided.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a light sensing feature, a negative oxide layer, a gate dielectric layer and a transfer gate. The light sensing feature is configured in the substrate to detect an incoming radiation. The negative oxide layer is over the light sensing feature. The gate dielectric layer is over the negative oxide layer. The transfer gate is over the gate dielectric layer.

Abstract: A backside illuminated CMOS image sensor and a manufacturing method thereof are provided. Embedded micro-lenses disposed respectively on concave surfaces of a buffer oxide layer, wherein the concave surfaces are positioned to respectively align with photodiodes of pixel array of the CMOS image sensor. The embedded micro-lenses can confine incident light to the photodiodes to reduce optical crosstalk between adjacent pixels.

Abstract: A semiconductor image sensor device having a conformal protective layer includes a semiconductor substrate a pixel-array region and a peripheral region. The conformal protective layer is disposed over a plurality of pixels having a photodiode and a plurality of transistors in the pixel-array region. Contacts to the plurality of transistors are surrounded by the conformal protective layer. In some embodiments, the conformal protective layer is the same material as transistor gate spacers in the peripheral region.

Abstract: An image sensor device is provided, and includes pixel units. Each of the pixel units includes a light sensing element, a first transistor and a second transistor. The first transistor is coupled to the light sensing element. The second transistor is coupled to the light sensing element and the first transistor. The first transistor includes a first gate structure having a first width, and the second transistor includes a second gate structure having a second width, in which a distance between the first gate structure and the second gate structure is substantially greater than the first width and the second width.