Abstract: A memory device is provided. The memory device includes a memory cell array having a plurality of memory cells arranged in a matrix of a plurality of rows and a plurality of columns. Each of the plurality of columns include a first plurality of memory cells connected to a first bit line and a second bit line. A pre-charge circuit is connected to the memory cell array. The pre-charge circuit pre-charges each of the first bit line and the second bit line from a first end. A pre-charge assist circuit is connected to the memory cell array. The pre-charge assist circuit pre-charges each of the first bit line and the second bit line from a second end, the second end being opposite the first end.

Abstract: A semiconductor package includes a first connection die including a semiconductor substrate and an interconnect structure, and a first die stack disposed on the first connection die and including stacked dies, each of the stacked dies including a semiconductor substrate and an interconnect structure including a first connection line that is electrically connected to the interconnect structure of the first connection die. An angle formed between a plane of the first connection die and a plane of each stacked die ranges from about 45° to about 90°.

Abstract: A three-dimensional device structure includes a first die including a first semiconductor substrate, a second die disposed on the first die and including a second semiconductor substrate, a dielectric encapsulation (DE) layer disposed on the first die and surrounding the second die, a redistribution layer structure disposed on the second die and the DE layer, and an integrated passive device (IPD) formed within in the DE layer and electrically connected to the first die and the redistribution layer structure.

Abstract: A semiconductor package includes: a first die; a second die stacked on an upper surface of the first die, the second die including a second semiconductor substrate and a second seal ring structure that extends along a perimeter of the second semiconductor substrate; a third die stacked on the upper surface of the first die, the third die including a third semiconductor substrate and a third seal ring structure that extends along a perimeter of the third semiconductor substrate; and a connection circuit that extends through the second seal ring structure and the third seal ring structure, in a lateral direction perpendicular to the stacking direction of the first die and the second die, to electrically connect the second semiconductor substrate and the third semiconductor substrate.

Abstract: A touch control circuit for use in a display device includes: a plurality of analog-to-digital converters and a controller. Each of the analog-to-digital converters is coupled to at least one of a plurality of touch sensing electrodes and at least one of a plurality of source drivers of the display device. At least one of the analog-to-digital converters is configured to generate a first measured digital code according to an output voltage outputted by at the least one of the source drivers. The controller is coupled to the analog-to-digital converters, and configured to compare the first measured digital code with an input digital code that the output voltage of the at the least one of the source drivers corresponds to, thereby to generate a first safety detection result regarding the at least one of the source drivers.

Abstract: A method for training a segmentation model is provided. The method includes using first training images to train a segmentation model. The method includes using second training images to train an image generator. The method includes inputting real images into the segmentation model to generate predicted annotation images. The method includes inputting the predicted annotation images into the image generator to generate fake images. The method includes updating the segmentation model and the image generator according to a loss caused by differences between the real images and the fake images.

Abstract: A semiconductor device includes a semiconductor layered structure, an electrode unit, and an anti-adsorption layer. The electrode unit is disposed on an electrode connecting region of the semiconductor layered structure, and is a multi-layered structure. The anti-adsorption layer is disposed on a top surface of the electrode unit opposite to the semiconductor layered structure. Also disclosed herein is a light-emitting system including the semiconductor device.

Abstract: A semiconductor die includes a first semiconductor substrate; a first interconnect structure disposed on a front side of the first semiconductor substrate; a first through-substrate via (TSV) structure extending through the first semiconductor substrate; and a first fuse structure disposed between and electrically connecting the TSV structure and the first interconnect structure.

Abstract: A three-dimensional device structure includes a first die, a second die disposed on the first die, and a connection circuit. The first die includes a first semiconductor substrate, a first interconnect structure disposed on the first semiconductor substrate, and a first seal ring surrounding the interconnect structure. The second die includes a second semiconductor substrate, a second interconnect structure disposed on the second semiconductor substrate, and a second seal ring surrounding the interconnect structure. The first connection circuit electrically couples the first seal ring to the second seal ring to provide an electrostatic discharge path.

Abstract: A die includes: a semiconductor substrate; an interconnect structure disposed on the semiconductor substrate and including: inter-metal dielectric (IMD) layers; metal features embedded in the IMD layers; and a guard ring structure including concentric first and second guard rings that extend through at least a subset of the IMD layers; and a through silicon via (TSV) structure extending through the semiconductor substrate and the subset of IMD layers to electrically contact one of the metal features. The first guard ring surrounds the TSV structure; and the second guard ring surrounds the first guard ring and is configured to reduce a parasitic capacitance between the guard ring structure and the TSV structure.

Abstract: A method for forming a semiconductor structure includes receiving a die; forming a dielectric layer to surround the die; removing a portion of the dielectric layer to form a first recess; disposing a first light blocking layer within the first recess; applying a dielectric paste over the first light blocking layer; removing a portion of the dielectric paste to form a second recess; disposing a second light blocking layer within the second recess; disposing a photoelectric device over the first light blocking layer and the second light blocking layer; forming a redistribution layer over the die, the dielectric layer and the photoelectric device; removing a portion of the redistribution layer to form a third recess over the photoelectric device; and coupling a light-conducting member to the photoelectric device through the third recess; wherein the second light blocking layer is separated from the first light blocking layer and the photoelectric device.

Abstract: A telehealth movable vehicle is provided. The telehealth movable vehicle includes a movable part, a fixed member, a slidable member, a bracket, a video/audio transceiver module, and a telescopic rod. The fixed member is affixed to the movable part, and has a guide rail. The slidable member is movably connected to the guide rail. The bracket is affixed to the slidable member. The video/audio transceiver module is disposed on the bracket. The telescopic rod is connected to the fixed member and the slidable member. The telescopic rod is configured to drive the slidable member to move along the guide rail relative to the fixed member.

Abstract: A three-dimensional device structure includes a first die including a first semiconductor substrate, a second die disposed on the first die and including a second semiconductor substrate, a dielectric encapsulation (DE) layer disposed on the first die and surrounding the second die, a redistribution layer structure disposed on the second die and the DE layer, and an integrated passive device (IPD) embedded in the DE layer and electrically connected to the first die and the redistribution layer structure.

Abstract: A moat trench laterally surrounding a device region is formed in a substrate. A conductive metallic substrate enclosure structure is formed in the moat trench. Deep trenches are formed in the substrate, and a trench capacitor structure is formed in the deep trenches. The substrate may be thinned by removing a backside portion of the substrate. A backside surface of the conductive metallic substrate enclosure structure is physically exposed. A backside metal layer is formed on a backside surface of the substrate and a backside surface of the conductive metallic substrate enclosure structure. A metallic interconnect enclosure structure and a metallic cap plate may be formed to provide a metallic shield structure configured to block electromagnetic radiation from impinging into the trench capacitor structure.

Abstract: A damper device and an electronic apparatus are provided. The damper device includes a first holder, a first damper component and a first gel. The first damper component includes a first protrusion part and a first bar part. The first protrusion part includes a first surface. The first bar part includes a first free end and a first fixed end. The first protrusion part is fixed on the first free end, the first fixed end is fixed on the first holder and the first surface protrudes outward from the first free end. The first free end and the first protrusion part are inserted into the first gel, and the first gel moves along the radial direction of the first bar part relative to the first bar part.

Abstract: An embodiment of the invention provides an electrocardiography (ECG) signal processing device. The ECG signal processing device includes a first part, a second part and a flexible printed circuit board. The first part may comprise a first electrode and a processing circuit. The second part includes a second electrode. The flexible printed circuit board is coupled to the first part and the second part to fold the first part and the second part. When a closed loop is formed between the first electrode and the second electrode, the processing circuit obtains an ECG signal from the user.

Abstract: A semiconductor device includes a first semiconductor die, a second semiconductor die including a side surface bonded to the first semiconductor die, such that the second semiconductor die is perpendicular to the first semiconductor die, and a junction circuit for connecting the first semiconductor die to the second semiconductor die.

Abstract: A deep trench capacitor includes at least one deep trench and a layer stack including at least three metallic electrode layers interlaced with at least two node dielectric layers and continuously extending over the top surface of a substrate and into each of the at least one deep trench. A contact-level dielectric layer overlies the substrate and the layer stack. Contact assemblies extend through the contact-level dielectric layer. A subset of the contact assemblies vertically extend through a respective metallic electrode layer. For example, a first contact assembly includes a first tubular insulating spacer that laterally surrounds a first contact via structure and contacts a cylindrical sidewall of a topmost metallic electrode layer.