Patents by Inventor Chia-Yun Chen
Chia-Yun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250142917Abstract: A composite structure includes a dielectric layer, a two-dimensional graphene layer and a carbon quantum dot film. The dielectric layer is disposed on a first surface of a silicon substrate. The two-dimensional graphene layer is disposed on the dielectric layer. The carbon quantum dot film is disposed on the two-dimensional graphene layer.Type: ApplicationFiled: December 14, 2023Publication date: May 1, 2025Applicant: National Cheng Kung UniversityInventors: Chia-Yun CHEN, Zhe-Hao LIU, Kuan-Han LIN, Jheng-Yi LI
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Publication number: 20240414931Abstract: An organic/inorganic composite structure includes a silicon substrate and a conductive polymer layer. The silicon substrate includes a plurality of microstructures disposed on a surface of the silicon substrate. The conductive polymer layer is disposed on the plurality of microstructures. A spaced distance is between the conductive polymer layer and the surface of the silicon substrate.Type: ApplicationFiled: July 28, 2023Publication date: December 12, 2024Applicant: National Cheng Kung UniversityInventors: Chia-Yun Chen, Jheng-Yi Li, Tsung-Yen Wu
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Patent number: 12114573Abstract: A method for manufacturing a thermoelectric polymer film includes steps as follows. A conductive polymer liquid and a plurality of carbon nanotubes are mixed to form a mixture. The mixture is coated on a substrate to form a film precursor. Two electrode parts are arranged on the film precursor. An electric field is applied to the film precursor through the two electrode parts at a room temperature, so as to change an arrangement of the plurality of carbon nanotubes, such that the thermoelectric polymer film is formed.Type: GrantFiled: March 3, 2022Date of Patent: October 8, 2024Assignee: National Cheng Kung UniversityInventors: Chia-Yun Chen, Kuan-Yi Kuo, Po-Hsuan Hsiao, Yi-Yin Lin
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Publication number: 20230270008Abstract: A method for manufacturing a thermoelectric polymer film includes steps as follows . A conductive polymer liquid and a plurality of carbon nanotubes are mixed to form a mixture. The mixture is coated on a substrate to form a film precursor. Two electrode parts are arranged on the film precursor. An electric field is applied to the film precursor through the two electrode parts at a room temperature, so as to change an arrangement of the plurality of carbon nanotubes, such that the thermoelectric polymer film is formed.Type: ApplicationFiled: March 3, 2022Publication date: August 24, 2023Applicant: National Cheng Kung UniversityInventors: Chia-Yun Chen, Kuan-Yi Kuo, Po-Hsuan Hsiao, Yi-Yin Lin
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Patent number: 11635388Abstract: A method for manufacturing modified metal nanoparticles includes steps as follows. Metal nanoparticles are provided, wherein each of the metal nanoparticles is a gold nanoparticle or a silver nanoparticle. An ascorbic acid solution is provided, wherein the ascorbic acid solution includes ascorbic acid molecules and/or ascorbic acid ions. A surface modification step is conducted, wherein the metal nanoparticles and the ascorbic acid solution are mixed, such that surfaces of the metal nanoparticles are modified by the ascorbic acid molecules and/or ascorbic acid ions to obtain the modified metal nanoparticles.Type: GrantFiled: December 17, 2020Date of Patent: April 25, 2023Assignee: National Cheng Kung UniversityInventors: Chia-Yun Chen, Ta-Cheng Wei, Tzu-Yu Ou, Meng-Chen Lo
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Patent number: 11598741Abstract: A method for manufacturing a tungsten trioxide/silicon nanocomposite structure includes steps as follows. A silicon substrate is provided, wherein a surface of the silicon substrate is formed with a plurality of microstructures. A tungsten trioxide precursor solution is provided, wherein the tungsten trioxide precursor solution is contacted with the silicon substrate. A hydrothermal synthesis step is conducted, wherein the tungsten trioxide precursor solution is reacted to form a plurality of tungsten trioxide particles on the plurality of microstructures, so as to obtain the tungsten trioxide/silicon nanocomposite structure.Type: GrantFiled: December 15, 2020Date of Patent: March 7, 2023Assignee: National Cheng Kung UniversityInventors: Chia-Yun Chen, Po-Hsuan Hsiao, Pin-Ju Chien
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Patent number: 11466035Abstract: A method for manufacturing a silver-carbon composite includes steps as follows. A carbon-containing solution is provided, wherein a carbon-containing material is subjected to a calcination step and is dissolved by a solvent to obtain the carbon-containing solution. The carbon-containing solution includes a plurality of carbon nanodots, and the carbon nanodots are negatively charged. A silver ion-containing solution is provided, wherein the silver ion-containing solution includes a plurality of silver ions. The carbon-containing solution and the silver ion-containing solution are mixed to obtain a mixed solution. The mixed solution is heated, such that at least one of the silver ions is reduced on at least one of the carbon nanodots to obtain the silver-carbon composite.Type: GrantFiled: April 14, 2020Date of Patent: October 11, 2022Assignee: National Cheng Kung UniversityInventors: Chia-Yun Chen, Po-Hsuan Hsiao, Ta-Cheng Wei
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Publication number: 20220163472Abstract: A method for manufacturing a tungsten trioxide/silicon nanocomposite structure includes steps as follows. A silicon substrate is provided, wherein a surface of the silicon substrate is formed with a plurality of microstructures. A tungsten trioxide precursor solution is provided, wherein the tungsten trioxide precursor solution is contacted with the silicon substrate. A hydrothermal synthesis step is conducted, wherein the tungsten trioxide precursor solution is reacted to form a plurality of tungsten trioxide particles on the plurality of microstructures, so as to obtain the tungsten trioxide/silicon nanocomposite structure.Type: ApplicationFiled: December 15, 2020Publication date: May 26, 2022Inventors: Chia-Yun Chen, Po-Hsuan Hsiao, Pin-Ju Chien
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Publication number: 20220163454Abstract: A method for manufacturing modified metal nanoparticles includes steps as follows. Metal nanoparticles are provided, wherein each of the metal nanoparticles is a gold nanoparticle or a silver nanoparticle. An ascorbic acid solution is provided, wherein the ascorbic acid solution includes ascorbic acid molecules and/or ascorbic acid ions. A surface modification step is conducted, wherein the metal nanoparticles and the ascorbic acid solution are mixed, such that surfaces of the metal nanoparticles are modified by the ascorbic acid molecules and/or ascorbic acid ions to obtain the modified metal nanoparticles.Type: ApplicationFiled: December 17, 2020Publication date: May 26, 2022Inventors: Chia-Yun Chen, Ta-Cheng Wei, Tzu-Yu Ou, Meng-Chen Lo
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Publication number: 20210238199Abstract: A method for manufacturing a silver-carbon composite includes steps as follows. A carbon-containing solution is provided, wherein a carbon-containing material is subjected to a calcination step and is dissolved by a solvent to obtain the carbon-containing solution. The carbon-containing solution includes a plurality of carbon nanodots, and the carbon nanodots are negatively charged. A silver ion-containing solution is provided, wherein the silver ion-containing solution includes a plurality of silver ions. The carbon-containing solution and the silver ion-containing solution are mixed to obtain a mixed solution. The mixed solution is heated, such that at least one of the silver ions is reduced on at least one of the carbon nanodots to obtain the silver-carbon composite.Type: ApplicationFiled: April 14, 2020Publication date: August 5, 2021Inventors: Chia-Yun Chen, Po-Hsuan Hsiao, Ta-Cheng Wei
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Publication number: 20210020669Abstract: A method for fabricating a semiconductor device is provided. The method includes forming a metal catalyst layer on an etching area of the semiconductor substrate; performing a wet etch process to the semiconductor substrate to etch the etching area of the semiconductor substrate under the metal catalyst layer, thereby forming a trench in the semiconductor substrate; and removing the metal catalyst layer from the semiconductor substrate after performing the wet etch process.Type: ApplicationFiled: July 15, 2019Publication date: January 21, 2021Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chin-Yu LIN, Keng-Ying LIAO, Huai-Jen TUNG, Po-Zen CHEN, Su-Yu YEH, Chia-Yun CHEN, Ta-Cheng WEI
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Patent number: 10879289Abstract: A method for fabricating a semiconductor device is provided. The method includes forming a metal catalyst layer on an etching area of the semiconductor substrate; performing a wet etch process to the semiconductor substrate to etch the etching area of the semiconductor substrate under the metal catalyst layer, thereby forming a trench in the semiconductor substrate; and removing the metal catalyst layer from the semiconductor substrate after performing the wet etch process.Type: GrantFiled: July 15, 2019Date of Patent: December 29, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Chin-Yu Lin, Keng-Ying Liao, Huai-Jen Tung, Po-Zen Chen, Su-Yu Yeh, Chia-Yun Chen, Ta-Cheng Wei
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Patent number: 7884991Abstract: The present invention discloses a structure and method for realizing electromagnetically-induced transparency. In the present invention, a first split-ring resonator and a second split-ring resonator form a resonance structure. The first split-ring resonator and the second split-ring resonator are made of a conductive material. The first split-ring resonator has a “U” shape with a containing space. The second split-ring resonator has a “rectangular loop” shape with a gap or has a “U” shape with an opening. The second split-ring resonator is inserted into the containing space with the gap or opening arranged inside the containing space and faced downward to form the resonance structure. The resonance structures are periodically arranged on a chip to form an array. Thereby, different-frequency electromagnetic waves can be used to generate electromagnetically-induced transparency via regulating the dimensions of the resonance structure.Type: GrantFiled: July 21, 2009Date of Patent: February 8, 2011Assignee: National Tsing Hua UniversityInventors: Ta-Jen Yen, Chia-Yun Chen
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Publication number: 20110019259Abstract: The present invention discloses a structure and method for realizing electromagnetically-induced transparency. In the present invention, a first split-ring resonator and a second split-ring resonator form a resonance structure. The first split-ring resonator and the second split-ring resonator are made of a conductive material. The first split-ring resonator has a “U” shape with a containing space. The second split-ring resonator has a “rectangular loop” shape with a gap or has a “U” shape with an opening. The second split-ring resonator is inserted into the containing space with the gap or opening arranged inside the containing space and faced downward to form the resonance structure. The resonance structures are periodically arranged on a chip to form an array. Thereby, different-frequency electromagnetic waves can be used to generate electromagnetically-induced transparency via regulating the dimensions of the resonance structure.Type: ApplicationFiled: July 21, 2009Publication date: January 27, 2011Inventors: Ta-Jen YEN, Chia-Yun Chen
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Patent number: 7655980Abstract: A LDNMOS device for an ESD protection circuit including a P-type substrate and an N-type deep well region is provided. The P-type substrate includes a first area and a second area. The N-type deep well region is in the first and second areas of the P-type substrate. The LDNMOS device further includes a gate electrode disposed on the P-type substrate between the first and second areas, a P-type implanted region disposed in the first area of the P-type substrate, an N-type grade region disposed in the N-type deep well region of the first area, an N-type first doped region disposed in the N-type grade region, a P-type body region disposed in the N-type deep well region of the second area, an N-type second doped region disposed in the P-type body region, and a P-type doped region disposed in the P-type body region and adjacent to the N-type second doped region.Type: GrantFiled: July 23, 2008Date of Patent: February 2, 2010Assignee: United Microelectronics Corp.Inventors: Mei-Ling Chao, Chia-Yun Chen, Tai-Hsiang Lai, Tien-Hao Tang
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Publication number: 20100019318Abstract: A LDNMOS device for an ESD protection circuit including a P-type substrate and an N-type deep well region is provided. The P-type substrate includes a first area and a second area. The N-type deep well region is in the first and second areas of the P-type substrate. The LDNMOS device further includes a gate electrode disposed on the P-type substrate between the first and second areas, a P-type implanted region disposed in the first area of the P-type substrate, an N-type grade region disposed in the N-type deep well region of the first area, an N-type first doped region disposed in the N-type grade region, a P-type body region disposed in the N-type deep well region of the second area, an N-type second doped region disposed in the P-type body region, and a P-type doped region disposed in the P-type body region and adjacent to the N-type second doped region.Type: ApplicationFiled: July 23, 2008Publication date: January 28, 2010Applicant: UNITED MICROELECTRONICS CORP.Inventors: Mei-Ling Chao, Chia-Yun Chen, Tai-Hsiang Lai, Tien-Hao Tang
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Publication number: 20090057604Abstract: A man-made magnetic material presenting magnetic response at different frequencies is made from non-magnetic conductive metal and formed in a four-way symmetrical structure consisting of four L-shaped units. A plurality of the four-way symmetrical structures is arranged to form a periodic array. The four-way symmetrical structure is formed at a size much smaller than the wavelength of incident light. Hence it is treated as an effective uniform medium in terms of the incident light. Such a novel planar structure can generate magnetic response in a wide range of bandwidth. The frequency band capable of generating the magnetic response also can be regulated and altered through control of the structural size.Type: ApplicationFiled: August 27, 2007Publication date: March 5, 2009Inventors: Ta-Jen Yen, Chia-Yun Chen
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Patent number: 7412090Abstract: A method of managing wafer defects includes inspecting each chip in a wafer to generate a unit of wafer defect raw data, using a server to integrate the unit of wafer defect raw data to generate a unit of wafer defect distribution data for recording positions, types, and sizes of defects, using the server to generate a corresponding drawing file according to the unit wafer defect distribution data to show all kinds of defect distributions, and transmitting the drawing file to a terminal such that terminal users can view the defect distributions without receiving the unit of wafer defect raw data.Type: GrantFiled: September 9, 2004Date of Patent: August 12, 2008Assignee: Powerchip Semiconductor Corp.Inventors: Hung-En Tai, Chia-Yun Chen, Sheng-Jen Wang
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Patent number: 7382451Abstract: A plurality of cassettes, each having a plurality of wafers respectively having a first defect information, is selected. Each of the cassettes is then assigned to a corresponding tool having at least one reaction chamber, and the wafers are substantially equally assigned to the reaction chambers. A first process is then performed on each of the wafers in the reaction chamber. Finally, a first defect inspection process is performed on each of the wafers.Type: GrantFiled: December 1, 2004Date of Patent: June 3, 2008Assignee: Powerchip Semiconductor Corp.Inventors: Long-Hui Lin, Chia-Yun Chen
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Patent number: 7132354Abstract: An inspection method for a semiconductor device is disclosed. The method includes providing a semiconductor device, performing heat treatment on the semiconductor device, and inspecting the semiconductor device utilizing electron beam to acquire an analysis image. The semiconductor device comprises a substrate, a plurality of gate electrodes protruding on the substrate, a blanket dielectric layer overlying the substrate and gate electrodes, and a plurality of polycrystalline silicon plugs, respectively disposed on the substrate between the gate electrodes, in the dielectric layer. A piping defect is detected by the analysis image showing an area with voltage contrast difference.Type: GrantFiled: August 30, 2005Date of Patent: November 7, 2006Assignee: Powerchip Semiconductor Corp.Inventors: Long-Hui Lin, Hsien-Te Lo, Chia-Yun Chen