Patents by Inventor Chia-Hao Tsai
Chia-Hao Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240175914Abstract: An electronic device is provided. The electronic device includes a plurality of signal lines and a testing circuit. The testing circuit includes a plurality of output channels electrically connected to some of the plurality of signal lines and a plurality of switches. The plurality of switches are connected to the plurality of signal lines via the plurality of output channels. The overall plurality of output channels of the testing circuit are less than the overall plurality of signal lines in quantity. There are at least two via holes overlapping one of the plurality of output channels.Type: ApplicationFiled: May 31, 2023Publication date: May 30, 2024Applicant: Innolux CorporationInventors: Ming-Jou Tai, Chia-Hao Tsai, Yi-Shiuan Cherng, Youcheng Lu
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Publication number: 20240178961Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a first wireless device. The first wireless device receives, from a base station, a configuration of first reference signals on a first time-frequency resource. The first wireless device measures the first reference signals received from the base station to obtain first measurements for a direct path between the base station and the first wireless device. The first wireless device obtains second measurements for an indirect path between the base station and the first wireless device via a second wireless device. The first wireless device selects a communication path from the direct path and the indirect path based at least in part on the first measurements and the second measurements.Type: ApplicationFiled: November 17, 2023Publication date: May 30, 2024Inventors: Lung-Sheng Tsai, Chun-Hao Fang, Wei-Kai Chang, Chia-Hao Yu, Pei-Kai Liao
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Patent number: 11997597Abstract: A method for a user equipment (UE) monitoring a physical downlink control channel (PDCCH) for power saving signaling is disclosed. The method comprises receiving a discontinuous reception (DRX) configuration from a base station (BS) to configure the UE to monitor a scheduling signal on the PDCCH within a DRX active time, and receiving a configuration from the BS to configure the UE to monitor the power saving signaling on the PDCCH and instructing the UE to wake up for monitoring the scheduling signal in the DRX active time, wherein the configuration includes a time in milliseconds prior to a start of a DRX on-duration time, and instructs the UE to start monitoring the PDCCH for the power saving signaling.Type: GrantFiled: April 19, 2023Date of Patent: May 28, 2024Assignee: Hannibal IP LLCInventors: Yu-Hsin Cheng, Hsin-Hsi Tsai, Chia-Hao Yu, Chie-Ming Chou
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Publication number: 20240172083Abstract: A first wireless device receives, from a base station, a configuration of first reference signals to be transmitted on a first time-frequency resource and a configuration of second reference signals to be transmitted on a second time-frequency resource. The first wireless device measures one of the first reference signals and the second reference signals. The first wireless device switches to measuring the other one of the second reference signals, wherein the first reference signals are measured to generate first measurements and the second reference signals are measured to generate second measurements. The first wireless device obtains a selection of a communication path, for communicating data between the base station and the first wireless device. The first wireless device obtains a first radio frequency (RF) signal from one or more RF signals carried through the communication path.Type: ApplicationFiled: November 17, 2023Publication date: May 23, 2024Inventors: Lung-Sheng Tsai, Chun-Hao Fang, Wei-Kai Chang, Chia-Hao Yu, Pei-Kai Liao
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Publication number: 20240172258Abstract: A first wireless device reports to a base station at least one of (a) a capability of the first wireless device for path selection or path combining and (b) a supported frequency range on the second time-frequency resource. The first wireless device receives, from the base station, first control information indicating whether the first wireless device should receive data on the first time-frequency resource from the base station, on the second time-frequency resource from the second device, or both the first and second time-frequency resources, wherein the data are transmitted from the base station on the first time-frequency resource. The first wireless device receives the data based on the first control information.Type: ApplicationFiled: November 17, 2023Publication date: May 23, 2024Inventors: Lung-Sheng Tsai, Chun-Hao Fang, Wei-Kai Chang, Chia-Hao Yu, Pei-Kai Liao
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Publication number: 20240142833Abstract: An electronic device includes a substrate, a driving element, a first insulating layer, a pixel electrode layer, and a common electrode layer. The driving element is disposed on the substrate. The first insulating layer is disposed on the driving element. The pixel electrode layer is disposed on the first insulating layer. The first insulating layer comprises a hole, and the pixel electrode layer is electrically connected to the driving element through the hole. The common electrode layer is disposed on the pixel electrode layer. The common electrode layer comprises a slit, and the slit has an edge, and the edge is disposed in the hole.Type: ApplicationFiled: January 11, 2024Publication date: May 2, 2024Applicant: Innolux CorporationInventors: Wei-Yen Chiu, Ming-Jou Tai, You-Cheng Lu, Yi-Shiuan Cherng, Yi-Hsiu Wu, Chia-Hao Tsai, Yung-Hsun Wu
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Patent number: 11973085Abstract: An electronic device includes a substrate and transistors disposed on the substrate. At least one of the transistors includes a semiconductor layer, a gate insulating layer, a gate electrode, a first electrode, and a second electrode. The gate insulating layer includes first contact holes and second contact holes. The gate electrode is disposed on the gate insulating layer. The first electrode is disposed on the gate electrode, has a first side away from the gate electrode, and contacts the semiconductor layer through the first contact holes. The second electrode is disposed on the gate electrode, has a second side away from the gate electrode, and contacts the semiconductor layer through the second contact holes. The first contact holes have first edges away from the gate electrode. A minimum distance between the first side and the gate electrode is less than a minimum distance between the first edge of one of the first contact holes and the gate electrode.Type: GrantFiled: November 18, 2020Date of Patent: April 30, 2024Assignee: Innolux CorporationInventors: Ming-Jou Tai, Chia-Hao Tsai, Yi-Shiuan Cherng
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Patent number: 11967570Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.Type: GrantFiled: March 4, 2022Date of Patent: April 23, 2024Assignee: MediaTek Inc.Inventors: Chia-Hao Hsu, Tai-Yu Chen, Shiann-Tsong Tsai, Hsing-Chih Liu, Yao-Pang Hsu, Chi-Yuan Chen, Chung-Fa Lee
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Publication number: 20240120272Abstract: Embodiments of the present disclosure relates to a method for forming a semiconductor device structure. The method includes including forming one or more conductive features in a first interlayer dielectric (ILD), forming an etch stop layer on the first ILD, forming a second ILD over the etch stop layer, forming one or more openings through the second ILD and the etch stop layer to expose a top surface of the one or more first conductive features, wherein the one or more openings are formed by a first etch process in a first process chamber, exposing the one or more openings to a second etch process in a second process chamber so that the shape of the or more openings is elongated, and filling the one or more openings with a conductive material.Type: ApplicationFiled: January 15, 2023Publication date: April 11, 2024Inventors: Wei-Hao LIAO, Hsi-Wen TIEN, Chih Wei LU, Yung-Hsu WU, Cherng-Shiaw TSAI, Chia-Wei SU
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Patent number: 11943030Abstract: A method for wireless communication performed by a user equipment (UE) is provided. The UE includes a plurality of antenna panels. The method includes transmitting, to a Base Station (BS), a UE capability message that includes a number of the plurality of antenna panels; and transmitting, to the BS, a panel report that includes information of the plurality of antenna panels, the information associated with at least one of a Synchronization Signal Block (SSB) and a Channel State Information Reference Signal (CSI-RS).Type: GrantFiled: May 6, 2020Date of Patent: March 26, 2024Assignee: FG Innovation Company LimitedInventors: Chia-Hao Yu, Hsin-Hsi Tsai, Chie-Ming Chou
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Publication number: 20240071330Abstract: A display device includes a display panel. The display panel has a functional display area. The functional display area includes a plurality of display pixels and a plurality of light transmitting regions. The plurality of display pixels are around by the plurality of the light transmitting regions. A boundary between one of the plurality of display pixels and one of the plurality of light transmitting regions comprises an arc segment.Type: ApplicationFiled: November 3, 2023Publication date: February 29, 2024Applicant: Innolux CorporationInventors: Chia-Hao Tsai, Ming-Jou Tai, Yi-Shiuan Cherng, Yu-Shih Tsou, You-Cheng Lu, Yung-Hsun Wu
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Publication number: 20240073816Abstract: A method performed by a UE for saving power is provided. The method includes: receiving, from a Base Station (BS), control information that includes a Physical Downlink Control Channel (PDCCH) monitoring adaptation field, wherein the PDCCH monitoring adaptation field indicates a PDCCH skipping function; and monitoring, regardless of the PDCCH skipping function indicated by the PDCCH monitoring adaptation field, a PDCCH in a case that a Scheduling Request (SR) is transmitted on a Physical Uplink Control Channel (PUCCH) and is determined to be pending.Type: ApplicationFiled: January 4, 2022Publication date: February 29, 2024Applicant: FG Innovation Company LimitedInventors: CHIA-HSIN LAI, HSIN-HSI TSAI, CHIA-HAO YU, MEI-JU SHIH
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Publication number: 20240071954Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.Type: ApplicationFiled: November 9, 2023Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
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Publication number: 20240071953Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.Type: ApplicationFiled: November 6, 2023Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kai-Ming Chiang, Chao-wei Li, Wei-Lun Tsai, Chia-Min Lin, Yi-Da Tsai, Sheng-Feng Weng, Yu-Hao Chen, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
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Patent number: 11913876Abstract: An optical water-quality detection apparatus includes a detection device, a biofilm-inhibition light source, a detection light source and a sensor. The detection device includes a detection chamber. The biofilm-inhibition light source is disposed outside the detection chamber and configured to emit biofilm-inhibition light. The detection light source is disposed outside the detection chamber and configured to emit detection light. The sensor is configured to sense the detection light penetrating the detection chamber. A beam of the detection light and a beam of the inhibition light overlaps as penetrating the detection chamber.Type: GrantFiled: August 10, 2022Date of Patent: February 27, 2024Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chia-Jung Chang, Jui-Hung Tsai, Ying-Hao Wang, Chih-Hao Hsu
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Patent number: 11906860Abstract: An electronic device includes a substrate, a driving element, a first transparent conductive layer, an insulating layer, and a second transparent conductive layer. The driving element is disposed on the substrate and includes a drain electrode having a first edge. The first transparent conductive layer is disposed on the driving element. The insulating layer is disposed between the driving element and the first transparent conductive layer and includes a hole through which the first transparent conductive layer is electrically connected to the driving element. The second transparent conductive layer is disposed on the insulating layer. One of the first and second transparent conductive layers includes at least one slit, and the first or second transparent conductive layer that includes the at least one slit has a second edge. The second edge is located in the hole, and the at least one slit exposes the first edge of the drain electrode.Type: GrantFiled: March 21, 2023Date of Patent: February 20, 2024Assignee: Innolux CorporationInventors: Wei-Yen Chiu, Ming-Jou Tai, You-Cheng Lu, Yi-Shiuan Cherng, Yi-Hsiu Wu, Chia-Hao Tsai, Yung-Hsun Wu
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Publication number: 20240049528Abstract: An electronic device is provided. The electronic device includes a substrate, a thin-film transistor, a first insulating layer, and a pixel electrode. The thin-film transistor is disposed on the substrate, and includes a semiconductor layer, a gate electrode, a source electrode and a drain electrode. The semiconductor layer includes a metal oxide. The first insulating layer is disposed on the thin-film transistor and has a first via hole. The pixel electrode is disposed on the first insulating layer, and is electrically connected to either the source electrode or the drain electrode through the first via hole. In addition, the first via hole at least partially overlaps the gate electrode in a normal direction of the substrate.Type: ApplicationFiled: June 28, 2023Publication date: February 8, 2024Inventors: Chia-Hao TSAI, Ming-Chen LIU
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Publication number: 20240045275Abstract: An electronic device includes a first substrate, a drain, an organic layer, a pixel electrode, a second substrate, a common electrode layer and a spacer. The drain is disposed on the first substrate. The organic layer is disposed on the drain and has a contact hole. The pixel electrode is disposed on the organic layer and electrically connected to the drain via the contact hole. The second substrate is disposed opposite to the first substrate. The common electrode layer is disposed on the organic layer. The spacer is disposed between the organic layer and the second substrate, wherein the spacer is directly in contact with the common electrode layer and overlaps with the contact hole.Type: ApplicationFiled: October 18, 2023Publication date: February 8, 2024Applicant: Innolux CorporationInventors: Ming-Jou Tai, Chia-Hao Tsai
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Publication number: 20240038120Abstract: An electronic device including a plurality of pixels and a driving element is provided. Each of the plurality of pixels includes a first sub-pixel, a second sub-pixel, and a third sub-pixel. The driving element drives each first sub-pixel of the plurality of pixels.Type: ApplicationFiled: October 5, 2023Publication date: February 1, 2024Applicant: Innolux CorporationInventors: Chia-Hao Tsai, You-Cheng Lu, Yi-Shiuan Cherng, Wei-Yen Chiu
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Publication number: 20240021623Abstract: An electronic device is provided by the present disclosure. The electronic device includes a substrate; a first transistor disposed on the substrate and including a first semiconductor layer and a gate electrode; a first insulating layer disposed between the first semiconductor layer and the gate electrode; a second insulating layer disposed on the first insulating layer, wherein the first semiconductor layer and the gate electrode are located between the substrate and the second insulating layer; a barrier layer disposed on the second insulating layer; and a second transistor disposed on the barrier layer and including a second semiconductor layer, wherein the barrier layer is disposed between the second semiconductor layer and the second insulating layer.Type: ApplicationFiled: June 12, 2023Publication date: January 18, 2024Applicant: InnoLux CorporationInventors: Cheng-Yu YANG, Chih-Hao CHANG, Chia-Hao TSAI