Patents by Inventor Chiao Wei

Chiao Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8615071
    Abstract: A generic approach for identifying, authenticating, and correlating a received massage with a particular event and a particular recipient, regardless of the number of events, number of recipients and types of media used for the originally sent message, is achieved by the inclusion of a unique ID embedded in each originally sent message. Upon receipt of an incoming reply message, a parser extracts the unique ID information provided by the recipient from the message for correlation of the incoming message with the associated sent message.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: December 24, 2013
    Assignee: TTI Inventions C LLC
    Inventors: Chiao-Wei Lee, Chao-Chi Tong, Mark J. Szachara
  • Patent number: 8593013
    Abstract: A switching control method capable of continuously providing power is utilized for a power supply system having a first power supply unit and a second power supply unit. The switching control method includes generating a first input signal and a second input signal; performing a logical operation process on the first input signal and the second input signal to generate a first control signal; delaying the second input signal for a delay time to generate a second control signal; controlling a coupling relationship between the first power supply unit and a load according to the first control signal; and controlling a coupling relationship between the second power supply unit and the load according to the second control signal.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: November 26, 2013
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Sih-Ting Wang, Chiao-Wei Hsiao, Chung-Wen Wu
  • Patent number: 8509317
    Abstract: A method for detecting signals in a TMDS transmission system having a channel established between a receiver and a transmitter includes separating loadings of the receiver from the channel, providing a first reference current in a first differential line of the channel, providing a second reference current in a second differential line of the channel, computing a difference between the first reference current and a current provided by the transmitter via the first differential line to obtain a first current difference, computing a difference between the second reference current and a current provided by the transmitter via the second differential line to obtain a second current difference, and determining an operating state of the transmitter according to the first current difference and the second current difference.
    Type: Grant
    Filed: September 1, 2009
    Date of Patent: August 13, 2013
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Chiao-Wei Hsiao, Kuo-Chi Chen, Shyr-Chyau Luo
  • Patent number: 8373474
    Abstract: A delay lock loop (DLL) including a voltage control delay line (VCDL), a phase frequency detecting loop (PFD loop), and a phase limiting loop is provided. The VCDL generates an output clock signal according to a DC voltage signal, wherein the VCDL delays an input clock signal by a specific period so as to generate the output clock signal. The PFD loop generates the DC voltage signal according to the phase difference of the input clock signal and the output clock signal and is controlled by an initiation signal. The phase limiting loop limits the delay of the output clock signal to be less than a delay time and generates the initiation signal to enable the PFD loop. Furthermore, a clock signal generating method is also provided.
    Type: Grant
    Filed: September 25, 2011
    Date of Patent: February 12, 2013
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chiao-Wei Hsiao, Sih-Ting Wang
  • Patent number: 8346794
    Abstract: Input data queries directed at a plurality of target databases and originating from any of a plurality of sources are first converted to validated canonical forms, which are then used to query the target databases. Specifically, upon receiving an input data query, a relatively accurate reference database is selected based on the type of the input data. This reference is then queried for the input data with the intent of finding an exact matching record or a near-matching record that can be considered an exact match and thereby validating the input data. Otherwise, the requesting source is instructed to provide a new query. Once having a validated record, it is converted to a canonical form, which is then used to query the target databases intended to be searched. In a further embodiment, multiple reference databases are queried to determine a canonical form of the data or to determine multiple canonical forms of the data.
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: January 1, 2013
    Assignee: TTI Inventions C LLC
    Inventors: Kong Eng Cheng, Munir Cochinwala, Dennis E. Egan, Benjamin W. Falchuk, Chiao-Wei Lee, John R. Wullert, II
  • Publication number: 20120194237
    Abstract: A delay lock loop (DLL) including a voltage control delay line (VCDL), a phase frequency detecting loop (PFD loop), and a phase limiting loop is provided. The VCDL generates an output clock signal according to a DC voltage signal, wherein the VCDL delays an input clock signal by a specific period so as to generate the output clock signal. The PFD loop generates the DC voltage signal according to the phase difference of the input clock signal and the output clock signal and is controlled by an initiation signal. The phase limiting loop limits the delay of the output clock signal to be less than a delay time and generates the initiation signal to enable the PFD loop. Furthermore, a clock signal generating method is also provided.
    Type: Application
    Filed: September 25, 2011
    Publication date: August 2, 2012
    Applicant: NOVATEK MICROELECTRONICS CORP.
    Inventors: Chiao-Wei Hsiao, Sih-Ting Wang
  • Patent number: 8228976
    Abstract: A dual-port input equalizer includes a control unit for generating a first control signal and a second control signal according to a selection signal, a first equalizer for receiving a first and second differential voltage for equalization according to the first control signal and the second control signal, which the first equalizer includes a first transistor, a second transistor, an passive loading portion, and a first zero-point generation circuit, a second equalizer for receiving a third and fourth differential voltage for equalization according to the first control signal and the second control signal, which the second equalizer includes a third transistor and a fourth transistor, which the drain of the first transistor, the second transistor, third transistor, and the fourth transistor coupled to the passive loading portion, and the source of the first transistor, the second transistor, third transistor, and the fourth transistor coupled to the first zero-point generation circuit.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: July 24, 2012
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Chiao-Wei Hsiao, Shyr-Chyau Luo, Chien-Cheng Tu
  • Publication number: 20120149066
    Abstract: A method for producing glucosamine with microorganism comprises of fermenting with a microorganism selected from the group consisting of Monascus pilosus and Aspergillus sp. in a novel low-cost medium, thereby enable it to produce glucosamine; wherein said medium is consisted of commercial Taiwan sugar, soy beam, rice bran and the like; wherein suitable condition for the fermentation is: 150˜300 rpm, pH 4˜pH 8, and 24° C.˜37° C.; wherein, after fermentation culturing, the fermentation liquor is filtered with suction to recover said microorganism biomass, said microorganism biomass is then subjected to steps of cell disruption, hydrochloric acid reaction, neutralization reaction and filtration, to obtain glucosamine produced by the microorganism.
    Type: Application
    Filed: February 22, 2012
    Publication date: June 14, 2012
    Applicant: YUAN ZE UNIVERSITY
    Inventors: Ho-Shing Wu, Yu-Fen Chang, Yu-Chiao Wei
  • Patent number: 8148113
    Abstract: A method for producing glucosamine with microorganism comprises of fermenting with a microorganism selected from the group consisting of Monascus pilosus and Aspergillus sp. in a novel low-cost medium, thereby enable it to produce glucosamine; wherein said medium is consisted of commercial Taiwan sugar, soy beam, rice bran and the like; wherein suitable condition for the fermentation is: 150˜300 rpm, pH 4˜pH 8, and 24° C.˜37° C.; wherein, after fermentation culturing, the fermentation liquor is filtered with suction to recover said microorganism biomass, said microorganism biomass is then subjected to steps of cell disruption, hydrochloric acid reaction, neutralization reaction and filtration, to obtain glucosamine produced by the microorganism.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: April 3, 2012
    Assignee: Yuan Ze University
    Inventors: Ho-Shing Wu, Yu-Fen Chang, Yu-Chiao Wei
  • Patent number: 8143912
    Abstract: An impedance adjustment circuit for adjusting a terminal resistance includes a resistance evaluation unit and a terminal resistor unit. The resistance evaluation unit is utilized for evaluating a ratio of an off-chip resistor and a basic resistor to generate a control signal by a successive approximation method. The terminal resistor unit is coupled to the resistance evaluation unit, and is utilized for deciding a number of shunt basic resistors to provide a matched terminal resistance according to the control signal.
    Type: Grant
    Filed: October 12, 2009
    Date of Patent: March 27, 2012
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Chiao-Wei Hsiao, Sih-Ting Wang, Tung-Cheng Hsin
  • Patent number: 8120392
    Abstract: A frequency dividing circuit performs a frequency dividing operation on N input clock signals to obtain N output clock signals, wherein N is a natural number greater than 1. The frequency dividing circuit includes a frequency divider and a flip-flop. The frequency divider samples an initial signal according to a first input clock signal of the N input clock signals to accordingly generate a first output clock signal of the N output clock signals. The initial signal corresponds with an inverse signal of the first output clock signal. The flip-flop samples the first output clock signal to accordingly generate a second output clock signal of the N output clock signals according to a second input clock signal of the N input clock signals.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: February 21, 2012
    Assignee: Novatek Microelectronics Corp.
    Inventors: Chiao-Wei Hsiao, Chung-Wei Lin
  • Publication number: 20110047175
    Abstract: Input data queries directed at a plurality of target databases and originating from any of a plurality of sources are first converted to validated canonical forms, which are then used to query the target databases. Specifically, upon receiving an input data query, a relatively accurate reference database is selected based on the type of the input data. This reference is then queried for the input data with the intent of finding an exact matching record or a near-matching record that can be considered an exact match and thereby validating the input data. Otherwise, the requesting source is instructed to provide a new query. Once having a validated record, it is converted to a canonical form, which is then used to query the target databases intended to be searched. In a further embodiment, multiple reference databases are queried to determine a canonical form of the data or to determine multiple canonical forms of the data.
    Type: Application
    Filed: August 3, 2010
    Publication date: February 24, 2011
    Inventors: Kong Eng Cheng, Munir Cochinwala, Dennis E. Egan, Benjamin W. Falchuk, Chiao-Wei Lee, John R. Wullert, II
  • Publication number: 20110032977
    Abstract: A dual-port input equalizer includes a control unit for generating a first control signal and a second control signal according to a selection signal, a first equalizer for receiving a first and second differential voltage for equalization according to the first control signal and the second control signal, which the first equalizer includes a first transistor, a second transistor, an passive loading portion, and a first zero-point generation circuit, a second equalizer for receiving a third and fourth differential voltage for equalization according to the first control signal and the second control signal, which the second equalizer includes a third transistor and a fourth transistor, which the drain of the first transistor, the second transistor, third transistor, and the fourth transistor coupled to the passive loading portion, and the source of the first transistor, the second transistor, third transistor, and the fourth transistor coupled to the first zero-point generation circuit.
    Type: Application
    Filed: December 31, 2009
    Publication date: February 10, 2011
    Inventors: Chiao-Wei Hsiao, Shyr-Chyau Luo, Chien-Cheng Tu
  • Publication number: 20110012689
    Abstract: An impedance adjustment circuit for adjusting a terminal resistance includes a resistance evaluation unit and a terminal resistor unit. The resistance evaluation unit is utilized for evaluating a ratio of an off-chip resistor and a basic resistor to generate a control signal by a successive approximation method. The terminal resistor unit is coupled to the resistance evaluation unit, and is utilized for deciding a number of shunt basic resistors to provide a matched terminal resistance according to the control signal.
    Type: Application
    Filed: October 12, 2009
    Publication date: January 20, 2011
    Inventors: Chiao-Wei Hsiao, Sih-Ting Wang, Tung-Cheng Hsin
  • Publication number: 20100259106
    Abstract: A switching control method capable of continuously providing power is utilized for a power supply system having a first power supply unit and a second power supply unit. The switching control method includes generating a first input signal and a second input signal; performing a logical operation process on the first input signal and the second input signal to generate a first control signal; delaying the second input signal for a delay time to generate a second control signal; controlling a coupling relationship between the first power supply unit and a load according to the first control signal; and controlling a coupling relationship between the second power supply unit and the load according to the second control signal.
    Type: Application
    Filed: June 23, 2009
    Publication date: October 14, 2010
    Inventors: Sih-Ting Wang, Chiao-Wei Hsiao, Chung-Wen Wu
  • Publication number: 20100240105
    Abstract: A method for producing glucosamine with microorganism comprises of fermenting with a microorganism selected from the group consisting of Monascus pilosus and Aspergillus sp. in a novel low-cost medium, thereby enable it to produce glucosamine; wherein said medium is consisted of commercial Taiwan sugar, soy beam, rice bran and the like; wherein suitable condition for the fermentation is: 150˜300 rpm, pH 4˜pH 8, and 24° C.˜37° C.; wherein, after fermentation culturing, the fermentation liquor is filtered with suction to recover said microorganism biomass, said microorganism biomass is then subjected to steps of cell disruption, hydrochloric acid reaction, neutralization reaction and filtration, to obtain glucosamine produced by the microorganism.
    Type: Application
    Filed: March 19, 2009
    Publication date: September 23, 2010
    Applicant: Yuan Ze University
    Inventors: Ho-Shing Wu, Yu-Fen Chang, Yu-Chiao Wei
  • Patent number: 7788278
    Abstract: Input data queries directed at a plurality of target databases and originating from any of a plurality of sources are first converted to validated canonical forms, which are then used to query the target databases. Specifically, upon receiving an input data query, a relatively accurate reference database is selected based on the type of the input data. This reference is then queried for the input data with the intent of finding an exact matching record or a near-matching record that can be considered an exact match and thereby validating the input data. Otherwise, the requesting source is instructed to provide a new query. Once having a validated record, it is converted to a canonical form, which is then used to query the target databases intended to be searched. In a further embodiment, multiple reference databases are queried to determine a canonical form of the data or to determine multiple canonical forms of the data.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: August 31, 2010
    Inventors: Kong Eng Cheng, Munir Cochinwala, Dennis E. Egan, Benjamin W. Falchuk, Chiao-Wei Lee, John R. Wullert, II
  • Publication number: 20100215130
    Abstract: A method for detecting signals in a TMDS transmission system is disclosed. A channel of the TMDS system is established between a receiver and a transmitter. The method includes separating loadings of the receiver from the channel, providing a first reference current in a first differential line of the channel, providing a second reference current in a second differential line of the channel, computing a difference between the first reference current and a current provided by the transmitter via the first differential line to obtain a first current difference, computing a difference between the second reference current and a current provided by the transmitter via the second differential line to obtain a second current difference, and determining an operating state of the transmitter according to the first current difference and the second current difference.
    Type: Application
    Filed: September 1, 2009
    Publication date: August 26, 2010
    Inventors: Chiao-Wei Hsiao, Kuo-Chi Chen, Shyr-Chyau Luo
  • Publication number: 20100207671
    Abstract: A frequency dividing circuit performs a frequency dividing operation on N input clock signals to obtain N output clock signals, wherein N is a natural number greater than 1. The frequency dividing circuit includes a frequency divider and a flip-flop. The frequency divider samples an initial signal according to a first input clock signal of the N input clock signals to accordingly generate a first output clock signal of the N output clock signals. The initial signal corresponds with an inverse signal of the first output clock signal. The flip-flop samples the first output clock signal to accordingly generate a second output clock signal of the N output clock signals according to a second input clock signal of the N input clock signals.
    Type: Application
    Filed: November 9, 2009
    Publication date: August 19, 2010
    Applicant: NOVATEK MICROELECTRONICS CORP.
    Inventors: Chiao-Wei Hsiao, Chung-Wei Lin
  • Publication number: 20070133729
    Abstract: An apparatus for generating a spread spectrum clock with constant spread ratio includes a resistance-capacitance oscillator which is used for generating a first clock signal. In addition, the present invention further includes a spread spectrum charge pump circuit, a loop filter, and a voltage controlled oscillator (VCO). The spread spectrum charge pump circuit generates a spread spectrum current according to the first clock signal for changing/discharging the loop filter, so as to make the loop filter generate a control voltage. The VCO generates a control current and a spread spectrum clock signal according to the control voltage. The VCO feeds the control current back to the spread spectrum charge pump circuit to generate the spread spectrum current.
    Type: Application
    Filed: February 28, 2006
    Publication date: June 14, 2007
    Inventors: Chiao-Wei Hsiao, Chun-Yi Huang