Patents by Inventor CHIEH CHIANG

CHIEH CHIANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11862650
    Abstract: In some embodiments, an image sensor is provided. The image sensor includes a photodetector disposed in a semiconductor substrate. A wave guide filter having a substantially planar upper surface is disposed over the photodetector. The wave guide filter includes a light filter disposed in a light filter grid structure. The light filter includes a first material that is translucent and has a first refractive index. The light filter grid structure includes a second material that is translucent and has a second refractive index less than the first refractive index.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: January 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Chien Yu, Ting-Cheng Chang, Wen-Hau Wu, Chih-Kung Chang
  • Publication number: 20230415204
    Abstract: A semiconductor cleaning tool is provided. The cleaning tool comprises a nozzle. The nozzle is connected with a first inlet to receive a carrier gas and a second inlet to receive one or more fluids. The nozzle comprises a gas passageway connected to the first inlet; and fluid passageway connected to the second inlet. The gas passageway comprises gas passage branches and the fluid passageway comprises fluid passage branches. The gas passage branches and the fluid passage branches are arranged interweavingly in the nozzle. Individual gas/fluid passage branches are controllable indecently and separately including a flow rate, a temperature, an on/off state, a type of fluid(s) or carrier gas, a time period, a supply mode, and/or any other aspects of spraying the fluid(s) and carrier gas through the individual gas passage branches and the individual fluid passage branches.
    Type: Application
    Filed: June 23, 2022
    Publication date: December 28, 2023
    Inventors: Hsu. Tung. Yen, Ling-Sung Wang, Chen-Chieh Chiang, P.H. Huang, C.L. Lin
  • Patent number: 11852291
    Abstract: A support platform is configured to support at least a portion of the weight of an associated semiconductor manufacturing tool, such as a furnace, when the associated semiconductor manufacturing tool is disposed on the support platform. The support platform comprises a base, a support plate disposed on the base and configured to move respective to the base, a brake plate arranged in fixed position respective to the base, and a damper secured to one of the support plate or the brake plate and frictionally engaging a track of the other of the support plate or the brake plate. The track includes a central track portion and inclined track portions extending away from the central track portion on respective first and opposite second sides of the central track portion. The inclined track portions are each inclined with respect to the central track portion.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chuan-Chieh Chiang, Chun-Jung Hsu
  • Publication number: 20230402477
    Abstract: The present disclosure describes a three-chip complementary metal-oxide-semiconductor (CMOS) image sensor and a method for forming the image sensor. The image sensor a first chip including a plurality of image sensing elements, transfer transistors and diffusion wells corresponding to the plurality of image sensing elements, a ground node shared by the plurality of image sensing elements, and deep trench isolation (DTI) structures extending from the shared ground node and between adjacent image sensing elements of the plurality of image sensing elements. The image sensor further includes a second chip bonded to the first chip and including a source follower, a reset transistor, a row select transistor, and an in-pixel circuit, where the source follower is electrically coupled to the diffusion wells. The image sensor further includes a third chip bonded to the second chip and including an application-specific circuit, where the application-specific circuit is electrically coupled to the in-pixel circuit.
    Type: Application
    Filed: June 10, 2022
    Publication date: December 14, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Hao CHUANG, Keng-Yu CHOU, Cheng Yu HUANG, Wen-Hau WU, Wei-Chieh CHIANG, Chih-Kung CHANG, Tzu-Hsuan HSU
  • Publication number: 20230402483
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor device including a first image sensor element and a second image sensor element disposed within a substrate. An interconnect structure is disposed along a front-side surface of the substrate and comprises a plurality of conductive wires, a plurality of conductive vias, and a first absorption structure. The first image sensor element is configured to generate electrical signals from electromagnetic radiation within a first range of wavelengths. The second image sensor element is configured to generate electrical signals from the electromagnetic radiation within a second range of wavelengths that is different than the first range of wavelengths. The second image sensor element is laterally adjacent to the first image sensor element. Further, the first image sensor element overlies the first absorption structure and is spaced laterally between opposing sidewalls of the first absorption structure.
    Type: Application
    Filed: August 8, 2023
    Publication date: December 14, 2023
    Inventors: Keng-Yu Chou, Cheng Yu Huang, Chun-Hao Chuang, Wen-Hau Wu, Wei-Chieh Chiang, Wen-Chien Yu, Chih-Kung Chang
  • Publication number: 20230369366
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes an image sensing element disposed within a substrate. A gate structure is disposed along a front-side of the substrate. A back-side of the substrate includes one or more first angled surfaces defining a central diffuser disposed over the image sensing element. The back-side of the substrate further includes second angled surfaces defining a plurality of peripheral diffusers laterally surrounding the central diffuser. The plurality of peripheral diffusers are a smaller size than the central diffuser.
    Type: Application
    Filed: July 25, 2023
    Publication date: November 16, 2023
    Inventors: Keng-Yu Chou, Chun-Hao Chuang, Jen-Cheng Liu, Kazuaki Hashimoto, Ming-En Chen, Shyh-Fann Ting, Shuang-Ji Tsai, Wei-Chieh Chiang
  • Publication number: 20230369386
    Abstract: Semiconductor device structure and methods of forming the same are described. The structure includes a first dielectric layer including a first portion disposed over a source/drain region in an active region of a substrate and a modulation portion over an interlayer dielectric (ILD) in a resistor region of the substrate, the first portion of the first dielectric layer has a first composition, and the modulation portion of the first dielectric layer has a second composition different from the first composition. The structure further includes a resistor layer disposed on the modulation portion of the first dielectric layer in the resistor region and a second dielectric layer disposed over the first dielectric layer in the active region and over the resistor layer in the resistor region.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Inventors: Hsueh-Han LU, Kun-Ei CHEN, Chen-Chieh CHIANG, Ling-Sung WANG, Jun-Nan NIAN
  • Publication number: 20230369363
    Abstract: A method for forming an image sensor package is provided. An image sensor chip is formed over a package substrate. A protection layer is formed overlying the image sensor chip. The protection layer has a planar top surface and a bottom surface lining and contacting structures under the protection layer. An opening is formed into the protection layer and spaced around a periphery of the image sensor chip. A light shielding material is filled in the opening to form an on-wafer shield structure having a sidewall directly contact the protection layer.
    Type: Application
    Filed: July 27, 2023
    Publication date: November 16, 2023
    Inventors: Wen-Hau Wu, Chun-Hao Chuang, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Cheng Yu Huang
  • Publication number: 20230361147
    Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes forming a first image sensor element within a first substrate and a second image sensor element within a second substrate. The first image sensor element is configured to generate electrical signals from electromagnetic radiation within a first range of wavelengths and the second image sensor element is configured to generate electrical signals from electromagnetic radiation within a second range of wavelengths. A plurality of deposition processes are performed to form a band-pass filter over the second substrate. The band-pass filter has a plurality of alternating layers of a first material having a first refractive index and a second material having a second refractive index that is less than the first refractive index. The first substrate is bonded to the band-pass filter.
    Type: Application
    Filed: July 17, 2023
    Publication date: November 9, 2023
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu
  • Publication number: 20230352351
    Abstract: A semiconductor structure is provided. The semiconductor structure includes an interconnection structure, a first conductive pad, a second conductive pad, a conductive material and a conductive coil. The first and second conductive pads are disposed over and electrically connected to the interconnection structure individually. The conductive material is electrically isolated from the interconnection structure, wherein bottom surfaces of the conductive material, the first conductive pad and the second conductive pad are substantially aligned. The conductive coil is disposed in the interconnection structure and overlapped by the conductive material. A manufacturing method of a semiconductor structure is also provided.
    Type: Application
    Filed: April 27, 2022
    Publication date: November 2, 2023
    Inventors: PEI-LUM MA, KUN DA JHONG, HSUEH-HAN LU, KUN-EI CHEN, CHEN-CHIEH CHIANG, LING-SUNG WANG
  • Publication number: 20230335390
    Abstract: A method for manufacturing a semiconductor structure is provided. The method may include several operations. A first layer is formed over a first region and a second region of a substrate. A first etching is performed on the first layer, thereby forming a first trench in the first region and a second trench in the second region. A first amorphization is performed on the first layer in the second region. A second etching is performed on the first layer, wherein an etching rate of the second etching in the second region is greater than an etching rate of the second etching in the first region.
    Type: Application
    Filed: April 19, 2022
    Publication date: October 19, 2023
    Inventors: CHING KANG CHEN, KUN-EI CHEN, CHEN-CHIEH CHIANG, LING-SUNG WANG
  • Patent number: 11784159
    Abstract: Provided are a mass transfer device and a mass transfer method. The mass transfer device is provided with multiple channels, a first opening of each channel is arranged on a first surface of the mass transfer device, a second opening of each channel is arranged on a second surface of the mass transfer device, and the distances between the channels are gradually increased along a direction from the first surface to the second surface. In the provided mass transfer method, through a laser irradiation mode, the Micro-LEDs are separated from the first substrate and enter the channels of the mass transfer device through the first openings, and falling into Micro-LED to-be-installed positions on a second substrate through the second openings of the channels, thereby transferring the Micro-LEDs from the first substrate to the second substrate.
    Type: Grant
    Filed: May 8, 2021
    Date of Patent: October 10, 2023
    Assignee: CHONGQING KONKA PHOTOELECTRIC TECHNOLOGY RESEARCH INSTITUTE CO., LTD.
    Inventors: Jan-hsiang Yang, Kai-yi Wu, Chia-hui Shen, Jen-chieh Chiang
  • Publication number: 20230299179
    Abstract: A semiconductor structure and a method are provided. The method includes patterning a substrate to form a first fin structure in a first region and a second fin structure in a second region, wherein a first width of the first fin structure is greater than a second width of the second fin structure; forming a protecting layer on the second fin structure; and forming a first oxide layer over the first fin structure and forming a second oxide layer over the protecting layer, wherein a width of the first oxide layer is greater than a width of the second oxide layer.
    Type: Application
    Filed: March 17, 2022
    Publication date: September 21, 2023
    Inventors: HSUEH-HAN LU, KUN-EI CHEN, CHEN-CHIEH CHIANG, LING-SUNG WANG
  • Patent number: 11764239
    Abstract: A method for forming an image sensor package is provided. An image sensor chip is formed over a package substrate. A protection layer is formed overlying the image sensor chip. The protection layer has a planar top surface and a bottom surface lining and contacting structures under the protection layer. An opening is formed into the protection layer and spaced around a periphery of the image sensor chip. A light shielding material is filled in the opening to form an on-wafer shield structure having a sidewall directly contact the protection layer.
    Type: Grant
    Filed: February 10, 2022
    Date of Patent: September 19, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Hau Wu, Chun-Hao Chuang, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Cheng Yu Huang
  • Patent number: 11764248
    Abstract: In some embodiments, the present disclosure relates to an integrated chip structure. The integrated chip structure includes an image sensor disposed within a first substrate. A first band-pass filter and a second band-pass filter are disposed on the first substrate. A dielectric structure is disposed on the first substrate. The dielectric structure is laterally between the first band-pass filter and the second band-pass filter and laterally abuts the first band-pass filter and the second band-pass filter.
    Type: Grant
    Filed: October 21, 2021
    Date of Patent: September 19, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Chien-Hsien Tseng, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu
  • Publication number: 20230276329
    Abstract: A Multi-Access Edge Computing (MEC) system is provided. The MEC system includes a user equipment (UE), an MEC device, and a core network. The MEC device includes a relay User Plane Function (UPF) module, a first UPF module, and a second UPF module. The core network performs a UPF path management corresponding to the UE based on a notification of the MEC device. When the UE attaches to a network, the MEC device establishes an idle session between the UE and the relay UPF module. When the MEC device determines that a service for the UE needs to be switched from the first UPF module to the second UPF module and the second UPF module has not been activated, the MEC device notifies the core network to switch the service for the UE from the first UPF module to the relay UPF module first.
    Type: Application
    Filed: June 7, 2022
    Publication date: August 31, 2023
    Applicant: Industrial Technology Research Institute
    Inventors: Wei-Cheng WANG, Kuo-Wei WEN, Tsun-Chieh CHIANG
  • Publication number: 20230265961
    Abstract: A support platform is configured to support at least a portion of the weight of an associated semiconductor manufacturing tool, such as a furnace, when the associated semiconductor manufacturing tool is disposed on the support platform. The support platform comprises a base, a support plate disposed on the base and configured to move respective to the base, a brake plate arranged in fixed position respective to the base, and a damper secured to one of the support plate or the brake plate and frictionally engaging a track of the other of the support plate or the brake plate. The track includes a central track portion and inclined track portions extending away from the central track portion on respective first and opposite second sides of the central track portion. The inclined track portions are each inclined with respect to the central track portion.
    Type: Application
    Filed: February 23, 2022
    Publication date: August 24, 2023
    Inventor: Chuan-Chieh Chiang
  • Publication number: 20230261011
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes a first photodetector disposed in a first pixel region of a semiconductor substrate and a second photodetector disposed in a second pixel region of the semiconductor substrate. The second photodetector is laterally separated from the first photodetector. A first diffuser is disposed along a back-side of the semiconductor substrate and over the first photodetector. A second diffuser is disposed along the back-side of the semiconductor substrate and over the second photodetector. A first midline of the first pixel region and a second midline of the second pixel region are both disposed laterally between the first diffuser and the second diffuser.
    Type: Application
    Filed: April 24, 2023
    Publication date: August 17, 2023
    Inventors: Keng-Yu Chou, Chun-Hao Chuang, Kazuaki Hashimoto, Wei-Chieh Chiang, Cheng Yu Huang, Wen-Hau Wu, Chih-Kung Chang
  • Patent number: 11699718
    Abstract: A BSI image sensor includes a substrate including a front side and a back side opposite to the front side, a pixel sensor disposed in the substrate, and a color filter disposed over the pixel sensor. The pixel sensor includes a plurality of first micro structures disposed over the back side of the substrate. The color filter includes a plurality of second micro structures disposed over the back side of the substrate. The first micro structures are arranged symmetrically to a first axial, and the second micro structures are arranged symmetrically to a second axial.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: July 11, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wei-Chieh Chiang, Keng-Yu Chou, Chun-Hao Chuang, Wen-Hau Wu, Jhy-Jyi Sze, Chien-Hsien Tseng, Kazuaki Hashimoto
  • Publication number: 20230178191
    Abstract: A system and method for automatically generating a care record are provided, which are suitable for a baby bed cover. The system includes an image capturing device and a processor. The image capturing device captures a real-time image of a baby in the baby bed. The processor is configured to receive the real-time image and detects whether an abnormal event occurs in the real-time image. The processor detects an opening time and a closing time of the bed cover to obtain a start and end time of a care operation. The processor recognizes an abnormal event type according to the abnormal event, selects a care record template according to the abnormal event type, and generates a care record according to an occurrence time of the abnormal event, the abnormal event type, the start and end time of the care operation, and the care record template.
    Type: Application
    Filed: December 26, 2021
    Publication date: June 8, 2023
    Applicant: Industrial Technology Research Institute
    Inventors: Shang-Chih Hung, Jian-Hong Liu, Ho-Hsin Lee, Jian-Ren Chen, Cheng-Chieh Chiang