Patents by Inventor CHIEH CHIANG

CHIEH CHIANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11670647
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC comprises a first phase detection autofocus (PDAF) photodetector and a second PDAF photodetector in a substrate. A first electromagnetic radiation (EMR) diffuser is disposed along a back-side of the substrate and within a perimeter of the first PDAF photodetector. The first EMR diffuser is spaced a first distance from a first side of the first PDAF photodetector and a second distance less than the first distance from a second side of the first PDAF photodetector. A second EMR diffuser is disposed along the back-side of the substrate and within a perimeter of the second PDAF photodetector. The second EMR diffuser is spaced a third distance from a first side of the second PDAF photodetector and a fourth distance less than the third distance from a second side of the second PDAF photodetector.
    Type: Grant
    Filed: February 1, 2022
    Date of Patent: June 6, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Keng-Yu Chou, Chun-Hao Chuang, Kazuaki Hashimoto, Wei-Chieh Chiang, Cheng Yu Huang, Wen-Hau Wu, Chih-Kung Chang
  • Publication number: 20230171577
    Abstract: The disclosure provides a method for assisting an unregistered user device to access an end-to-end call service of a private network and a communication system. The method includes: determining whether the user device that is not registered on the private network wants to initiate a request of an emergency call; in response to determining that the user device that is not registered on the private network wants to initiate the request of the emergency call, assisting the user device to access the end-to-end call service without being registered on the private network.
    Type: Application
    Filed: December 22, 2021
    Publication date: June 1, 2023
    Applicant: Industrial Technology Research Institute
    Inventors: Jian Cheng Chen, Tsun-Chieh Chiang, Kuo-Wei Wen
  • Patent number: 11658196
    Abstract: A BSI image sensor includes a substrate including a front side and a back side opposite to the front side, a plurality of pixel sensors, an isolation grid disposed in the substrate and separating the plurality of pixel sensors from each other, a reflective grid disposed over the isolation grid on the back side of the substrate, an a low-n grid disposed over the back side of the substrate and overlapping the reflective grid from a top view. A width of the low-n grid is greater than a width of the reflective grid.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: May 23, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Keng-Yu Chou, Wei-Chieh Chiang, Chen-Jong Wang, Chien-Hsien Tseng, Kazuaki Hashimoto
  • Patent number: 11646340
    Abstract: A BSI image sensor includes a substrate including a front side and a back side opposite to the front side, a pixel sensor disposed in the substrate, an isolation structure surrounding the pixel sensor and disposed in the substrate, a dielectric layer disposed over the pixel sensor on the front side of the substrate, and a plurality of conductive structures disposed in the dielectric layer and arranged to align with the isolation structure.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: May 9, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wen-Hau Wu, Keng-Yu Chou, Chun-Hao Chuang, Wei-Chieh Chiang, Chien-Hsien Tseng, Kazuaki Hashimoto
  • Publication number: 20230135392
    Abstract: The present disclosure describes a semiconductor device having an isolation structure with a protection layer. The semiconductor device includes a substrate, a transistor with a source/drain (S/D) structure on the substrate, and an isolation structure on the substrate and adjacent to the transistor. The isolation structure includes a dielectric structure on the substrate, a protection layer on the dielectric structure, and a gate structure on the protection layer. The protection layer is disposed between the gate structure and the S/D structure.
    Type: Application
    Filed: February 18, 2022
    Publication date: May 4, 2023
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: I-I CHENG, Chen-Chieh CHIANG, Kun-Ei CHEN, Pei-Lum MA
  • Publication number: 20230062092
    Abstract: A recessed access device comprises a conductive gate in a trench in semiconductor material. A gate insulator extends along sidewalls and around a bottom of the conductive gate between the conductive gate and the semiconductor material. A pair of source/drain regions are in upper portions of the semiconductor material on opposing lateral sides of the trench. A channel region in the semiconductor material below the pair of source/drain regions extends along sidewalls and around a bottom of the trench. The gate insulator comprises a low-k material and a high-k material. The low-k material is characterized by its dielectric constant k being no greater than 4.0. The high-k material is both (a) and (b), where: (a): characterized by its dielectric constant k being greater than 4.0; and (b): comprising SixMyO, where “M” is one or more of Al, metal(s) from Group 2, Group 3, Group 4, Group 5, and the lanthanide series of the periodic table; “x” is 0.999 to 0.6; and “y” is 0.001 to 0.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Applicant: Micron Technology, Inc.
    Inventors: Hyuck Soo Yang, Sau Ha Cheung, Richard Beeler, Ping Chieh Chiang, Hyoung Lee, Jaydip Guha, Soichi Sugiura
  • Patent number: 11582314
    Abstract: The disclosure provides a method for assisting an unregistered user device to access private network services and a communication system. The method includes steps as follows. A request to access a private service of a private network is sent by a user device. In response to determining that the user device not registered on the private network wants to access the private service, the user device is assisted to obtain a temporary user profile by a mobile edge computing server through an emergency type attachment procedure. In response to determining that the user device is registered on the private network through the emergency type attachment procedure, a regular attachment procedure is executed by the user device based on the temporary user profile. In response to determining that the user device executes the regular attachment procedure, the mobile edge computing server provides the user device with the private service.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: February 14, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Jian Cheng Chen, Tsun-Chieh Chiang, Kuo-Wei Wen
  • Publication number: 20220406666
    Abstract: A semiconductor device with different gate structures and a method of fabricating the same are disclosed. The a method includes forming a fin structure on a substrate, forming a thermal oxide layer on top and side surfaces of the fin structure, forming a polysilicon structure on the thermal oxide layer, doping portions of the fin structure uncovered by the polysilicon structure to form doped fin portions, forming a nitride layer on the polysilicon structure and the thermal oxide layer, forming an oxide layer on the nitride layer, doping the nitride layer with halogen ions, forming a source/drain region in the fin structure and adjacent to the polysilicon structure, and replacing the polysilicon structure with a gate structure.
    Type: Application
    Filed: May 6, 2022
    Publication date: December 22, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Chieh HUANG, Chen-Chieh Chiang, Wen-Sheng Lin, Hsun-Jui Chang, Yen-Han Chen
  • Patent number: 11533634
    Abstract: The disclosure provides a base station and a method for optimizing the coverage of a self-defined network. The method includes: receiving a measurement report from user equipment; in response to determining that the measurement report indicates that a neighboring first base station is present, sending a member tracking message to the first base station; determining whether the first base station belongs to any other base station group based on a member tracking response from the first base station; in response to determining that the first base station does not belong to any other base station group, adding the first base station to a base station group managed by the base station; and in response to determining that the member tracking response indicates that the first base station belongs to another base station group, merging the base station group and the another base station group.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: December 20, 2022
    Assignee: Industrial Technology Research Institute
    Inventors: Guan-Hsien Du, Tsun-Chieh Chiang
  • Publication number: 20220375942
    Abstract: A microelectronic device comprises memory cell structures extending from a base material. At least one memory cell structure of the memory cell structures comprises a central portion in contact with a digit line, extending from the base material and comprising opposing arcuate surfaces, an end portion in contact with a storage node contact on a side of the central portion, and an additional end portion in contact with an additional storage node contact on an opposite side of the central portion. Related microelectronic devices, electronic systems, and methods are also described.
    Type: Application
    Filed: May 18, 2021
    Publication date: November 24, 2022
    Inventors: Stephen D. Snyder, Thomas A. Figura, Siva Naga Sandeep Chalamalasetty, Ping Chieh Chiang, Scott L. Light, Yashvi Singh, Yan Li, Song Guo
  • Publication number: 20220359583
    Abstract: Some embodiments relate to a CMOS image sensor disposed on a substrate. A plurality of pixel regions comprising a plurality of photodiodes, respectively, are configured to receive radiation that enters a back-side of the substrate. A boundary deep trench isolation (BDTI) structure is disposed at boundary regions of the pixel regions, and includes a first set of BDTI segments extending in a first direction and a second set of BDTI segments extending in a second direction perpendicular to the first direction to laterally surround the photodiode. The BDTI structure comprises a first material. A pixel deep trench isolation (PDTI) structure is disposed within the BDTI structure and overlies the photodiode. The PDTI structure comprises a second material that differs from the first material, and includes a first PDTI segment extending in the first direction such that the first PDTI segment is surrounded by the BDTI structure.
    Type: Application
    Filed: August 25, 2021
    Publication date: November 10, 2022
    Inventors: Cheng Yu Huang, Wei-Chieh Chiang, Keng-Yu Chou, Chun-Hao Chuang, Wen-Hau Wu, Chih-Kung Chang
  • Publication number: 20220336518
    Abstract: Various embodiments of the present application are directed towards an image sensor including a wavelength tunable narrow band filter, as well as methods for forming the image sensor. In some embodiments, the image sensor includes a substrate, a first photodetector, a second photodetector, and a filter. The first and second photodetectors neighbor in the substrate. The filter overlies the first and second photodetectors and includes a first distributed Bragg reflector (DBR), a second DBR, and a first interlayer between the first and second DBRs. A thickness of the first interlayer has a first thickness value overlying the first photodetector and a second thickness value overlying the second photodetector. In some embodiments, the filter is limited to a single interlayer. In other embodiments the filter further includes a second interlayer defining columnar structures embedded in the first interlayer and having a different refractive index than the first interlayer.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 20, 2022
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Kazuaki Hashimoto, Keng-Yu Chou, Wei Chieh Chiang, Wen-Hau Wu, Chih-Kung Chang
  • Publication number: 20220328535
    Abstract: The present disclosure, in some embodiments, relates to an image sensor integrated chip. The image sensor integrated chip includes a substrate having a first side and a second side opposing the first side. The substrate has one or more sidewalls defining a trench extending along opposing sides of a pixel region having a first width. An isolation structure including one or more dielectric materials is disposed within the trench. The isolation structure has a second width. An image sensing element and a focal region are disposed within the pixel region. The focal region is configured to receive incident radiation along the second side of the substrate. A ratio of the second width to the first width is in a range of between approximately 0.1 and approximately 0.2, so that the focal region is completely confined between interior sidewall of the isolation structure facing the image sensing element.
    Type: Application
    Filed: July 12, 2021
    Publication date: October 13, 2022
    Inventors: Cheng Yu Huang, Wei-Chieh Chiang, Keng-Yu Chou, Tzu-Hsuan Hsu
  • Publication number: 20220320173
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor device including a first image sensor element and a second image sensor element disposed within a substrate. An interconnect structure is disposed along a front-side surface of the substrate and comprises a plurality of conductive wires, a plurality of conductive vias, and a first absorption structure. The first image sensor element is configured to generate electrical signals from electromagnetic radiation within a first range of wavelengths. The second image sensor element is configured to generate electrical signals from the electromagnetic radiation within a second range of wavelengths that is different than the first range of wavelengths. The second image sensor element is laterally adjacent to the first image sensor element. Further, the first image sensor element overlies the first absorption structure and is spaced laterally between opposing sidewalls of the first absorption structure.
    Type: Application
    Filed: March 30, 2021
    Publication date: October 6, 2022
    Inventors: Keng-Yu Chou, Cheng Yu Huang, Chun-Hao Chuang, Wen-Hau Wu, Wei-Chieh Chiang, Wen-Chien Yu, Chih-Kung Chang
  • Publication number: 20220302194
    Abstract: The present disclosure relates to an integrated chip including a substrate and a pixel. The pixel includes a photodetector. The photodetector is in the substrate. The integrated chip further includes a first inner trench isolation structure and an outer trench isolation structure that extend into the substrate. The first inner trench isolation structure laterally surrounds the photodetector in a first closed loop. The outer trench isolation structure laterally surrounds the first inner trench isolation structure along a boundary of the pixel in a second closed loop and is laterally separated from the first inner trench isolation structure. Further, the integrated chip includes a scattering structure that is defined, at least in part, by the first inner trench isolation structure and that is configured to increase an angle at which radiation impinges on the outer trench isolation structure.
    Type: Application
    Filed: March 18, 2021
    Publication date: September 22, 2022
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu, Chih-Kung Chang
  • Patent number: 11404468
    Abstract: Various embodiments of the present application are directed towards an image sensor including a wavelength tunable narrow band filter, as well as methods for forming the image sensor. In some embodiments, the image sensor includes a substrate, a first photodetector, a second photodetector, and a filter. The first and second photodetectors neighbor in the substrate. The filter overlies the first and second photodetectors and includes a first distributed Bragg reflector (DBR), a second DBR, and a first interlayer between the first and second DBRs. A thickness of the first interlayer has a first thickness value overlying the first photodetector and a second thickness value overlying the second photodetector. In some embodiments, the filter is limited to a single interlayer. In other embodiments the filter further includes a second interlayer defining columnar structures embedded in the first interlayer and having a different refractive index than the first interlayer.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: August 2, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Kazuaki Hashimoto, Keng-Yu Chou, Wei-Chieh Chiang, Wen-Hau Wu, Chih-Kung Chang
  • Publication number: 20220231066
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor, and a method for forming the image sensor, in which an inter-pixel trench isolation structure is defined by a low-transmission layer. In some embodiments, the image sensor comprises an array of pixels and the inter-pixel trench isolation structure. The array of pixels is on a substrate, and the pixels of the array comprise individual photodetectors in the substrate. The inter-pixel trench isolation structure is in the substrate. Further, the inter-pixel trench isolation structure extends along boundaries of the pixels, and individually surrounds the photodetectors, to separate the photodetectors from each other. The inter-pixel trench isolation structure is defined by a low-transmission layer with low transmission for incident radiation, such that the inter-pixel trench isolation structure has low transmission for incident radiation.
    Type: Application
    Filed: January 15, 2021
    Publication date: July 21, 2022
    Inventors: Cheng Yu Huang, Chun-Hao Chuang, Keng-Yu Chou, Wei-Chieh Chiang, Chin-Chia Kuo, Wen-Hau Wu, Hua-Mao Chen, Chih-Kung Chang
  • Publication number: 20220216260
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes an image sensing element disposed within a substrate. A gate structure is disposed along a front-side of the substrate. A back-side of the substrate includes one or more first angled surfaces defining a central diffuser disposed over the image sensing element. The back-side of the substrate further includes second angled surfaces defining a plurality of peripheral diffusers laterally surrounding the central diffuser. The plurality of peripheral diffusers are a smaller size than the central diffuser.
    Type: Application
    Filed: January 4, 2021
    Publication date: July 7, 2022
    Inventors: Keng-Yu Chou, Chun-Hao Chuang, Jen-Cheng Liu, Kazuaki Hashimoto, Ming-En Chen, Shyh-Fann Ting, Shuang-Ji Tsai, Wei-Chieh Chiang
  • Publication number: 20220201498
    Abstract: The disclosure provides a base station and a method for optimizing the coverage of a self-defined network. The method includes: receiving a measurement report from user equipment; in response to determining that the measurement report indicates that a neighboring first base station is present, sending a member tracking message to the first base station; determining whether the first base station belongs to any other base station group based on a member tracking response from the first base station; in response to determining that the first base station does not belong to any other base station group, adding the first base station to a base station group managed by the base station; and in response to determining that the member tracking response indicates that the first base station belongs to another base station group, merging the base station group and the another base station group.
    Type: Application
    Filed: December 17, 2020
    Publication date: June 23, 2022
    Applicant: Industrial Technology Research Institute
    Inventors: Guan-Hsien Du, Tsun-Chieh Chiang
  • Publication number: 20220173140
    Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC comprises a first phase detection autofocus (PDAF) photodetector and a second PDAF photodetector in a substrate. A first electromagnetic radiation (EMR) diffuser is disposed along a back-side of the substrate and within a perimeter of the first PDAF photodetector. The first EMR diffuser is spaced a first distance from a first side of the first PDAF photodetector and a second distance less than the first distance from a second side of the first PDAF photodetector. A second EMR diffuser is disposed along the back-side of the substrate and within a perimeter of the second PDAF photodetector. The second EMR diffuser is spaced a third distance from a first side of the second PDAF photodetector and a fourth distance less than the third distance from a second side of the second PDAF photodetector.
    Type: Application
    Filed: February 1, 2022
    Publication date: June 2, 2022
    Inventors: Keng-Yu Chou, Chun-Hao Chuang, Kazuaki Hashimoto, Wei-Chieh Chiang, Cheng Yu Huang, Wen-Hau Wu, Chih-Kung Chang