Patents by Inventor Chieh-Pin Chang

Chieh-Pin Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11916098
    Abstract: An integrated inductor is provided. The integrated inductor includes a first winding and a second winding, and has a first end, a second end, and a node. The first winding utilizes the first end and the node as two ends thereof and includes a first coil and a second coil, which do not overlap. The second winding utilizes the second end and the node as two ends thereof and includes a third coil and a fourth coil, which do not overlap. The first coil and the third coil have an overlapping area, and the second coil and the fourth coil have an overlapping area. The first coil is surrounded by the third coil, and the fourth coil is surrounded by the second coil.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: February 27, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Cheng-Wei Luo, Chieh-Pin Chang, Kai-Yi Huang, Ta-Hsun Yeh
  • Patent number: 11848290
    Abstract: A semiconductor structure includes a first inductor, a second inductor, and a first input/output (I/O) pad. The first I/O pad is coupled to the first inductor and the second inductor. The first I/O pad, a first central axis of a first magnetic field of the first inductor, and a second central axis of a second magnetic field of the second inductor are disposed sequentially along a first direction.
    Type: Grant
    Filed: March 31, 2021
    Date of Patent: December 19, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Cheng-Wei Luo, Chieh-Pin Chang, Kai-Yi Huang, Ta-Hsun Yeh
  • Patent number: 11830648
    Abstract: Inductor device includes first and a second coils. First coil is wound into plural first circles. Second coil is wound into plural second circles. First connection member is coupled to first circle between outermost and innermost sides among first circles located at first area and first circle on outermost side among first circles located at second area. Second connection member is coupled to second circle on outermost side among second circles located at first area and second circle between outermost and innermost sides among second circles located at second area. At least two first circles of first circles are located at first area, and half of first circle of first circles is located at second area. Half of second circle of second circles is located at first area, and at least two second circles of second circles are located at second area.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: November 28, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chieh-Pin Chang, Cheng-Wei Luo, Kai-Yi Huang, Ta-Hsun Yeh
  • Publication number: 20230282407
    Abstract: An inductor device includes a first wire and a second wire. The first wire includes a first sub-wire and a second sub-wire. The first sub-wire is disposed in a first area. The second sub-wire is disposed in a second area, and the first sub-wire and the second sub-wire are located on different layers. The second wire includes a third sub-wire and a fourth sub-wire. The third sub-wire is disposed in the second area, and located below the second sub-wire. The fourth sub-wire is disposed in the first area, the third sub-wire and the fourth sub-wire are located on different layers, and the fourth sub-wire is located above the first sub-wire.
    Type: Application
    Filed: June 7, 2022
    Publication date: September 7, 2023
    Inventors: Chieh-Pin CHANG, Cheng-Wei LUO
  • Patent number: 11682518
    Abstract: An inductor device includes a first coil and a second coil. The first coil is wound into a plurality of first circles, and the second coil is wound into a plurality of second circles. At least two of the second circles are interlaced with at least two of the first circles on a first side. The at least two of the second circles are disposed adjacent to each other on the first side. At least one of the first circles is only interlaced with at least one of the second circles on a second side. At least another one of the first circles is only interlaced with at least another one of the second circles on the second side.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: June 20, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chieh-Pin Chang, Cheng-Wei Luo, Kai-Yi Huang, Ta-Hsun Yeh
  • Patent number: 11450599
    Abstract: An integrated circuit is provided. The integrated circuit includes a first trace, a second trace and a third trace. The first trace, the second trace and the third trace are each a continuous trace. The first trace, the second trace and the third trace together use only two conductor layers of a semiconductor structure. In a crossing area of the first trace, the second trace and the third trace, the first trace crosses the second trace once, the first trace crosses the third trace once, and the second trace crosses the third trace once.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: September 20, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Cheng-Wei Luo, Chieh-Pin Chang, Kai-Yi Huang, Ta-Hsun Yeh
  • Publication number: 20220270812
    Abstract: An inductor and an integrated circuit are provided. The inductor includes a first coil, a second coil, and a third coil. The first coil has a first input terminal and a first output terminal, and the first coil is winded in a first direction from the first input terminal to the first output terminal. The second has a second input terminal and a second output terminal, and the second coil is winded in a second direction which is opposite to the first direction from the second input terminal to the second output terminal. The third has a third input terminal and a third output terminal, and the third input terminal is connected to the first input terminal and the second input terminal.
    Type: Application
    Filed: April 13, 2021
    Publication date: August 25, 2022
    Inventors: Chieh-Pin CHANG, Cheng-Wei LUO, Kai-Yi HUANG, Ta-Hsun YEH
  • Publication number: 20220208437
    Abstract: The present invention discloses an inductor apparatus. Each of a first section of a second and a fourth quadrant loops are bridged to a first section of a former quadrant loop and are bridged to a third section to a second section of a diagonal quadrant loop. Each of a second section of the second and the fourth quadrant loops are coupled to a third section of the diagonal quadrant loop, and to the second section of a former quadrant loop. A first section of a third quadrant loop is coupled to a first section of the fourth quadrant loop, and to a third section of the first quadrant loop. The second section of the third quadrant loop is coupled to a second section of the fourth quadrant loop and to a third section of the third quadrant loop, and to a third section of the first quadrant loop.
    Type: Application
    Filed: December 15, 2021
    Publication date: June 30, 2022
    Inventors: CHENG-WEI LUO, CHIEH-PIN CHANG, KAI-YI HUANG, TA-HSUN YEH
  • Publication number: 20220077083
    Abstract: A semiconductor structure includes a first inductor, a second inductor, and a first input/output (I/O) pad. The first I/O pad is coupled to the first inductor and the second inductor. The first I/O pad, a first central axis of a first magnetic field of the first inductor, and a second central axis of a second magnetic field of the second inductor are disposed sequentially along a first direction.
    Type: Application
    Filed: March 31, 2021
    Publication date: March 10, 2022
    Inventors: CHENG-WEI LUO, CHIEH-PIN CHANG, KAI-YI HUANG, TA-HSUN YEH
  • Publication number: 20210217695
    Abstract: An integrated circuit is provided. The integrated circuit includes a first trace, a second trace and a third trace. The first trace, the second trace and the third trace are each a continuous trace. The first trace, the second trace and the third trace together use only two conductor layers of a semiconductor structure. In a crossing area of the first trace, the second trace and the third trace, the first trace crosses the second trace once, the first trace crosses the third trace once, and the second trace crosses the third trace once.
    Type: Application
    Filed: January 8, 2021
    Publication date: July 15, 2021
    Inventors: CHENG-WEI LUO, CHIEH-PIN CHANG, KAI-YI HUANG, TA-HSUN YEH
  • Publication number: 20210202687
    Abstract: An integrated inductor is provided. The integrated inductor includes a first winding and a second winding, and has a first end, a second end, and a node. The first winding utilizes the first end and the node as two ends thereof and includes a first coil and a second coil, which do not overlap. The second winding utilizes the second end and the node as two ends thereof and includes a third coil and a fourth coil, which do not overlap. The first coil and the third coil have an overlapping area, and the second coil and the fourth coil have an overlapping area. The first coil is surrounded by the third coil, and the fourth coil is surrounded by the second coil.
    Type: Application
    Filed: December 28, 2020
    Publication date: July 1, 2021
    Inventors: CHENG-WEI LUO, CHIEH-PIN CHANG, KAI-YI HUANG, TA-HSUN YEH
  • Publication number: 20210193367
    Abstract: An integrated stack transformer is provided, wherein the integrated stack transformer includes a first winding, a second winding and a third winding implemented by a first metal layer, and a fourth winding and a fifth winding implemented by a second metal layer. The second winding is positioned between the first winding and the third winding, the fourth winding substantially overlaps the first winding, the fifth winding substantially overlaps the third winding, and a distance between the fifth winding and the fourth winding is less than a distance between the third winding and the first winding. The first winding, the third winding, the fourth winding and the fifth winding form a part of one of a primary inductor and a secondary inductor of the integrated stack transformer, and the second winding is a part of the other of the primary inductor and the secondary inductor.
    Type: Application
    Filed: December 8, 2020
    Publication date: June 24, 2021
    Inventors: Kai-Yi Huang, Cheng-Wei Luo, Chieh-Pin Chang, Ta-Hsun Yeh
  • Publication number: 20210090775
    Abstract: Inductor device includes first and a second coils. First coil is wound into plural first circles. Second coil is wound into plural second circles. First connection member is coupled to first circle between outermost and innermost sides among first circles located at first area and first circle on outermost side among first circles located at second area. Second connection member is coupled to second circle on outermost side among second circles located at first area and second circle between outermost and innermost sides among second circles located at second area. At least two first circles of first circles are located at first area, and half of first circle of first circles is located at second area. Half of second circle of second circles is located at first area, and at least two second circles of second circles are located at second area.
    Type: Application
    Filed: September 17, 2020
    Publication date: March 25, 2021
    Inventors: Chieh-Pin CHANG, Cheng-Wei LUO, Kai-Yi HUANG, Ta-Hsun YEH
  • Publication number: 20210090782
    Abstract: An inductor device includes a first coil and a second coil. The first coil includes a first connection member and a plurality of first circles. At least two first circles of the first circles are located at a first area, and half of the first circle of the first circles is located at a second area. The second coil includes a second connection member and a plurality of second circles. At least two second circles of the second circles are located at the second area, and half of the second circle of the second circles is located at the first area. The first connection member is coupled to the at least two first circles and the half of the first circle. The second connection member is coupled to the at least two second circles and the half of the second circle.
    Type: Application
    Filed: September 17, 2020
    Publication date: March 25, 2021
    Inventors: Cheng-Wei LUO, Chieh-Pin CHANG, Kai-Yi HUANG, Ta-Hsun YEH
  • Publication number: 20200395166
    Abstract: An inductor device includes a first coil and a second coil. The first coil is wound into a plurality of first circles, and the second coil is wound into a plurality of second circles. At least two of the second circles are interlaced with at least two of the first circles on a first side. The at least two of the second circles are disposed adjacent to each other on the first side. At least one of the first circles is only interlaced with at least one of the second circles on a second side. At least another one of the first circles is only interlaced with at least another one of the second circles on the second side.
    Type: Application
    Filed: June 3, 2020
    Publication date: December 17, 2020
    Inventors: CHIEH-PIN CHANG, CHENG-WEI LUO, KAI-YI HUANG, TA-HSUN YEH
  • Patent number: 9705173
    Abstract: A waveguide structure includes a signal line and two static lines. The signal line is disposed between the static lines in a first direction. The static lines and the signal line are disposed parallel to one another. Each static line includes a first conductive pattern, a second conductive pattern, and a third conductive pattern. The first conductive pattern and the signal line are disposed on an identical plane of a dielectric layer. A thickness of the first conductive pattern is substantially equal to a thickness of the signal line. The second conductive pattern is disposed on the first conductive pattern. A width of the first conductive pattern is larger than a width of the second conductive pattern in the first direction. The third conductive pattern is disposed on the second conductive pattern. A width of the third conductive pattern is larger than the width of the second conductive pattern.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: July 11, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Tzung-Lin Li, Chien-Yi Lee, Chieh-Pin Chang
  • Publication number: 20160197391
    Abstract: A waveguide structure includes a signal line and two static lines. The signal line is disposed between the static lines in a first direction. The static lines and the signal line are disposed parallel to one another. Each static line includes a first conductive pattern, a second conductive pattern, and a third conductive pattern. The first conductive pattern and the signal line are disposed on an identical plane of a dielectric layer. A thickness of the first conductive pattern is substantially equal to a thickness of the signal line. The second conductive pattern is disposed on the first conductive pattern. A width of the first conductive pattern is larger than a width of the second conductive pattern in the first direction. The third conductive pattern is disposed on the second conductive pattern. A width of the third conductive pattern is larger than the width of the second conductive pattern.
    Type: Application
    Filed: January 22, 2015
    Publication date: July 7, 2016
    Inventors: Tzung-Lin Li, Chien-Yi Lee, Chieh-Pin Chang
  • Patent number: 9052332
    Abstract: A pizeoresistive type Z-axis accelerometer is provided, including a substrate; a plurality of anchors formed over the substrate; a plurality of cantilever beams, wherein the cantilever beams include a piezoresistive material; and a proof mass, wherein the proof mass is suspended over the substrate by respectively connecting the proof mass with the anchors, and the accelerometer senses a movement of the proof mass by the piezoresistive material.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: June 9, 2015
    Assignee: RichWave Technology Corp.
    Inventors: Chih-Wei Huang, Chieh-Pin Chang, Ja-Hao Chen, Chuan-Jane Chao, Ying-Zong Juang, Shyh-Chyi Wong, Yeong-Her Wang
  • Patent number: 8904868
    Abstract: A sensing apparatus includes an acceleration sensing unit, for measuring an acceleration applied to a proof mass, further including: a proof mass; a carrier signal source, for providing a carrier signal; a capacitive half-bridge, including a first and a second capacitor, wherein each capacitor is coupled to the proof mass and the carrier signal source, one with a positive electrode and the other one with a negative electrode, and the acceleration applied to the proof mass makes the carrier signal flow through the first and the second capacitor so that the first capacitor and the second capacitor respectively generates a first voltage and a second voltage variation which have opposite phases with each other; and an instrumentation amplifier, for receiving and amplifying the first voltage and the second voltage variation, whereby the magnitude and the direction of the acceleration applied to the proof mass is determined.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: December 9, 2014
    Assignee: RichWave Technology Corp.
    Inventors: Chih-Wei Huang, Chieh-Pin Chang, Ja-Hao Chen, Chuan-Jane Chao, Ying-Zong Juang, Shyh-Chyi Wong, Yeong-Her Wang
  • Publication number: 20130091949
    Abstract: A pizeoresistive type Z-axis accelerometer is provided, including a substrate; a plurality of anchors formed over the substrate; a plurality of cantilever beams, wherein the cantilever beams include a piezoresistive material; and a proof mass, wherein the proof mass is suspended over the substrate by respectively connecting the proof mass with the anchors, and the accelerometer senses a movement of the proof mass by the piezoresistive material.
    Type: Application
    Filed: May 31, 2012
    Publication date: April 18, 2013
    Applicant: RICHWAVE TECHNOLOGY CORP.
    Inventors: Chih-Wei HUANG, Chieh-Pin CHANG, Ja-Hao CHEN, Chuan-Jane CHAO, Ying-Zong JUANG, Shyh-Chyi WONG, Yeong-Her WANG