Abstract: Methods, devices, systems, and apparatus including computer-readable mediums for managing error correction coding in memory systems are provided. In one aspect, a memory system includes a system controller configured to communicate with a host device, and a memory device coupled to the system controller. The memory device includes at least one memory and a memory controller coupled to the at least one memory. The memory controller includes an error correction code (ECC) circuit configured to perform error correction coding for data received from at least one of the system controller or the at least one memory.

Abstract: A class-D amplifier with good signal-to-noise ratio (SNR) performance is shown. The class-D amplifier includes a loop filter, a pulse-width modulation signal generator, a gate driver, a power driver, and a feedback circuit, which are configured to establish a closed amplification loop. The feedback circuit is configured to establish a feedback path. The class-D amplifier further includes a feedback breaker. The feedback breaker breaks the feedback path in response to conditions in which there no-signal information in the class-D amplifier.

Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.

Abstract: A method for forming a semiconductor memory structure includes forming a plurality of conductive wire structures over a semiconductor substrate, and forming a plurality of spacer structures along the sidewalls of the conductive wire structures. Each of the spacer structures includes a first spacer. The method also includes forming a plurality of dielectric strips across the conductive wire structures, forming a plurality of conductive strips over the conductive wire structures and the dielectric strips, performing a patterning process on the conductive strips to form a plurality of conductive pads, and removing the first spacer of each of the spacer structures to form a gap in each of the spacer structures.

Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, and a plurality of field plates. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure in a first direction respectively. The field plates are disposed on the semiconductor substrate. Each of the field plates is partly located above the gate structure and partly located between the gate structure and the drain region. The gate structure is electrically connected with at least one of the field plates, and the source region is electrically connected with at least one of the field plates.

Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, and a plurality of field plates. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure in a first direction respectively. The field plates are disposed on the semiconductor substrate. Each of the field plates is partly located above the gate structure and partly located between the gate structure and the drain region. The gate structure is electrically connected with at least one of the field plates, and the source region is electrically connected with at least one of the field plates.

Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a source region, a drain region, and a plurality of field plates. The gate structure is disposed on the semiconductor substrate. The source region and the drain region are disposed in the semiconductor substrate and located at two opposite sides of the gate structure in a first direction respectively. The field plates are disposed on the semiconductor substrate. Each of the field plates is partly located above the gate structure and partly located between the gate structure and the drain region. The gate structure is electrically connected with at least one of the field plates, and the source region is electrically connected with at least one of the field plates.

Abstract: A portable electronic device including a first body, a second body, a heat source, a first heat pipe, a second heat pipe, and a heat conducting element is provided. The second body is pivotally connected to the first body. The heat source is disposed in the first body and thermally coupled to the heat source. The second heat pipe is disposed in the first body and thermally coupled to the first heat pipe. The heat conducting element is connected to and thermally coupled to the second body, and the heat conducting element slidably contacts the second heat pipe and is thermally coupled to the second heat pipe.

Abstract: A cloud platform includes several web services that facilitate the automated tuning and deployment of pre-trained deep learning models configured for software engineering tasks. The automated tuning and deployment allow a developer to fine-tune a pre-existing model without having access to the parameters of the pre-existing and the fine-tuned model in a manner that does not require user management input. The cloud platform provides a set of files for each pre-trained models used to automatically build a fine-tuning infrastructure to fine-tune a model and a deployment infrastructure that deploys the fine-tuned model without requiring user input.

Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a gate structure formed over a fin structure, and a source/drain (S/D) epitaxial layer formed in the fin structure and adjacent to the gate structure. The S/D epitaxial layer includes a first S/D epitaxial layer and a second epitaxial layer. The semiconductor structure includes a gate spacer formed on a sidewall surface of the gate structure, and the gate spacer is directly over the first S/D epitaxial layer. The semiconductor structure includes a dielectric spacer formed adjacent to the gate spacer, and the dielectric spacer is directly over the second epitaxial layer.

Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.

Abstract: A controllable and stable sinking/floating system for cage aquaculture is illustrated, which has a net cage and the sinking/floating units. The net cage comprises a frame and a net body installed on the frame. The sinking/floating units are installed on the frame, each of the sinking/floating units comprises a water storage chamber and a liquid flow controller, the water storage chamber has an inlet and an outlet, and the liquid flow controller controls water to flow out via the outlet from the water storage chamber or to flow into the water storage chamber via the inlet. When the water flows out via the outlet from the water storage chamber, the sinking/floating unit floats; and when the water flows into the water storage chamber via the inlet, the sinking/floating unit sinks.

Abstract: A control circuit of a power converter is coupled to an output stage and controls it to convert an input voltage into an output voltage and generate an output current. The control circuit includes a ripple generation circuit, a synthesis circuit, an error amplifier, a comparator and a PWM circuit. The ripple generation circuit generates a ripple signal according to an input voltage, an output voltage and output current. The synthesis circuit receives the ripple signal and a first feedback signal related to output voltage to provide a second feedback signal. The error amplifier receives the second feedback signal and a reference voltage to generate an error signal. The comparator receives a ramp signal and error signal to generate a comparison signal. The PWM circuit generates a PWM signal to control output stage according to the comparison signal. A slope of ripple signal is changed with the output current.

Abstract: A display panel and a spliced display are provided. The display panel includes a substrate, a plurality of light-emitting elements, a driving circuit, and an optical sensor. The substrate includes a through hole, and the through hole includes a hole. The plurality of the light-emitting elements are disposed on the substrate. The through hole is located in a region between two of the plurality of the light-emitting elements. The driving circuit is disposed on the substrate and electrically connected to the plurality of the light-emitting elements. The optical sensor is disposed corresponding to the through hole and receives sensing light through the hole. The width W of the hole meets the equation of H?W<D. H is the depth of the hole, and D is the distance between the two of the plurality of the light-emitting elements.

Abstract: An apparatus includes a chamber, a pedestal configured to receive and support a semiconductor wafer in the chamber, and an edge ring disposed over the pedestal. The edge ring includes a first portion having a first top surface, a second portion coupled to the first portion and having a second top surface lower than the first top surface, and a recess defined in the first portion. The second top surface is under the semiconductor wafer. The recess has a depth, and a distance between the pedestal and an inner surface of the recess is substantially equal to the depth of the recess.

Abstract: In a method of manufacturing a semiconductor device, semiconductor layers, which are vertically arranged with a space between adjacent semiconductor layers, are provided over a substrate, an interfacial layer is formed around each of the semiconductor layers, a dielectric layer is formed on the interfacial layer around each of the semiconductor layers, a first conductive layer is formed on the dielectric layer, the first conductive layer is removed so that the dielectric layer is exposed, a second conductive layer is formed on the exposed dielectric layer so that the space between adjacent semiconductor layers is not fully filled by the second conductive layer, a third conductive layer is formed on the second conductive layer so that the space between adjacent semiconductor layers is filled by the third conductive layer, and the semiconductor layers are semiconductor wires or sheets.

Abstract: A polycarbonate polyester includes residues of following formula (1), formula (2) and formula (3): in which R1 is C2-C15 hydrocarbon group; R2 is C4-C16 hydrocarbon group; a molar ratio of the residue of the formula (2) to the residue of the formula (1) is in a range of greater than 0.05 to less than 0.8; * represents a linking bond.

Abstract: A portable electronic device including a first body, a second body, a pivot element, a heat source, a first flexible heat conductive element, and a flip cover is provided. The pivot element is connected to the second body, and the second body is pivotally connected to the first body through the pivot element. The heat source is disposed in the first body. The first flexible heat conductive element is thermally coupled to the heat source and extends toward the pivot element from the heat source. The first flexible heat conductive element passes through the pivot element and extends into the inside of the second body and is thus thermally coupled to the second body. The flip cover is pivotally connected to the first body and located on a moving path of the pivot element.

Abstract: An optical displacement sensing system is provided. With configuration of an optical sensor disposed on a displacement platform and in cooperation with a broadband light source and an optical spectrum analyzer, when the displacement platform moves, the waveguide grating of the optical sensor is resonated and the reflected light provided with a resonance wavelength is formed. The waveguide grating has the plurality of grating periods, and when the displacement platform moves to a different position to make the broadband light source correspond to a different grating period, the position can correspond to the different resonance wavelength. Therefore, according to the aforementioned configuration, the position is determined according to the different resonance wavelength, instead of using an optical encoder; furthermore, the micrometer-scale or nanometer-scale displacement detection is achieved.

Abstract: A method for determining zero crossing occurrence in an alternating current (AC) signal with constant frequency of a permanent magnet synchronous motor (PMSM) includes: sampling the AC signal to obtain a plurality of data points; starting to count a number of consecutive data points that have sampled values with a same sign in a detection range, to generate a count value, wherein the consecutive data points are included in the plurality of data points; determining whether the count value is equal to a zero crossing determination value; and in response to the count value being equal to the zero crossing determination value, determining that a zero crossing occurs at a last data point of the consecutive data points.