Patents by Inventor Chieh Wang

Chieh Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11398482
    Abstract: A semiconductor device including a cap layer and a method for forming the same are disclosed. In an embodiment, a method includes epitaxially growing a first semiconductor layer over an N-well; etching the first semiconductor layer to form a first recess; epitaxially growing a second semiconductor layer filling the first recess; etching the second semiconductor layer, the first semiconductor layer, and the N-well to form a first fin; forming a shallow trench isolation region adjacent the first fin; and forming a cap layer over the first fin, the cap layer contacting the second semiconductor layer, forming the cap layer including performing a pre-clean process to remove a native oxide from exposed surfaces of the second semiconductor layer; performing a sublimation process to produce a first precursor; and performing a deposition process wherein material from the first precursor is deposited on the second semiconductor layer to form the cap layer.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: July 26, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Wang, Yueh-Ching Pai, Huai-Tei Yang
  • Publication number: 20220229477
    Abstract: A heat dissipation system of a portable electronic device is provided. The heat dissipation system includes a body and at least one fan. A heat source of the portable electronic device is disposed in the body. The fan is a centrifugal fan disposed in the body. The fan has at least one flow inlet, at least one flow outlet, and at least one spacing portion. The flow outlet faces toward the heat source, and the spacing portion surrounds the flow inlet and abuts against the body, so as to isolate the flow inlet and the heat source in two spaces independent of each other in the body.
    Type: Application
    Filed: January 11, 2022
    Publication date: July 21, 2022
    Applicant: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Kuang-Hua Lin, Chun-Chieh Wang, Shu-Hao Kuo
  • Publication number: 20220223598
    Abstract: A semiconductor structure and its manufacturing method are provided. A semiconductor structure includes a substrate and several bit lines on the substrate. Each of the bit lines includes a first conductive layer on the substrate, a second conductive layer on the first conductive layer, and a hardmask layer on the second conductive layer. The semiconductor structure further includes several contacts disposed on the substrate and positioned between two adjacent bit lines, wherein the bottom surfaces of the contacts physically contact the substrate. The top surfaces of the contacts are not higher than the top surfaces of the hardmask layers. Each of the contacts includes a bottom contact part on the substrate and a top contact part on the bottom contact part, and a width of a top surface of the top contact part is greater than a width of a top surface of the bottom contact part.
    Type: Application
    Filed: January 11, 2022
    Publication date: July 14, 2022
    Inventors: Tzu-Ming OU YANG, Chun-Chieh WANG, Shu-Ming LEE
  • Publication number: 20220211908
    Abstract: The present disclosure provides a decellularized extracellular matrix, the preparation process and uses thereof. The decellularized extracellular matrix of the present disclosure is derived from a three-dimensional cell spheroid, and the decellularized extracellular matrix has a three-dimensional spherical structure. The decellularized extracellular matrix of the present disclosure can be used to prepare a biomedical material scaffold for promoting tissue regeneration and repair.
    Type: Application
    Filed: March 11, 2021
    Publication date: July 7, 2022
    Inventors: Chieh-Cheng Huang, Cheng-En Chiang, Yi-Qiao Fang, Chao-Ting Ho, Yu-Chieh Wang, Anna Blocki
  • Publication number: 20220216648
    Abstract: A connector combination structure is provided. The connector combination structure includes a first connector and a second connector. The first connector includes a first joint and at least one wedging portion. The second connector includes a housing, a second joint and at least one wedging arm. The second joint and the wedging arm are disposed in the housing. The wedging arm is adapted to be rotated between a first arm position and a second arm position. The first joint is adapted to be inserted into the housing to be connected to the second joint. When the wedging arm is located in the first arm position, the wedging arm is adapted to wedge the wedging portion. When the wedging arm is in the second arm position, the wedging arm is adapted to release the wedging portion.
    Type: Application
    Filed: August 4, 2021
    Publication date: July 7, 2022
    Inventors: Che-Min LIN, Po-Nien KO, Yi-Chieh WANG, Po-Wen WANG
  • Patent number: 11376776
    Abstract: The present disclosure provides a method of measuring a true shear viscosity profile of a molding material in a capillary and a molding system performing the same. The method includes the operations of: determining a setpoint temperature of the molding material before injecting into the capillary; obtaining an initial shear viscosity profile at the setpoint temperature with respect to a shear rate of the molding material; fitting an initial temperature profile with respect to the shear rate according to the initial shear viscosity based on Cross William-Landel-Ferry model; fitting a first shear viscosity profile and a first temperature profile with respect to the shear rate according to the initial temperature profile based on the Cross-WLF model; and setting the first shear viscosity profile as the true shear viscosity profile when a difference between the first temperature profile and the initial temperature profile is not greater than a threshold.
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: July 5, 2022
    Assignee: CORETECH SYSTEM CO., LTD.
    Inventors: Chen-Chieh Wang, Yu-Ho Wen, Guo-Sian Cyue, Chih-Chung Hsu, Chia-Hsiang Hsu, Rong-Yeu Chang
  • Publication number: 20220208383
    Abstract: A method and a system for mental index prediction are provided. The method includes the following steps. A plurality of images of a subject person are obtained. A plurality of emotion tags of the subject person in the images are analyzed. A plurality of integrated emotion tags in a plurality of predetermined time periods are calculated according to the emotion tags respectively corresponding to the images. A plurality of preferred features are determined according to the integrated emotion tags. A mental index prediction model is established according to the preferred features to predict a mental index according to the emotional index prediction model.
    Type: Application
    Filed: July 2, 2021
    Publication date: June 30, 2022
    Applicants: Acer Incorporated, National Yang Ming Chiao Tung University
    Inventors: Chun-Hsien Li, Szu-Chieh Wang, Andy Ho, Liang-Kung Chen, Jun-Hong Chen, Li-Ning Peng, Tsung-Han Yang, Yun-Hsuan Chan, Tsung-Hsien Tsai
  • Patent number: 11374729
    Abstract: An audio synchronization processing method is provided. The method includes the following steps: receiving an input request signal; in response to receiving the input request signal, starting performing a counting operation according to a basic clock signal; outputting an output request signal according to a sampling-clock signal; in response to outputting the output request signal, stopping performing the counting operation to obtain a counting value; determining whether synchronization has been achieved based on the counting value; and in response to determining that the synchronization has not been reached, adjusting a frequency of the sampling-clock signal according to the counting value.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: June 28, 2022
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Cheng-Chieh Wang, Ming-Ying Liu
  • Publication number: 20220195053
    Abstract: The present invention provides methods of treating gastrointestinal disorders with modulators of the WNT signaling pathway. Also provided are methods of dosing and pharmaceutical compositions.
    Type: Application
    Filed: March 11, 2020
    Publication date: June 23, 2022
    Applicant: Surrozen Operating Inc.
    Inventors: Yang LI, Chenggang LU, Hélène BARIBAULT, Wen-Chen YEH, Liqin XIE, I-Chieh WANG, Weixu MENG
  • Publication number: 20220176677
    Abstract: The present invention relates to a composite laminate plate, a housing and a mobile communication device. The composite laminate includes a top metal layer with a through hole and an array antenna, and an area ratio of the array antenna to the through hole meets a specific range, thereby enhancing wave transmissivity of a millimeter wave. Moreover, the composite laminate has a specific material structure, such that it has good mechanical properties and low density. The housing and the mobile communication device made by the composite laminate have advantages of metallic texture, high signal intensity and excellent effect for light weight tendency.
    Type: Application
    Filed: October 8, 2021
    Publication date: June 9, 2022
    Inventors: Yen-Lin HUANG, Pei-Jung TSAI, Li-De WANG, Chun-Chieh WANG
  • Publication number: 20220182040
    Abstract: A filter circuit includes a polyphase filter used to generate a plurality of output signals with different phases according to a plurality of input signals. The polyphase filter includes a switch circuit and a feed-forward capacitor. The switch circuit has a control terminal used to receive a control voltage, a first connection terminal used to output one of the output signals, and a second connection terminal used to receive one of the input signals. The feed-forward capacitor has a first plate coupled to the second connection terminal of the switch circuit and a second plate coupled to the control terminal of the switch circuit.
    Type: Application
    Filed: October 18, 2021
    Publication date: June 9, 2022
    Applicant: MEDIATEK INC.
    Inventors: Fong-Wen Lee, Wen-Chieh Wang, Yu-Hsin Lin
  • Patent number: 11355938
    Abstract: A charging load detection circuit includes a charging circuit, a frequency generation unit, and a control unit. The control unit controls the frequency generation unit to generate a pulse voltage with a fixed first frequency and a fixed first amplitude, and the frequency generation unit provides the pulse voltage to an output terminal of the charging circuit. The control unit detects whether a load is coupled to the output terminal by detecting whether the first frequency and the first amplitude are varied, and controls connecting or disconnecting a charging path of the charging circuit according to whether the load is coupled to the output terminal.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: June 7, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Ting-Yun Lu, Shih-Chung Wang, Ying-Chieh Wang
  • Publication number: 20220174403
    Abstract: A speaker module adapted to be disposed on a wearable device. The speaker module includes at least one driving unit and an enclosure. The driving unit is configured to produce sound. The enclosure contains the driving unit and has a front chamber and a rear chamber. The front chamber and the rear chamber are individually located at two opposite sides of the driving unit. The enclosure has a front opening, a first rear opening, and a second rear opening. The front opening communicates with the front chamber. The first rear opening and the second rear opening individually communicate with the rear chamber. A sum of sound outputted from the front opening, the first rear opening, and the second rear opening has directivity.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 2, 2022
    Applicant: HTC Corporation
    Inventors: Yen-Chieh Wang, Sung Jen Wang, Yu-Zhen He
  • Fan
    Patent number: 11339796
    Abstract: A fan blade includes an arch-shaped body, a connecting portion, at least one sheet and at least one reinforcement component. The arch-shaped body has a pressure bearing surface and a negative pressure surface opposite to the pressure bearing surface. The connecting portion is connected to a first end portion of the arch-shaped body. The sheet is connected to the pressure bearing surface or the negative pressure surface. The reinforcement component is connected to the pressure bearing surface. An orthogonal projection of the sheet on the arch-shaped body and an orthogonal projection of the reinforcement component on the arch-shaped body are not overlapped with each other. A fan is also provided.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: May 24, 2022
    Assignee: Acer Incorporated
    Inventors: Chun-Chieh Wang, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin
  • Patent number: 11334427
    Abstract: A non-volatile dual in-line memory module (NVDIMM) instantiates first and second partitions of non-volatile memory. The first partition is reserved and is not accessible to an operating system instantiated. The second partition is accessible to the operating system. A processor detects a first bad memory location in the second partition, stores a first system physical address of the first bad memory location to a system bad memory locations list, and stores a first DIMM physical address of the first bad memory location to a first NVDIMM bad memory locations list in the first partition.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: May 17, 2022
    Assignee: Dell Products L.P.
    Inventors: Ching-Lung Chao, Shih-Hao Wang, Hsin-Chieh Wang
  • Patent number: 11335827
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of light-emitting elements on a first substrate and forming a first pattern array on a second substrate. The method also includes transferring the plurality of light-emitting elements from the first substrate to the second substrate. The method further includes forming the first pattern array on a third substrate. In addition, the method includes transferring the plurality of light-emitting elements from the second substrate to the third substrate. The method also includes forming a second pattern array on a fourth substrate. The method further includes transferring the plurality of light-emitting elements from the third substrate to the fourth substrate. The pitch between the plurality of light-emitting elements on the first substrate is different than the pitch of the first pattern array.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: May 17, 2022
    Assignee: INNOLUX CORPORATION
    Inventors: Kai Cheng, Tsau-Hua Hsieh, Fang-Ying Lin, Tung-Kai Liu, Hui-Chieh Wang, Chun-Hsien Lin, Jui-Feng Ko
  • Publication number: 20220149157
    Abstract: The present disclosure describes an exemplary fin structure formed on a substrate. The disclosed fin structure comprises an n-type doped region formed on a top portion of the substrate, a silicon epitaxial layer on the n-type doped region, and an epitaxial stack on the silicon epitaxial layer, wherein the epitaxial stack comprises a silicon-based seed layer in physical contact with the silicon epitaxial layer. The fin structure can further comprise a liner surrounding the n-type doped region, and a dielectric surrounding the liner.
    Type: Application
    Filed: January 24, 2022
    Publication date: May 12, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shahaji B. MORE, Huai-Tei YANG, Zheng-Yang PAN, Shih-Chieh CHANG, Chun-Chieh WANG, Cheng-Han LEE
  • Publication number: 20220139707
    Abstract: Generally, the present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In a method embodiment, a dielectric layer is formed on a semiconductor substrate. The semiconductor substrate has a source/drain region. An opening is formed through the dielectric layer to the source/drain region. A silicide region is formed on the source/drain region and a barrier layer is formed in the opening along sidewalls of the dielectric layer by a same Plasma-Enhance Chemical Vapor Deposition (PECVD) process.
    Type: Application
    Filed: January 18, 2022
    Publication date: May 5, 2022
    Inventors: Cheng-Wei Chang, Min-Hsiu Hung, Hung-Yi Huang, Chun Chieh Wang, Yu-Ting Lin
  • Publication number: 20220132700
    Abstract: A heat dissipation system of portable electronic device includes a body, at least one fan and at least one spacing member. At least one heat source of the portable electronic device is arranged in the body. The fan is a centrifugal fan disposed in the body. The fan has at least one flow inlet located in the axial direction and at least one flow outlet located in the radial direction. The spacing member is disposed on at least one of the body or the fan to form a stratified air flow in the body along the axial direction. The stratified air flows into the fan through the flow inlet and out of the fan through the flow outlet respectively.
    Type: Application
    Filed: September 10, 2021
    Publication date: April 28, 2022
    Applicant: Acer Incorporated
    Inventors: Tsung-Ting Chen, Wen-Neng Liao, Cheng-Wen Hsieh, Yu-Ming Lin, Wei-Chin Chen, Kuang-Hua Lin, Chun-Chieh Wang, Shu-Hao Kuo
  • Patent number: 11316428
    Abstract: A time signal generating circuit of a power converter and a control method thereof are provided. The time signal generating circuit includes a reference frequency generating circuit, an on-time circuit and a frequency tracking circuit. The reference frequency generating circuit provides a reference frequency signal. The on-time circuit provides an on-time signal according to a first reference signal and a second reference signal. The second reference signal is related to an output voltage of the power converter. The frequency tracking circuit is coupled to the reference frequency generating circuit and the on-time circuit, and compares frequencies of the reference frequency signal and the on-time signal within a default time to generate a tracking signal. The on-time circuit adjusts the second reference signal according to the tracking signal, so that the on-time circuit adjusts the frequency of the on-time signal.
    Type: Grant
    Filed: October 20, 2020
    Date of Patent: April 26, 2022
    Assignee: uPI Semiconductor Corp.
    Inventors: Chih-Lien Chang, Chun-Chieh Wang