Patents by Inventor Chien-An Yu

Chien-An Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142749
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a first movable assembly and a first driving assembly. The first movable assembly is configured to connect a first optical element, and the first movable assembly is movable relative to the fixed assembly. The first driving assembly is configured to drive the first movable assembly to move relative to the fixed assembly in a first dimension.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: Chao-Chang HU, Chen-Hsien FAN, Chih-Wen CHIANG, Chien-Yu KAO
  • Patent number: 11973133
    Abstract: A method for fabricating a semiconductor device includes the steps of providing a substrate having a high electron mobility transistor (HEMT) region and a capacitor region, forming a first mesa isolation on the HEMT region and a second mesa isolation on the capacitor region, forming a HEMT on the first mesa isolation, and then forming a capacitor on the second mesa isolation.
    Type: Grant
    Filed: May 8, 2023
    Date of Patent: April 30, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Hsing Lee, Sheng-Yuan Hsueh, Chien-Liang Wu, Kuo-Yu Liao
  • Patent number: 11973052
    Abstract: An electronic device includes a bond wire with a first end bonded by a ball bond to a planar side of a first conductive plate, and a second end bonded by a stitch bond to a conductive stud bump at an angle greater than or equal to 60 degrees. A wirebonding method includes bonding the first end of the conductive bond wire to the first conductive plate includes forming a ball bond to join the first end of the conductive bond wire to a planar side of the first conductive plate by a ball bond, and bonding the second end of the conductive bond wire to the conductive stud bump includes forming a stitch bond to join the second end of the conductive bond wire to the conductive stud bump.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: April 30, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Chien-Chang Li, Hung-Yu Chou, Sheng-Wen Huang, Zi-Xian Zhan, Byron Lovell Williams
  • Publication number: 20240138030
    Abstract: An electrothermal module includes a first conductive layer, a second conductive layer, and a heat generating layer. The first conductive layer and the second conductive layer respectively include silver metal. The heat generating layer has a first portion, the first portion is disposed between the first conductive layer and the second conductive layer to form an electrothermal conversion portion of the electrothermal module, and the heat generating layer includes a conductive carbon material.
    Type: Application
    Filed: September 26, 2023
    Publication date: April 25, 2024
    Inventors: Hou-Sheng HUANG, Chien-Lung SHEN, Shu-Chu TSAI, Hung-Yu LIN
  • Publication number: 20240133737
    Abstract: The present disclosure provides a test system and method. The test system is configured to analyze a system platform and includes a data collector and a test monitor. The data collector is configured to receive a signal transmitted between a controller and a memory of the system platform and is configured to process the signal to generate a processed signal. The test monitor is configured to encode the processed signal into a log information, so as to determine an operation status of the system platform according to the log information.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 25, 2024
    Inventors: Chien Yu CHEN, Meng-Kai HSIEH
  • Publication number: 20240134167
    Abstract: An optical path folding element includes a main body, a light absorption film layer and a matte structure. The main body has optical surface including an incident surface, a reflective surface and an emitting surface. A light enters into the optical folding element through the incident surface. The reflective surface reflects the light so as to change a traveling direction thereof. The light exits the optical folding element through the emitting surface. The light absorbing film layer is configured to reduce reflectance and provided adjacent to at least part of the optical surface, and the light absorbing film layer is in physical contact with the main body. The matte structure is disposed adjacent to at least part of the optical surface. The matte structure provides an undulating profile on a surface of the optical path folding element, and the matte structure is formed in one-piece with the main body.
    Type: Application
    Filed: September 24, 2023
    Publication date: April 25, 2024
    Applicant: LARGAN PRECISION CO., LTD.
    Inventors: Ssu-Hsin LIU, Chen Wei FAN, Chien-Hsun WU, Wen-Yu TSAI, Ming-Ta CHOU
  • Publication number: 20240135854
    Abstract: A method involves measuring, for an optical property of the display panel for an input gray level and at a first refresh rate, first and second values at respective first and second ambient brightness levels. The method also involves determining a compensation factor for the input gray level at the first refresh rate. The method further involves determining a modified gamma value at a second refresh rate, wherein the modified gamma value reduces a perceived optical defect of the display panel when operating at the second refresh rate by maintaining a consistent delta difference in values for the optical property between the first and second refresh rates at different ambient brightness levels. The method additionally involves storing the modified gamma value, where the device is configured to adjust input display data using the modified gamma value when transitioning from the first refresh rate to the second refresh rate.
    Type: Application
    Filed: April 12, 2021
    Publication date: April 25, 2024
    Inventors: Chien-Hui Wen, Hsin-Yu Chen
  • Publication number: 20240134239
    Abstract: A display device including a substrate, a cholesteric liquid crystal layer, and a transparent electrode layer that are sequentially stacked is provided. The cholesteric liquid crystal layer includes cholesteric liquid crystal molecules and a plurality of transparent photoresist structures. Each of the transparent photoresist structures is a closed structure, and the cholesteric liquid crystal molecules are respectively accommodated in a plurality of patterned areas respectively surrounded by the transparent photoresist structures, so as to form a plurality of cholesteric liquid crystal patterns. The transparent electrode layer includes a plurality of sub-electrodes. The cholesteric liquid crystal patterns are respectively driven by the sub-electrodes. An orthogonal projection of each of the transparent photoresist structures on the substrate falls in an orthogonal projection of a corresponding sub-electrode of the sub-electrodes on the substrate.
    Type: Application
    Filed: October 22, 2023
    Publication date: April 25, 2024
    Applicant: AUO Corporation
    Inventors: Chun-Han Lee, Chien-Chuan Chen, Ju-Wen Chang, Hsin Chiang Chiang, Peng-Yu Chen
  • Patent number: 11963533
    Abstract: The disclosure provides stable antimicrobial (e.g., antibacterial or antifungal or both) peptides (SAMPs) that may be used in methods of preventing or treating a bacterial disease (e.g., a Liberibacter disease, such as citrus greening disease (also called Huanglongbing (HLB)) or potato Zebra Chip disease, and other bacterial diseases such as those caused by Agrobacterium tumefaciens (also known as Rhizobium radiobacter) and Pseudomonas syringae) in plants (e.g., citrus plants or potato plants). SAMPs disclosed herein may be heat stable, as well as stable in plant extracts and/or in plant lysates (e.g., citrus lysates).
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: April 23, 2024
    Assignee: The Regents of The University of California
    Inventors: Hailing Jin, Chien Yu Huang
  • Publication number: 20240128955
    Abstract: An integrated circuit includes a semiconductor substrate and a plurality of circuit elements in or on the substrate. The circuit elements are defined by standard layout cells selected from a cell library. The circuit elements including a plurality of flip-flops. Each flip-flop has a data input terminal, a data output terminal, a clock input terminal, and a clock output terminal. A first one of the flip-flops directly abuts a second flip-flop such that the clock output terminal of the first flip-flop electrically connects with the clock input terminal of the second flip-flop.
    Type: Application
    Filed: April 24, 2023
    Publication date: April 18, 2024
    Inventors: Shao-Yu Steve Wang, Chien-Te Wu, Shang-Chih Hsieh, Nick Tsai
  • Publication number: 20240124887
    Abstract: The present disclosure provides methods and compositions for increasing resistance of plants to a disease caused by infection with bacteria of a Liberibacter species.
    Type: Application
    Filed: February 9, 2022
    Publication date: April 18, 2024
    Applicant: The Regents of the University of California
    Inventors: Hailing Jin, Chien Yu Huang
  • Publication number: 20240128232
    Abstract: A semiconductor package includes a first semiconductor die, an encapsulant, a high-modulus dielectric layer and a redistribution structure. The first semiconductor die includes a conductive post in a protective layer. The encapsulant encapsulates the first semiconductor die, wherein the encapsulant is made of a first material. The high-modulus dielectric layer extends on the encapsulant and the protective layer, wherein the high-modulus dielectric layer is made of a second material. The redistribution structure extends on the high-modulus dielectric layer, wherein the redistribution structure includes a redistribution dielectric layer, and the redistribution dielectric layer is made of a third material. The protective layer is made of a fourth material, and a ratio of a Young's modulus of the second material to a Young's modulus of the fourth material is at least 1.5.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Ding Wang, Yen-Fu Su, Hao-Cheng Hou, Jung-Wei Cheng, Chien-Hsun Lee, Hsin-Yu Pan
  • Patent number: 11960253
    Abstract: A system and a method for parameter optimization with adaptive search space and a user interface using the same are provided. The system includes a data acquisition unit, an adaptive adjustment unit and an optimization search unit. The data acquisition unit obtains a set of executed values of several operating parameters and a target parameter. The adaptive adjustment unit includes a parameter space transformer and a search range definer. The parameter space transformer performs a space transformation on a parameter space of the operating parameters according to the executed values. The search range definer defines a parameter search range in a transformed parameter space based on the sets of the executed values. The optimization search unit takes the parameter search range as a limiting condition and takes optimizing the target parameter as a target to search for a set of recommended values of the operating parameters.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: April 16, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Po-Yu Huang, Chun-Fang Chen, Hong-Chi Ku, Te-Ming Chen, Chien-Liang Lai, Sen-Chia Chang
  • Patent number: 11961770
    Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Han Lin, Chien-Fa Lee, Hsu-Shui Liu, Jiun-Rong Pai, Sheng-Hsiang Chuang, Surendra Kumar Soni, Shou-Wen Kuo, Wu-An Weng, Gary Tsai, Chien-Ko Liao, Ya Hsun Hsueh, Becky Liao, Ethan Yu, Ming-Chi Tsai, Kuo-Yi Liu
  • Publication number: 20240118964
    Abstract: A fault analysis device and a fault analysis method of the fault analysis device are provided. A sensing circuit senses a first distorted signal on a first signal transmission path of an abnormal signal device when the abnormal signal device performs a preset operation. A signal generating circuit provides a fault test signal to a second signal transmission path of a standard device corresponding to the first signal transmission path when the standard device performs the preset operation, so as to generate a second distorted signal on the second signal transmission path, where the first distorted signal and the second distorted signal have the same signal distortion characteristics.
    Type: Application
    Filed: October 5, 2022
    Publication date: April 11, 2024
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventors: Chien Yu Chen, Meng-Kai Hsieh
  • Patent number: 11951624
    Abstract: A robotic arm system includes first robotic arm, second robotic arm and main controller. The first robotic arm and the second robotic arm are configured to grab object. The main controller is configured to: determine whether first force vector of first force applied by the first robotic arm to the object is equal to second force vector of second force applied by the second robotic arm to the object; when the first force vector and the second force vector are not equal, obtain a first difference between the first force vector and the second force vector; and according to the first difference, change at least one of the first force applied by the first robotic arm to the object and the second force applied by the second robotic arm to the object so that the first force vector and the second force vector are equal.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: April 9, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chien-Yu Wu, Shang-Kun Li, Shu Huang
  • Patent number: 11953063
    Abstract: A normally closed disc clamp system includes a housing with a rotating disc, a brake ring and a pressure-enhancing ring arranged therein. When only a first chamber is supplied with fluid, the fluid pushes the brake ring to release the rotating disc. When only a second chamber is fed with fluid, the fluid pushes the brake ring to keep the rotating disc in the braking state, and pushes the pressure-enhancing ring to compress an elastic unit. The energy generated by the compression of the elastic unit acts on the brake ring through the fluid, so that the brake ring achieves a double pressurization effect. If the action of the fluid fails, the brake ring can still provide a braking effect to the rotating disc through the elastic unit to improve operational safety. Further, the present invention further provides a rotating table using the normally closed disc clamp system.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: April 9, 2024
    Assignee: HIWIN TECHNOLOGIES CORP.
    Inventors: Peng-Wen Chen, Chien-Yu Lin, Li-Wen Huang
  • Patent number: 11955890
    Abstract: A switching converter circuit for switching one end of an inductor therein between plural voltages according to a pulse width modulation (PWM) signal to convert an input voltage to an output voltage. The switching converter circuit has a driver circuit including a high side driver, a low side driver, a high side sensor circuit, and a low side sensor circuit. The high side sensor circuit is configured to sense a gate-source voltage of a high side metal oxide semiconductor field effect transistor (MOSFET), to generate a low side enable signal for enabling the low side driver to switch a low side MOSFET according to the PWM signal. The low side sensor circuit is configured to sense a gate-source voltage of a low side MOSFET, to generate a high side enable signal for enabling the high side driver to switch a high side MOSFET according to the PWM signal.
    Type: Grant
    Filed: January 2, 2022
    Date of Patent: April 9, 2024
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Ting-Wei Liao, Chien-Yu Chen, Kun-Huang Yu, Chien-Wei Chiu, Ta-Yung Yang
  • Patent number: 11956919
    Abstract: A cold plate is provided and includes: a housing disposed with a chamber; a base combined with the housing to form a working space separated from the chamber but connected with the chamber through an interconnecting structure to allow a working medium to flow within the chamber and the working space; a heat transfer structure disposed on the inner side of the base; and a pump disposed within the working space to drive the working medium in the working space. As such, the cold plate can provide better heat dissipation performance.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: April 9, 2024
    Assignee: AURAS TECHNOLOGY CO., LTD.
    Inventors: Chien-An Chen, Chien-Yu Chen, Tian-Li Ye, Jen-Hao Lin, Wei-Shen Lee
  • Patent number: D1024352
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: April 23, 2024
    Inventors: Chien-Yu Peng, Pei-Hsiu Kao, Ching-Yu Chang