Patents by Inventor Chien-Chen Lin

Chien-Chen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190004718
    Abstract: Various embodiments for configurable memory storage systems are disclosed. The configurable memory storages selectively choose an operational voltage signal from among multiple operational voltage signals to dynamically control various operational parameters. For example, the configurable memory storages selectively choose a maximum operational voltage signal from among the multiple operational voltage signals to maximize read/write speed. As another example, the configurable memory storages selectively choose a minimum operational voltage signal from among the multiple operational voltage signals to control minimize power consumption.
    Type: Application
    Filed: March 28, 2018
    Publication date: January 3, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Yu-Hao HSU, Cheng Hung Lee, Chen-Lin Yang, Chiting Cheng, Fu-An Wu, Hung-Jen Liao, Jung-Ping Yang, Jonathan Tsung-Yung Chang, Wei Min Chan, Yen-Huei Chen, Yangsyu Lin, Chien-Chen Lin
  • Patent number: 10153035
    Abstract: A memory device includes a memory cell array comprising a plurality of memory cells wherein each of the plurality of memory cells is configured to be in a data state, and a physically unclonable function (PUF) generator. The PUF generator further includes a first sense amplifier, coupled to the plurality of memory cells, wherein while the plurality of memory cells are being accessed, the first sense amplifier is configured to compare accessing speeds of first and second memory cells of the plurality of memory cells, and based on the comparison, provide a first output signal for generating a first PUF signature.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: December 11, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-Chen Lin, Wei Min Chan, Chih-Yu Lin, Shih-Lien Linus Lu, Yen-Huei Chen
  • Publication number: 20180151226
    Abstract: A cell structure is disclosed. The cell structure includes a first unit comprising a first group of transistors and a first data latch, a second unit comprising a second group of transistors and a second data latch a read port unit comprising a plurality of p-type transistors, a search line and a complementary search line, the search line and the complementary search line function as input of the cell structure, and a master line, the master line functions as an output of the cell structure, the first unit is coupled to the second unit, both the first and the second units are coupled to the read port unit. According to some embodiments, the first data latch comprises a first and a second p-type transistors, a first and a second n-type transistors.
    Type: Application
    Filed: October 31, 2017
    Publication date: May 31, 2018
    Inventors: Hidehiro FUJIWARA, Hung-Jen LIAO, Hsien-Yu PAN, Chih-Yu LIN, Yen-Huei CHEN, Chien-Chen LIN
  • Publication number: 20180102163
    Abstract: A memory device includes a memory cell array comprising a plurality of memory cells wherein each of the plurality of memory cells is configured to be in a data state, and a physically unclonable function (PUF) generator. The PUF generator further includes a first sense amplifier, coupled to the plurality of memory cells, wherein while the plurality of memory cells are being accessed, the first sense amplifier is configured to compare accessing speeds of first and second memory cells of the plurality of memory cells, and based on the comparison, provide a first output signal for generating a first PUF signature.
    Type: Application
    Filed: October 7, 2016
    Publication date: April 12, 2018
    Inventors: Chien-Chen LIN, Wei-Min Chan, Chih-Yu Lin, Shih-Lien Linus Lu, Yen-Huei Chen
  • Publication number: 20180102907
    Abstract: A memory device includes a memory block that includes a plurality of memory bits, wherein each bit is configured to present a first logical state; and an authentication circuit, coupled to the plurality of memory bits, wherein the authentication circuit is configured to access a first bit under either a reduced read margin or a reduced write margin condition to determine a stability of the first bit by detecting whether the first logical state flips to a second logical state, and based on the determined stability of at least the first bit, to generate a physically unclonable function (PUF) signature.
    Type: Application
    Filed: October 7, 2016
    Publication date: April 12, 2018
    Inventors: Chien-Chen LIN, Shih-Lien Linus LU, Wei-Min CHAN
  • Publication number: 20180069711
    Abstract: A memory device includes a memory block comprises a plurality of bits, wherein at least a first bit of the plurality of bits presents an initial logic state each time it is powered on; a start-up circuit configured to power on and off the memory block N times, where N is an odd integer greater than 1, and wherein the at least first bit presents an initial state after each respective power cycle of the memory block; and an authentication circuit, coupled to the memory block, and comprising an election engine that is configured to elect an initial state that occurs (N+1)/2 or more times after N power cycles that are performed by the start-up circuit, as a majority initial logic state for the first bit.
    Type: Application
    Filed: September 8, 2016
    Publication date: March 8, 2018
    Inventors: Shih-Lien Linus LU, Wei-Min Chan, Chien-Chen Lin
  • Patent number: 9722584
    Abstract: Provided is a non-volatile latch, which includes a latch circuit, a first switch circuit, a non-volatile memory device, a second switch circuit and a third switch circuit. A first terminal of the first switch circuit is coupled to a first output terminal of the latch circuit. The first switch circuit is turned off in a normal operation period. A first terminal of the non-volatile memory device is coupled to a second terminal of the first switch circuit. A second terminal of the non-volatile memory device is coupled to a programming voltage via the second switch circuit. In a store period, according to latched data of the latch circuit and a state transformation condition of the non-volatile memory device, the third switch circuit can dynamically determine whether to couple the first terminal of the non-volatile memory device to a reference voltage.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: August 1, 2017
    Assignee: National Tsing Hua University
    Inventors: Meng-Fan Chang, Albert Lee, Chieh-Pu Lo, Chien-Chen Lin
  • Patent number: 9716930
    Abstract: A wireless speaker system including one or more self-propelled speaker device is provided. The self-propelled speaker device includes a processing unit, a wireless audio transmitter/receiver unit, a speaker unit, a tracking unit, and an actuator. The wireless audio transmitter/receiver unit is coupled to the processing unit and configured to receive an audio signal via a wireless transmission interface. The speaker unit is coupled to the processing unit and configured to produce sound according to the audio signal. The tracking unit is coupled to the processing unit and configured to track a location of a mobile device. The actuator is coupled to the processing unit. The processing unit controls the actuator according to the location of the mobile device. The actuator drives the self-propelled speaker device to move along with the mobile device.
    Type: Grant
    Filed: June 15, 2016
    Date of Patent: July 25, 2017
    Assignee: AIROHA TECHNOLOGY CORP.
    Inventors: Heng-Chih Lin, Wen-Sheng Hou, Chien-Chen Lin
  • Publication number: 20170192099
    Abstract: The present invention provides an apparatus and method for reducing harmonic interference to GPS signal reception. The apparatus comprises a RF transceiver module, a GPS signal reception path, and a harmonic distortion predictor. The RF transceiver module generates a first signal to be transmitted. The harmonic distortion predictor is used for establishing an estimated harmonic distortion sample based on the first signal. The GPS signal reception path receives an analog GPS signal, and converts the analog GPS signal into a digital GPS signal. The digital GPS signal subtracts the estimated harmonic distortion sample to obtain an accurate digital GPS signal. Thereby, the harmonic interference may be eliminated from the GPS signal in digital domain by means of digitally form so as to reduce distortion of the GPS signal.
    Type: Application
    Filed: January 6, 2016
    Publication date: July 6, 2017
    Inventors: HENG-CHIH LIN, WEN-SHENG HOU, CHIEN-CHEN LIN
  • Publication number: 20170195762
    Abstract: A wireless speaker system including one or more self-propelled speaker device is provided. The self-propelled speaker device includes a processing unit, a wireless audio transmitter/receiver unit, a speaker unit, a tracking unit, and an actuator. The wireless audio transmitter/receiver unit is coupled to the processing unit and configured to receive an audio signal via a wireless transmission interface. The speaker unit is coupled to the processing unit and configured to produce sound according to the audio signal. The tracking unit is coupled to the processing unit and configured to track a location of a mobile device. The actuator is coupled to the processing unit. The processing unit controls the actuator according to the location of the mobile device. The actuator drives the self-propelled speaker device to move along with the mobile device.
    Type: Application
    Filed: June 15, 2016
    Publication date: July 6, 2017
    Inventors: Heng-Chih Lin, Wen-Sheng Hou, Chien-Chen Lin
  • Publication number: 20170185372
    Abstract: An electronic device includes an audio reception circuit, a processing circuit and at least one movable component. The audio reception circuit receives an audio data. The processing circuit performs an audio feature analysis on the audio data to obtain audio feature data, and determines a corresponding action event according to audio feature data to generate an action control signal corresponding to the action event. The movable component performs the action event in response to the action control signal.
    Type: Application
    Filed: August 18, 2016
    Publication date: June 29, 2017
    Inventors: Wen-Sheng Hou, Heng-Chih Lin, Chien-Chen Lin
  • Patent number: 9666205
    Abstract: A voice enhancement method is disclosed. The method of the present invention is adapted for a distributed system. In the present invention, a plurality of picking devices are disposed in a space for picking voice signal. After determining the positions of the picking devices, an enhancement operation is performed on the waveform signals from the picking devices to generate an enhanced voice signal.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: May 30, 2017
    Assignee: Airoha Technology Corp.
    Inventors: Heng-Chih Lin, Wen-Sheng Hou, Chien-Chen Lin
  • Patent number: 9660399
    Abstract: An electrical connector comprises an insulating housing, several first and second conductive terminals, an inner grounding unit, and an outer grounding unit, which are disposed on the insulating housing. The insulating housing has a first surface, an opposite second surface, and two side surfaces arranged between the first and second surfaces. The inner grounding unit has a plate embedded in the insulating housing and two protruding sheets extended from the plate and respectively protruding from the side surfaces of the insulating housing. The plate is arranged to separate the first conductive terminals from the second conductive terminals. The outer grounding unit clips the insulating housing and engages the protruding sheets. A portion of the outer grounding unit engaged with one of the protruding sheets includes two stacked engaging portions, and at least one of the two stacked engaging portions has a thru-hole for engaging with the corresponding protruding sheet.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: May 23, 2017
    Assignee: CHIEF LAND ELECTRONIC CO., LTD.
    Inventors: Hsin-Hung Hsu, Chien-Chen Lin, Chung-Nan Pao
  • Publication number: 20170070013
    Abstract: An electrical connector comprises an insulating housing, several first and second conductive terminals, an inner grounding unit, and an outer grounding unit, which are disposed on the insulating housing. The insulating housing has a first surface, an opposite second surface, and two side surfaces arranged between the first and second surfaces. The inner grounding unit has a plate embedded in the insulating housing and two protruding sheets extended from the plate and respectively protruding from the side surfaces of the insulating housing. The plate is arranged to separate the first conductive terminals from the second conductive terminals. The outer grounding unit clips the insulating housing and engages the protruding sheets. A portion of the outer grounding unit engaged with one of the protruding sheets includes two stacked engaging portions, and at least one of the two stacked engaging portions has a thru-hole for engaging with the corresponding protruding sheet.
    Type: Application
    Filed: February 11, 2016
    Publication date: March 9, 2017
    Inventors: HSIN-HUNG HSU, CHIEN-CHEN LIN, CHUNG-NAN PAO
  • Patent number: 9564209
    Abstract: A non-volatile SRAM cell comprises a first inverter, a second inverter, a first access transistor, a second access transistor, and a variable resistive element. The first inverter voltage is supplied by a first differential supply. The second inverter voltage is supplied by a second differential supply. The variable resistive element coupling with a third access transistor in series is coupled to the first output node. The non-volatile SRAM cell operates in a restore operation comprising a dual supply initialization phase and a pulse-overwrite phase. During the dual supply initialization phase, the first differential supply increases before the second differential supply so as to initialize the first output node to a logic state. During the pulse-overwrite phase, the third access transistor is turned on for a switch period in order to discharge/charge the first output node.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: February 7, 2017
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Albert Lee, Chien-Chen Lin, Chieh-Pu Lo, Meng-Fan Chang
  • Patent number: 9525244
    Abstract: An electrical connector comprises an insulating housing, several first and second conductive terminals, an inner grounding unit, and an outer grounding unit, which are disposed on the insulating housing. The first conductive terminals have a pair of first inside signal terminals and two pairs of first outside signal terminals respectively arranged at two opposite sides of the pair of first inside signal terminals. The inner grounding unit is arranged between the first conductive terminals and the second conductive terminals. The outer grounding unit has a first sheet portion covering the insulating housing and at least one first transverse shielding sheet electrically connected to the first sheet portion. The first transverse shielding sheet is arranged between the two pairs of first outside signal terminals and arranged at one of two opposite sides of the pair of first inside signal terminals.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: December 20, 2016
    Assignee: CHIEF LAND ELECTRONIC CO., LTD.
    Inventors: Hsin-Hung Hsu, Chien-Chen Lin, Chung-Nan Pao
  • Publication number: 20160352456
    Abstract: An apparatus and method for improved processing of audio and video in the wireless multimedia communication. By setting a SNR estimator in the de-modulator and connecting a PLC trigger between the de-modulator and the PLC module in parallel. The SNR estimator can calculate the signal to noise ratio (SNR) of the wireless signal in the de-modulator directly. The PLC trigger can calculate the losing condition of the digital signal and make the decision whether proceeds the packet loss concealment (PLC) depend on the condition to make the PLC to the highest efficiency.
    Type: Application
    Filed: May 26, 2015
    Publication date: December 1, 2016
    Inventors: WEN-SHENG HOU, CHIEN-CHEN LIN
  • Patent number: 9502114
    Abstract: A cell for a non-volatile ternary content-addressable (TCAM) memory is provided. The cell comprises a first variable resistive element, a first transistor and a charge control transistor. Two terminals of the first variable resistive element are respectively electrically coupled to a first search-line and a storage node. A drain electrode of the first transistor is electrically coupled to the storage node. A source electrode of the first transistor is electrically coupled to a low-side search-line. A gate electrode of the charge control transistor coupled to a match-line is electrically coupled to the storage node. When the cell operates in a search phase and the first transistor is turned on, a pulse voltage is applied across the first search-line and the low-side search-line for determining whether the voltage of the storage node is larger than a match threshold during the period of the pulse.
    Type: Grant
    Filed: November 14, 2015
    Date of Patent: November 22, 2016
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Chien-Chen Lin, Albert Lee, Chieh-Pu Lo, Meng-Fan Chang
  • Patent number: 9484096
    Abstract: A ternary content-addressable memory comprises a first switch, a first static random-access memory cell, a second switch and a second static random-access memory cell. The first switch is connected between a first search line and a match line. The first switch has a first control electrode. The first static random-access memory cell has a first storage node connected to the first control electrode of the first switch. The second switch is connected between a second search line and the match line. The second switch has a second control node. The second static random-access memory cell has a second storage node connected to the second control electrode of the second switch.
    Type: Grant
    Filed: November 30, 2015
    Date of Patent: November 1, 2016
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Chien-Fu Chen, Chien-Chen Lin, Meng-Fan Chang
  • Patent number: D789302
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: June 13, 2017
    Assignee: CHIEF LAND ELECTRONIC CO., LTD.
    Inventors: Hsin-Hung Hsu, Chien-Chen Lin, Chung-Nan Pao