Abstract: A matching network circuit and an associated apparatus are provided. The matching network circuit includes a matching unit coupled between a common path port and a first path port of the matching network circuit, and an impedance unit coupled between the common path port and a second path port of the matching network circuit. The common path port is utilized for connecting the matching network circuit to a common path, the first path port is utilized for connecting the matching network circuit to a first device on a first path, and the second path port is utilized for connecting the matching network circuit to a second device on a second path. The matching unit is arranged for performing impedance matching between the common path port and the first path port, and the impedance unit is arranged for performing impedance matching between the common path port and the second path port.

Abstract: A data storage device with flash memory and a flash memory control method are disclosed, which upload the physical-to-logical address mapping information of one block to the flash memory section by section. A microcontroller is configured to allocate a flash memory to provide a first run-time write block. Between a first write operation and a second write operation of the first run-time write block, the microcontroller updates a logical-to-physical address mapping table in accordance with just part of a first physical-to-logical address mapping table. The logical-to-physical address mapping table is provided within the flash memory. The first physical-to-logical address mapping table is established in the random access memory to record logical addresses corresponding to physical addresses of one block.

Abstract: A method for maintaining address mapping for a flash memory module is disclosed including: recording a first set of addresses corresponding to a first set of sequential logical addresses in a first section of a first addressing block; recording a second set of addresses corresponding to a second set of sequential logical addresses in a second section of the first addressing block; recording a third set of addresses corresponding to a third set of sequential logical addresses in a first section of a second addressing block; and recording a fourth set of addresses corresponding to a fourth set of sequential logical addresses in a second section of the second addressing block; wherein the second set of logical addresses is successive to the first set of logical addresses, and the third set of logical addresses is successive to the second set of logical addresses.

Abstract: A data storage device and a flash memory control method with high efficiency are disclosed. The random access memory of the data storage device is allocated to provide a collection and update area for logical-to-physical address mapping tables that correspond to logical addresses recorded into the physical-to-logical address mapping table. When recording a logical address corresponding to a new logical-to-physical address mapping table that has not appeared in the collection and update area into the physical-to-logical address mapping table, the microcontroller of the data storage device is configured to collect the new logical-to-physical address mapping table into the collection and update area and perform an update of the new logical-to-physical address mapping table within the collection and update area.

Abstract: A method for maintaining address mapping for a flash memory module is disclosed including: recording a first set of addresses corresponding to a first set of sequential logical addresses in a first section of a first addressing block; recording a second set of addresses corresponding to a second set of sequential logical addresses in a second section of the first addressing block; recording a third set of addresses corresponding to a third set of sequential logical addresses in a first section of a second addressing block; and recording a fourth set of addresses corresponding to a fourth set of sequential logical addresses in a second section of the second addressing block; wherein the second set of logical addresses is successive to the first set of logical addresses, and the third set of logical addresses is successive to the second set of logical addresses.

Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.

Abstract: A semiconductor package and a method of manufacturing the same are provided. The semiconductor package includes: a substrate having a plurality of conductive lands and a plurality of bonding pads surrounding the conductive lands formed on a surface thereof; a plurality of passive devices mounted on the conductive lands; an insulation layer formed on the surface and having a portion of the passive devices embedded therein; a semiconductor chip mounted on a top surface of the insulation layer; a plurality of bonding wires electrically connecting the semiconductor chip and the bonding pads; an encapsulant formed on the surface of the substrate to encapsulate the insulation layer, the bonding wires and the semiconductor chip, wherein a region of the semiconductor chip projected onto the substrate covers a portion of an outermost one of the passive devices. Therefore, the mounting density of the passive devices is improved.

Abstract: A module for authenticating a user of a mobile device. The mobile device has an orientation sensor and a touch screen sensor. The module includes: a behavioral biometrics conversion element, used to perform calculation by matching timestamps with a plurality of behavioral data of operations, sensed by the orientation sensor and the touch screen sensor, on the mobile device to acquire a plurality of behavioral biometrics quantities, and convert, by using a statistical method, multiple sets of the behavioral biometrics quantities into a behavioral biometrics pattern in a histogram constructing manner; and an authentication mechanism core element, used to determine whether the behavioral biometrics pattern conforms to a behavioral biometrics model pattern in a histogram manner. The present invention further includes a method and a computer program product for authenticating a user of a smart phone.

Abstract: An audio/video (A/V) display system comprising a display and a peripheral device connected to the display. The display is capable of displaying a user interface. The peripheral device transmits raw data of the peripheral device to the display. The display enables an option corresponding to the peripheral device in the user interface after receiving the raw data of the peripheral device. Both the display and the peripheral device are controlled by a control device.

Abstract: The present invention discloses a transmit-receive (TR) front end. The TR front end comprises a low-noise amplifier (LNA); a power amplifier (PA); a transformer, coupled to the PA, for increasing a voltage swing and a power transmission of the PA; and a TR switch, coupled to the transformer at a first end and coupled to the LNA at a second end, wherein the second end is capable of being coupled to an antenna; wherein the LNA is single ended and there is no transformer between the LNA and the TR switch.

Abstract: A module for authenticating a user of a mobile device. The mobile device has an orientation sensor and a touch screen sensor. The module includes: a behavioral biometrics conversion element, used to perform calculation by matching timestamps with a plurality of behavioral data of operations, sensed by the orientation sensor and the touch screen sensor, on the mobile device to acquire a plurality of behavioral biometrics quantities, and convert, by using a statistical method, multiple sets of the behavioral biometrics quantities into a behavioral biometrics pattern in a histogram constructing manner; and an authentication mechanism core element, used to determine whether the behavioral biometrics pattern conforms to a behavioral biometrics model pattern in a histogram manner. The present invention further includes a method and a computer program product for authenticating a user of a smart phone.

Abstract: A package having ESD (electrostatic discharge) and EMI (electromagnetic interference) preventing functions includes: a substrate unit having a ground structure and an I/O structure disposed therein; at least a semiconductor component disposed on a surface of the substrate unit and electrically connected to the ground structure and the I/O structure; an encapsulant covering the surface of the substrate unit and the semiconductor component; and a metal layer disposed on exposed surfaces of the encapsulant and side surfaces of the substrate unit and electrically insulated from the ground structure, thereby protecting the semiconductor component against ESD and EMI so as to improve the product yield and reduce the risk of short circuits.

Abstract: A method for replacing the address of some bad bytes (bad columns) of the data area and the spare area to the good address of bytes (good columns) in non-volatile storage system is disclosed. The steps of the method are: waiting for a command from a host; judging if there is still some data to be processed; if no, go back to the previous step; if yes, go to next step; judging if a bad column is used; if no, process data access and go back to the step of judging if there is still some data to be processed; and if yes, process data accessing as original operation and increase the address by one.

Abstract: A method for improving performance of a few data access on a large area in non-volatile storage device is disclosed. The steps are: dividing data stored in a storage buffer to a L side with size of L-byte, a M side with size of M-byte, and a dummy with a predetermined size; The controller reads out the M side and storing in the RAM corresponding to the M side; updating a new data at the L-side from a host; combining the new dada and the data at M-side to become a present data; sending the present data to the storage buffer; and combining the present data and the data at the dummy side to become a final data, and programming the final data.

Abstract: A package having ESD (electrostatic discharge) and EMI (electromagnetic interference) preventing functions includes: a substrate unit having a ground structure and an I/O structure disposed therein; at least a semiconductor component disposed on a surface of the substrate unit and electrically connected to the ground structure and the I/O structure; an encapsulant covering the surface of the substrate unit and the semiconductor component; and a metal layer disposed on exposed surfaces of the encapsulant and side surfaces of the substrate unit and electrically insulated from the ground structure, thereby protecting the semiconductor component against ESD and EMI so as to improve the product yield and reduce the risk of short circuits.

Abstract: A method for performing block management is provided. The method is applied to a controller of a Flash memory, where the Flash memory includes a plurality of blocks. The method includes: adjusting a dynamic threshold according to at least one condition; and comparing a valid/invalid page count of a specific block of the plurality of blocks with the dynamic threshold to determine whether to erase the specific block. An associated memory device and a controller thereof are also provided, where the memory device includes the Flash memory and the controller. In particular, the controller includes a read only memory (ROM) arranged to store a program code, and further includes a microprocessor arranged to execute the program code to control access to the Flash memory and manage the plurality of blocks, where under control of the microprocessor, the controller operates according to the method.

Abstract: The present invention discloses a transmit-receive (TR) front end. The TR front end comprises a low-noise amplifier (LNA); a power amplifier (PA); a transformer, coupled to the PA, for increasing a voltage swing and a power transmission of the PA; and a TR switch, coupled to the transformer at a first end and coupled to the LNA at a second end, wherein the second end is capable of being coupled to an antenna; wherein the LNA is single ended and there is no transformer between the LNA and the TR switch.

Abstract: A transceiver includes: a first transforming network arranged for using a first input impedance to receive a first modulated signal and using a first output impedance to output a first transformed signal during a transmitting mode of a first communication standard, and for using the first input impedance to receive a second modulated signal and using a second output impedance to output a second transformed signal during the transmitting mode of a second communication standard; a second transforming network arranged for using a second input impedance to receive the second transformed signal and using a third output impedance to output a first RF signal to a connecting port of the transceiver during the transmitting mode of the second communication standard; a power amplifier, arranged to generate a second RF signal; and a switching circuit for selectively coupling the second transformed signal to the second transforming network.

Abstract: A scramble random seed prediction method with the storage device built-in data copy back procedure is disclosed. The method may predict a scramble random seed before first time programming. The data may be programmed with the scramble random seed based on the pager number of the block B, not block A, before programming data to block A. After data is moved from block A to block B with the storage device built-in data copy back procedure, the data in block B may be have the best scramble random seed. Therefore, compared to the conventional method of scrambling data or data movement, the moved data of this invention may be much more stable with the storage device data copy back procedure.

Abstract: A data storage device with flash memory and a flash memory control method are disclosed, which upload the physical-to-logical address mapping information of one block to the flash memory section by section. A microcontroller is configured to allocate a flash memory to provide a first run-time write block. Between a first write operation and a second write operation of the first run-time write block, the microcontroller updates a logical-to-physical address mapping table in accordance with just part of a first physical-to-logical address mapping table. The logical-to-physical address mapping table is provided within the flash memory. The first physical-to-logical address mapping table is established in the random access memory to record logical addresses corresponding to physical addresses of one block.