Patents by Inventor Chien-Chung Hung

Chien-Chung Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11937932
    Abstract: An acute kidney injury predicting system and a method thereof are proposed. A processor reads the data to be tested, the detection data, the machine learning algorithm and the risk probability comparison table from a main memory. The processor trains the detection data according to the machine learning algorithm to generate an acute kidney injury prediction model, and inputs the data to be tested into the acute kidney injury prediction model to generate an acute kidney injury characteristic risk probability and a data sequence table. The data sequence table lists the data to be tested in sequence according to a proportion of each of the data to be tested in the acute kidney injury characteristics. The processor selects one of the medical treatment data from the risk probability comparison table according to the acute kidney injury characteristic risk probability.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: March 26, 2024
    Assignees: TAICHUNG VETERANS GENERAL HOSPITAL, TUNGHAI UNIVERSITY
    Inventors: Chieh-Liang Wu, Chun-Te Huang, Cheng-Hsu Chen, Tsai-Jung Wang, Kai-Chih Pai, Chun-Ming Lai, Min-Shian Wang, Ruey-Kai Sheu, Lun-Chi Chen, Yan-Nan Lin, Chien-Lun Liao, Ta-Chun Hung, Chien-Chung Huang, Chia-Tien Hsu, Shang-Feng Tsai
  • Patent number: 11869943
    Abstract: A silicon carbide semiconductor device, in particular a monolithically integrated trench Metal-Oxide-Semiconductor Field-Effect Transistor with segmentally surrounded trench Schottky diode, includes a semiconductor substrate, a trench Metal-Oxide-Semiconductor Field-Effect Transistor and a trench Schottky diode. The trench Schottky diode has a perpendicularly disposed trench extending in a first horizontal direction, a metal electrode filled into the trench, and a plurality of doped regions disposed segmentally and extending in a second horizontal direction around the trench. The first horizontal direction is substantially orthogonal to the second horizontal direction, a side wall and a bottom wall of the metal electrode in the trench forms a Schottky junction, and the current flowing from the metal electrode is restricted between adjacent doped regions.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: January 9, 2024
    Assignee: SHANGHAI HESTIA POWER INC.
    Inventors: Chien-Chung Hung, Kuo-Ting Chu, Chwan-Yin Li
  • Patent number: 11827611
    Abstract: The present invention relates to a ubiquitin-specific peptidase 24 inhibitor, a medicinal composition including the same and a method of delaying or reversing multidrug resistance in cancers using the same. The USP24 inhibitor, which includes a shUSP24 RNA and/or a carbonyl substituted phenyl compound, can serve as a chemosensitizing agent for inhibiting the drug pump out, cancer sternness and genomic instability of cancer cells, thereby being applied to a medicinal composition and a method for delaying or reversing multidrug resistance in cancers.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: November 28, 2023
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Chien-Chung Hung, Ming-Jer Young
  • Patent number: 11615959
    Abstract: A silicon carbide (carborundum) semiconductor device and a manufacturing method thereof. The manufacturing method of the silicon carbide semiconductor device comprises the following steps of: providing a semiconductor component structure on a silicon carbide substrate, the semiconductor component structure being formed on a front side of the silicon carbide substrate; and forming a multi-layer structure on a back side of the silicon carbide substrate, the multi-layer structure comprising a plurality of ohmic contact layers and a plurality of gettering material layers. By dispersing the gettering material into multiple layers, and by adjusting a thickness combination of the ohmic contact layer and the gettering material layer, even if the gettering material layer is relatively thin (thickness sufficient for balling), a content is still sufficient for gettering carbon and reducing carbon aggregation and accumulation.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: March 28, 2023
    Assignee: HESTIA POWER SHANGHAI TECHNOLOGY INC.
    Inventors: Lurng-Shehng Lee, Chien-Chung Hung, Chwan-Ying Lee
  • Publication number: 20230064733
    Abstract: A silicon carbide (carborundum) semiconductor device and a manufacturing method thereof. The manufacturing method of the silicon carbide semiconductor device comprises the following steps of: providing a semiconductor component structure on a silicon carbide substrate, the semiconductor component structure being formed on a front side of the silicon carbide substrate; and forming a multi-layer structure on a back side of the silicon carbide substrate, the multi-layer structure comprising a plurality of ohmic contact layers and a plurality of gettering material layers. By dispersing the gettering material into multiple layers, and by adjusting a thickness combination of the ohmic contact layer and the gettering material layer, even if the gettering material layer is relatively thin (thickness sufficient for balling), a content is still sufficient for gettering carbon and reducing carbon aggregation and accumulation.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 2, 2023
    Inventors: Lurng-Shehng LEE, Chien-Chung HUNG, Chwan-Ying LEE
  • Publication number: 20220223730
    Abstract: A trench silicon carbide metal-oxide semiconductor field effect transistor includes a silicon carbide semiconductor substrate and a trench metal-oxide semiconductor field effect transistor, the field effect transistor includes a trench vertically arranged and penetrating along a first horizontal direction, a gate insulating layer formed on an inner wall of the trench, a first poly gate formed on the gate insulating layer, a shield region formed outsides and below the trench, and a field plate arranged between a bottom wall of the trench and the shield region, and the field plate has semiconductor doping and is laterally in contact to a current spreading layer to deplete electrons of the current spreading layer when a reverse bias voltage is applied.
    Type: Application
    Filed: January 11, 2021
    Publication date: July 14, 2022
    Inventors: Chien-Chung HUNG, Kuo-Ting CHU, Lurng-Shehng LEE, Chwan-Yin LI
  • Publication number: 20220190117
    Abstract: The invention provides a silicon carbide semiconductor device, in particular to a monolithically integrated trench Metal-Oxide-Semiconductor Field-Effect Transistor with segmentally surrounded trench Schottky diode, which comprises a semiconductor substrate, a trench Metal-Oxide-Semiconductor Field-Effect Transistor and a trench Schottky diode. The trench Schottky diode has a perpendicularly disposed trench extending in a first horizontal direction, a metal electrode filled into the trench, and a plurality of doped regions disposed segmentally and extending in a second horizontal direction around the trench. The first horizontal direction is substantially orthogonal to the second horizontal direction, a side wall and a bottom wall of the metal electrode in the trench forms a Schottky junction, and the current flowing from the metal electrode is restricted between adjacent doped regions.
    Type: Application
    Filed: December 11, 2020
    Publication date: June 16, 2022
    Inventors: Chien-Chung HUNG, Kuo-Ting CHU, Chwan-Yin LI
  • Publication number: 20220024887
    Abstract: The present invention relates to a ubiquitin-specific peptidase 24 inhibitor, a medicinal composition including the same and a method of delaying or reversing multidrug resistance in cancers using the same. The USP24 inhibitor, which includes a shUSP24 RNA and/or a carbonyl substituted phenyl compound, can serve as a chemosensitizing agent for inhibiting the drug pump out, cancer sternness and genomic instability of cancer cells, thereby being applied to a medicinal composition and a method for delaying or reversing multidrug resistance in cancers.
    Type: Application
    Filed: February 5, 2021
    Publication date: January 27, 2022
    Inventors: Chien-Chung HUNG, Ming-Jer YOUNG
  • Publication number: 20220025375
    Abstract: The present invention relates to a ubiquitin-specific peptidase 24 inhibitor, a medicinal composition and a method of delaying or reversing multidrug resistance in cancers using the same. The USP24 inhibitor, which includes a shUSP24 RNA and/or a carbonyl substituted phenyl compound, can serve as a chemosensitizing agent for inhibiting the drug pump out, cancer stemness and genomic instability of cancer cells, thereby being applied to a medicinal composition and a method for delaying or reversing multidrug resistance in cancers.
    Type: Application
    Filed: July 27, 2020
    Publication date: January 27, 2022
    Inventor: Chien-Chung HUNG
  • Patent number: 11222971
    Abstract: The present invention provides a silicon carbide (SiC) semiconductor device integrating a metal-oxide-semiconductor field-effect transistor (MOSFET) and a bidirectional voltage clamping circuit. An object of protecting a device is achieved by using the simple structure above, effectively preventing device damage that may be caused by a positive overvoltage and a negative overvoltage between a gate and a source.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: January 11, 2022
    Assignee: Shanghai Hestia Power Inc.
    Inventors: Cheng-Tyng Yen, Chien-Chung Hung, Fu-Jen Hsu, Kuo-Ting Chu
  • Patent number: 11184003
    Abstract: A silicon carbide power device is controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbide power device.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: November 23, 2021
    Assignee: SHANGHAI HESTIA POWER INC.
    Inventors: Fu-Jen Hsu, Chien-Chung Hung, Kuo-Ting Chu, Chwan-Ying Lee
  • Publication number: 20210273637
    Abstract: A silicon carbride power device controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbride power device.
    Type: Application
    Filed: September 3, 2020
    Publication date: September 2, 2021
    Inventors: Fu-Jen HSU, Chien-Chung HUNG, Kuo-Ting CHU, Chwan-Ying LEE
  • Publication number: 20210273636
    Abstract: A silicon carbide power device controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbide power device.
    Type: Application
    Filed: March 2, 2020
    Publication date: September 2, 2021
    Inventors: Fu-Jen HSU, Chien-Chung HUNG, Kuo-Ting CHU, Chwan-Ying LEE
  • Patent number: 11108388
    Abstract: A silicon carbide power device controlled by a driver and comprises a gate-to-source voltage and a source voltage, wherein the source voltage decreases according to an increase of the gate-to-source voltage, or the source voltage increases according to a decrease of the gate-to-source voltage. Thus, a spike caused by a change of the gate-to-source voltage is suppressed, thereby suppressing the crosstalk phenomenon of the silicon carbide power device.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: August 31, 2021
    Assignee: Shanghai Hestia Power, Inc.
    Inventors: Fu-Jen Hsu, Chien-Chung Hung, Kuo-Ting Chu, Chwan-Ying Lee
  • Publication number: 20200161466
    Abstract: The present invention provides a silicon carbide (SiC) semiconductor device integrating a metal-oxide-semiconductor field-effect transistor (MOSFET) and a bidirectional voltage clamping circuit. An object of protecting a device is achieved by using the simple structure above, effectively preventing device damage that may be caused by a positive overvoltage and a negative overvoltage between a gate and a source.
    Type: Application
    Filed: November 20, 2019
    Publication date: May 21, 2020
    Inventors: Cheng-Tyng YEN, Chien-Chung HUNG, Fu-Jen HSU, Kuo-Ting CHU
  • Patent number: 10497777
    Abstract: A semiconductor power device includes an n-type drift layer, a plurality of first p-doped regions, a plurality of n-doped regions, a plurality of second p-doped regions, a gate dielectric layer, a gate electrode, an interlayer dielectric layer and a plurality of source contacts. Each first p-doped region includes a first p-doped portion and a plurality of first p-doped arms extending outwards from the first p-doped portion. Each n-doped region includes an n-doped portion and a plurality of n-doped arms extending outwards from the n-doped portion.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: December 3, 2019
    Assignee: HESTIA POWER INC.
    Inventors: Cheng-Tyng Yen, Chien-Chung Hung, Chwan-Ying Lee
  • Patent number: 10483389
    Abstract: A silicon carbide (SiC) semiconductor device having a metal oxide semiconductor field effect transistor (MOSFET) and integrated with an anti-parallelly connected Schottky diode includes: an n-type substrate, an n-type drift layer, a plurality of doped regions, a gate dielectric layer, a gate electrode, an inter-layer dielectric layer, a plurality of source openings, a plurality of junction openings, a plurality of gate openings, a first metal layer and a second metal layer. The second metal layer at the junction openings forms the Schottky diode.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: November 19, 2019
    Assignee: HESTIA POWER INC.
    Inventors: Cheng-Tyng Yen, Chien-Chung Hung, Chwan-Ying Lee, Lurng-Shehng Lee
  • Patent number: 10418476
    Abstract: The present invention is related to a silicon carbide semiconductor device which employs a silicon carbide substrate to form an integrated device. The integrated device of the present invention comprises a metal oxide semiconductor field-effect transistor (MOSFET) and an integrated junction barrier Schottky (JBS) diode in an anti-parallel connection with the MOSFET.
    Type: Grant
    Filed: May 16, 2017
    Date of Patent: September 17, 2019
    Assignee: HESTIA POWER INC.
    Inventors: Cheng-Tyng Yen, Chien-Chung Hung, Chwan-Ying Lee
  • Patent number: 10396774
    Abstract: An intelligent power component module operable to be driven by a negative gate voltage integrates a wide bandgap semiconductor power unit, an adjustment unit and a driving unit so as to adjust a voltage level of the driving unit by the adjustment unit. Accordingly, the wide bandgap semiconductor power unit, in a driven state, comprises a driving voltage level alternating between a positive and a negative voltage.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: August 27, 2019
    Assignee: Hestia Power Inc.
    Inventors: Chien-Chung Hung, Fu-Jen Hsu, Cheng-Tyng Yen, Chwan-Ying Lee
  • Publication number: 20190181849
    Abstract: An intelligent power component module operable to be driven by a negative gate voltage integrates a wide bandgap semiconductor power unit, an adjustment unit and a driving unit so as to adjust a voltage level of the driving unit by the adjustment unit. Accordingly, the wide bandgap semiconductor power unit, in a driven state, comprises a driving voltage level alternating between a positive and a negative voltage.
    Type: Application
    Filed: September 14, 2017
    Publication date: June 13, 2019
    Inventors: Chien-Chung Hung, Fu-Jen Hsu, Cheng-Tyng Yen, Chwan-Ying Lee