Patents by Inventor Chien-Chung Hung

Chien-Chung Hung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6862228
    Abstract: The present invention relates to a simplified reference current generator for a magnetic random access memory. The reference current generator is positioned in the vicinity of the memory cells of the magnetic random access memory, and applies reference elements which are the same as the magnetic tunnel junctions of the memory cell and bear the same cross voltages. The plurality of reference elements are used for forming the reference current generator by one or several bit lines, and the voltage which is the same as the voltage of the memory cell is crossly connected to the reference elements so as to generate a plurality of current signals; and a peripheral IC circuit is used for generating the plurality of midpoint reference current signals and judging the data states. Thanks to the midpoint current reference signals, the multiple-states memory cell, including the 2-states memory cell, can read data more accurately.
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: March 1, 2005
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Tsung-Ming Pan, Yung-Hsiang Chen
  • Publication number: 20040252557
    Abstract: The present invention relates to a simplified reference current generator for a magnetic random access memory. The reference current generator is positioned in the vicinity of the memory cells of the magnetic random access memory, and applies reference elements which are the same as the magnetic tunnel junctions of the memory cell and bear the same cross voltages. The plurality reference elements are used for forming the reference current generator by applying one or several bit lines, and the voltage which is the same as the voltage of the memory cell is crossly connected to the reference elements so as to generate a plurality of current signals; and a peripheral IC circuit is used for generating the plurality of midpoint reference current signals and judging the data states. By means of the midpoint current reference signals, the multiple-states memory cell, including the 2-states memory cell, can read data more accurately.
    Type: Application
    Filed: July 2, 2004
    Publication date: December 16, 2004
    Applicant: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Tsung-Ming Pan, Yung-Hsiang Chen
  • Patent number: 6791887
    Abstract: The present invention relates to a simplified reference current generator for a magnetic random access memory. The reference current generator is positioned in the vicinity of the memory cells of the magnetic random access memory, and applies reference elements which are the same as the magnetic tunnel junctions of the memory cell and bear the same cross voltages. The plurality of reference elements are used for forming the reference current generator by using one or several bit lines, and the voltage which is the same as the voltage of the memory cell is crossly connected to the reference elements so as to generate a plurality of current signals; and a peripheral IC circuit is used for generating the plurality of midpoint reference current signals and judging the data states. Thanks to the midpoint reference current signals, the multiple-states memory cell, including the 2-states memory cell, can read data more accurately.
    Type: Grant
    Filed: September 4, 2003
    Date of Patent: September 14, 2004
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Tsung-Ming Pan, Yung-Hsiang Chen
  • Publication number: 20040130937
    Abstract: The present invention relates to a simplified reference current generator for a magnetic random access memory. The reference current generator is positioned in the vicinity of the memory cells of the magnetic random access memory, and applies reference elements which are the same as the magnetic tunnel junctions of the memory cell and bear the same cross voltages. The plurality reference elements are used for forming the reference current generator by applying one or several bit lines, and the voltage which is the same as the voltage of the memory cell is crossly connected to the reference elements so as to generate a plurality of current signals; and a peripheral IC circuit is used for generating the plurality of midpoint reference current signals and judging the data states. By means of the midpoint current reference signals, the multiple-states memory cell, including the 2-states memory cell, can read data more accurately.
    Type: Application
    Filed: September 4, 2003
    Publication date: July 8, 2004
    Applicant: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Tsung-Ming Pan, Yung-Hsiang Chen
  • Patent number: 6757189
    Abstract: High density magnetic random access memory (MRAM) is disclosed. In the MRAM, by using the multi-layered magnetic materials with different resistance characteristics, the magnetic tunnel junction (MTJ) cells are connected in parallel or in series, which are connected to a transistor, so as to be a control element for reading data without complicated reading procedure and timing, resulting in high density package of MRAM.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: June 29, 2004
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Tsung-Ming Pan
  • Publication number: 20040047204
    Abstract: High density magnetic random access memory (MRAM) is disclosed. In the MRAM, by using the multi-layered magnetic materials with different resistance characteristics, the magnetic tunnel junction (MTJ) cells are connected in parallel or in series, which are conneted to a transistor, so as to be a control element for reading data without complicated reading procedure and timing, resulting in high density package of MRAM.
    Type: Application
    Filed: April 24, 2003
    Publication date: March 11, 2004
    Applicant: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Ming-Jer Kao, Tsung-Ming Pan
  • Patent number: 6642595
    Abstract: A magnetic random access memory (MRAM) with a low write current, characterized in that an improved MRAM structure is composed of a plurality of conductive metal pillars disposed on both sides of a magnetic tunnel junction (MTJ) cell functioning as a memory cell. The conductive metal pillars generate a superposed magnetic field so as to reduce the write current into the MTJ cell, thereby reducing the power consumption during the operation of an MRAM. The metal pillars are formed by employing a modified mask so that a plurality of plugs are formed by via etching and metal deposition. Moreover, at least one turn of conductive metal coil is disposed near the memory cell. The enhanced magnetic field thus generated results in a lowered write current as well as reduced power consumption.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: November 4, 2003
    Assignee: Industrial Technology Research Institute
    Inventors: Chien-Chung Hung, Ming-Jer Kao
  • Publication number: 20020137264
    Abstract: Disclosed is a method for fabricating thin wafer insulated gate bipolar transistors (IGBTs), in which a portion on the back side of the device region is removed to form a hollow region with a depth that results in a device region thickness equivalent to the thickness of a thin wafer while the rest of the wafer remains its standard thickness. In other words, the method according to the present invention is suitable for the currently used wafer transfer stations under thin wafer conditions. The non-punch-through type insulated gate bipolar transistor (NPT-IGBT) fabricated with this method gets rid of an epi-layer and the “lifetime killer” process. The punch-through type insulated gate bipolar transistor (PT-IGBT) fabricated with this method has higher switching efficiency due to reduced injection efficiency of the p+-type minority carriers.
    Type: Application
    Filed: March 23, 2001
    Publication date: September 26, 2002
    Inventors: Ming-Jer Kao, Chien-Chung Hung, Jeng-Hua Wei, Jih-Shin Ho
  • Patent number: 5981999
    Abstract: A design for a trench DMOS transistor having improved current carrying capability is presented. The principal improvement lies in the periodic replacement of the individual cells in the array with a protection cell of a different size. When this is done it becomes possible to significantly increase the density of cells per unit area. This results in a corresponding improvement in the amount of channel area available to the device and hence an increase in its current carrying capability.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: November 9, 1999
    Assignee: Industrial Technology Research Institute
    Inventors: Chung-Min Liu, Chien-Chung Hung, Ming-Jinn Tsai, Ming-Jer Kao, June-Min Yao