Abstract: A shift register circuit has a plurality of shift registers connected in series, each shift register having a phase-shifting element and a pull-high element, wherein the phase-shifting element receives a first input signal, a first clock signal and a second clock signal, and the first clock signal and the second clock signal are complementary in phase. The pull-high element is used for pulling up an output signal to a high logic level, and includes a logic unit, wherein no current path is established in the pull-high element when the shift register is operated in any type of periods.

Abstract: A display device comprises a pixel structure. The pixel structure includes a first transistor having a gate and circuitry to initially set the first transistor gate at a first voltage. In response to a data signal received over a data line of the display device, the first transistor gate is set at a second voltage. The first transistor gate voltage transitions from the second voltage to a third voltage that is higher than the second voltage by a reference voltage. A light element is coupled to the first transistor and configured to emit light in response to a current through the light element.

Abstract: An organic light emitting diode circuit of an organic light emitting display with voltage compensation technique includes a first capacitor, a first TFT, a second TFT, a third TFT, a reset circuit and an OLED. The first TFT has a first terminal for receiving a first voltage, and a second terminal coupled to its gate and a first end of the first capacitor. The second TFT has a first terminal for receiving a second reference voltage and a gate coupled to the gate of the first TFT. The third TFT is coupled to the first capacitor and receives a pixel voltage and scan signal. The reset circuit sets the first end of the first capacitor to have a first voltage level. The OLED has an anode coupled to a second terminal of the second TFT and a cathode for receiving a third reference voltage. The first voltage level is smaller than a voltage level of the first reference voltage.

Abstract: A flat panel display, a display driving apparatus thereof and a shift thereof are disclosed. The shift register is adapted for driving a flat panel display. The shift register receives an input signal and a clock signal. The shift register includes a delay unit and a buffer unit. The delay unit is used to delay the input signal for a half period of the clock signal and then output the delayed input signal. The buffer unit receives the delayed input signal, and provides an extra driving power accordingly. The buffer unit is operated by a fixed first voltage and a fixed second voltage.

Abstract: A shift register includes a control unit, a signal switching unit and a buffer unit. The control unit determines whether to transfer an input signal from a first input terminal to a first output terminal according to a first control signal, and determines whether to conduct a first pre-defined voltage to a second output terminal according to a second control signal. The signal switching unit uses the signal output from the first output terminal as one of the considerations for determining whether to conduct a second pre-defined voltage to a third output terminal, and uses the second control signal as one of the considerations for determining whether to conduct the second pre-defined voltage to the first output terminal. The buffer unit outputs signal according to the signals from the first/third output terminals. Further, at least once, the second control signal is enabled after the first control signal has been enabled.