Patents by Inventor Chien-Hsien Song

Chien-Hsien Song has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210043740
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a gate disposed on the substrate, a source disposed in the substrate and located on one side of the gate, a drain disposed in the substrate and located on another side of the gate, and a gate extending portion disposed on the substrate and located between the gate and the drain. The doping type of the gate is the opposite of that of the gate extending portion.
    Type: Application
    Filed: August 7, 2019
    Publication date: February 11, 2021
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Li-Che CHEN, Chien-Hsien SONG, Chih-Wei LIN, Hung-Chih TAN
  • Patent number: 10861737
    Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor layer, and a trench formed in a top surface of the semiconductor layer. The trench has a bottom surface and a sidewall. The semiconductor device further includes source and drain regions. One of the source and drain regions may be disposed at the bottom surface of the trench, and the other may be disposed at the top surface of the semiconductor layer, or vice versa. Alternatively, both source and drain regions may be disposed at the bottom surface of the trench. The semiconductor device may further include a first insulator disposed in the trench and in between the source and drain regions. The semiconductor device may further include a second insulator disposed between first insulator and the source region. The semiconductor device may further include a conductive member that disposed on the first insulator, or on the first and second insulators.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: December 8, 2020
    Assignee: Vanguard International Semiconductor Corporation
    Inventor: Chien-Hsien Song
  • Publication number: 20200225442
    Abstract: An optical member driving mechanism is provided. The optical member driving mechanism includes a movable portion and a fixed portion. The movable portion includes a holder for holding an optical member with an optical axis. The movable portion is movable relative to the fixed portion. The fixed portion has a housing and a base. The housing is disposed on the base, and includes a top surface and a side surface. The top surface extends in a direction that is parallel to the optical axis. The side surface extends from an edge of the top surface in a direction that is not parallel to the optical axis. The side surface has a rectangular opening.
    Type: Application
    Filed: December 27, 2019
    Publication date: July 16, 2020
    Inventors: Chih-Wei WENG, Chao-Chang HU, Yueh-Lin LEE, Chen-Hsien FAN, Chien-Yu KAO, Chia-Ching HSU, Sung-Mao TSAI, Sin-Jhong SONG
  • Publication number: 20200194581
    Abstract: A semiconductor device includes a semiconductor substrate, a buried layer disposed in the semiconductor substrate, and a first well region, a second well region, a third well region and a fourth well region disposed in the semiconductor substrate on the buried layer. The semiconductor device also includes a source region disposed in the second well region, a drain region disposed in the first well region, a gate structure disposed on the first well region and the second well region, and a deep trench isolation structure disposed in the semiconductor substrate and surrounding the source region and the drain region. The second well region surrounds the first well region. The third well region and the fourth well region are located on opposite sides of the second well region. The deep trench isolation structure penetrates through the buried layer.
    Type: Application
    Filed: December 18, 2018
    Publication date: June 18, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Kai-Chuan KAN, Shu-Wei HSU, Chien-Hsien SONG, Tzu-Hsuan CHEN
  • Patent number: 10615249
    Abstract: A capacitor structure includes a first electrode plate disposed on a substrate, a first capacitor dielectric layer disposed on the first electrode plate, and a second electrode plate disposed on the first capacitor dielectric layer. A portion of the first electrode plate extends beyond an end of the second electrode plate to form a step. The capacitor structure also includes an etching stop layer, an inter-metal dielectric layer, a first via and a second via. The etching stop layer is disposed on the second electrode plate. The inter-metal dielectric layer covers the etching stop layer, the second electrode plate, the first capacitor dielectric layer and the first electrode plate. The first via penetrates through the inter-metal dielectric layer to contact the first electrode plate at the portion extending beyond the second electrode plate. The second via penetrates through the inter-metal dielectric layer to contact the second electrode plate.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: April 7, 2020
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Hsing-Chao Liu, Li-Che Chen, Chien-Hsien Song, Shu-Wei Hsu
  • Publication number: 20200027946
    Abstract: A capacitor structure includes a first electrode plate disposed on a substrate, a first capacitor dielectric layer disposed on the first electrode plate, and a second electrode plate disposed on the first capacitor dielectric layer. A portion of the first electrode plate extends beyond an end of the second electrode plate to form a step. The capacitor structure also includes an etching stop layer, an inter-metal dielectric layer, a first via and a second via. The etching stop layer is disposed on the second electrode plate. The inter-metal dielectric layer covers the etching stop layer, the second electrode plate, the first capacitor dielectric layer and the first electrode plate. The first via penetrates through the inter-metal dielectric layer to contact the first electrode plate at the portion extending beyond the second electrode plate. The second via penetrates through the inter-metal dielectric layer to contact the second electrode plate.
    Type: Application
    Filed: July 19, 2018
    Publication date: January 23, 2020
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Hsing-Chao LIU, Li-Che CHEN, Chien-Hsien SONG, Shu-Wei HSU
  • Publication number: 20180247859
    Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor layer, and a trench formed in a top surface of the semiconductor layer. The trench has a bottom surface and a sidewall. The semiconductor device further includes source and drain regions. One of the source and drain regions may be disposed at the bottom surface of the trench, and the other may be disposed at the top surface of the semiconductor layer, or vice versa. Alternatively, both source and drain regions may be disposed at the bottom surface of the trench. The semiconductor device may further include a first insulator disposed in the trench and in between the source and drain regions. The semiconductor device may further include a second insulator disposed between first insulator and the source region. The semiconductor device may further include a conductive member that disposed on the first insulator, or on the first and second insulators.
    Type: Application
    Filed: April 19, 2018
    Publication date: August 30, 2018
    Applicant: Vanguard International Semiconductor Corporation
    Inventor: Chien-Hsien SONG
  • Patent number: 10032673
    Abstract: A method for manufacturing a semiconductor device includes forming a first gate structure on a semiconductor substrate. The first gate structure includes a first gate dielectric layer and a first gate electrode layer formed thereon. The method also includes forming an insulating material layer on the semiconductor substrate, wherein the semiconductor substrate and the first gate structure are covered by the insulating material layer. The method further includes removing a portion of the insulating material layer in a high-voltage element region to form a second gate dielectric layer in the high-voltage element region on the semiconductor substrate, and forming a second gate electrode layer on the second gate dielectric layer.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: July 24, 2018
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Li-Che Chen, Chien-Wei Chiu, Chien-Hsien Song
  • Patent number: 9978635
    Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor layer, and a trench formed in a top surface of the semiconductor layer. The trench has a bottom surface and a sidewall. The semiconductor device further includes source and drain regions. One of the source and drain regions may be disposed at the bottom surface of the trench, and the other may be disposed at the top surface of the semiconductor layer, or vice versa. Alternatively, both source and drain regions may be disposed at the bottom surface of the trench. The semiconductor device may further include a first insulator disposed in the trench and in between the source and drain regions. The semiconductor device may further include a second insulator disposed between first insulator and the source region. The semiconductor device may further include a conductive member that disposed on the first insulator, or on the first and second insulators.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: May 22, 2018
    Assignee: Vanguard International Semiconductor Corporation
    Inventor: Chien-Hsien Song
  • Patent number: 9859399
    Abstract: A lateral diffused semiconductor device is disclosed, including: a substrate; a first isolation and a second isolation comprising at least portions disposed in the substrate to define an active area; a first drift region and a second drift region disposed in the active area, wherein the first drift region is disposed in the second drift region; a gate structure on the substrate; a source region in the first drift region; a drain region in the second drift region; and a ring-shaped field plate on the substrate, wherein the ring-shaped field plate surrounds at least one of the source and the drain region.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: January 2, 2018
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Sue-Yi Chen, Chien-Hsien Song, Chih-Jen Huang
  • Patent number: 9853145
    Abstract: High-voltage semiconductor devices are provided. The high-voltage semiconductor device includes a substrate and an isolation structure in the substrate. The high-voltage semiconductor device includes a gate structure disposed on the substrate, wherein the gate structure is separated from the isolation structure by a distance. The high-voltage semiconductor device also includes a metal electrode disposed on the gate structure, wherein the metal electrode extends to directly above the isolation structure. The high-voltage semiconductor device further includes an interconnection structure including the lowest metal layer, wherein the metal electrode is between the lowest metal layer and the gate structure. Methods of manufacturing the high-voltage semiconductor device are also provided.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: December 26, 2017
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chien-Wei Chiu, Ching-Jong Chen, Fan Ho, Chien-Hsien Song
  • Patent number: 9818861
    Abstract: A semiconductor device including a substrate having a drain region therein is provided. A gate-electrode layer is disposed on the drain region. A first field-plate conductor is disposed on the substrate and overlaps the drain region. A gap is located laterally between the first field-plate conductor and the gate-electrode layer. A second field-plate conductor covers the first field-plate conductor and the gap. The second field-plate conductor is separated from the first field-plate conductor. A method for forming the semiconductor device is also provided.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: November 14, 2017
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chien-Hsien Song, Chung-Ren Lao
  • Publication number: 20160315189
    Abstract: A semiconductor device including a substrate having a drain region therein is provided. A gate-electrode layer is disposed on the drain region. A first field-plate conductor is disposed on the substrate and overlaps the drain region. A gap is located laterally between the first field-plate conductor and the gate-electrode layer. A second field-plate conductor covers the first field-plate conductor and the gap. The second field-plate conductor is separated from the first field-plate conductor. A method for forming the semiconductor device is also provided.
    Type: Application
    Filed: April 24, 2015
    Publication date: October 27, 2016
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Chien-Hsien SONG, Chung-Ren LAO
  • Patent number: 9362372
    Abstract: A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes an isolation structure formed in a substrate to define an active region of the substrate. The active region has a field plate region therein. A step gate dielectric structure is formed on the substrate in the field plate region. The step gate dielectric structure includes a first layer of a first dielectric material and a second layer of the dielectric material, laminated vertically to each other. The first and second layers of the first dielectric material are separated from each other by a second dielectric material layer. An etch rate of the second dielectric material layer to an etchant is different from that of the second layer of the first dielectric material. A method for forming a semiconductor device is also disclosed.
    Type: Grant
    Filed: March 12, 2015
    Date of Patent: June 7, 2016
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Sue-Yi Chen, Chien-Hsien Song, Chih-Jen Huang
  • Patent number: 9190279
    Abstract: A semiconductor device is disclosed. An isolation structure is formed in a substrate to define an active region of the substrate, wherein the active region has a field plate region. A gate dielectric layer is formed on the substrate outside of the field plate region. A step gate dielectric structure is formed on the substrate corresponding to the field plate region, wherein the step gate dielectric structure has a thickness greater than that of the gate dielectric layer and less than that of the isolation structure. A method for forming a semiconductor device is also disclosed.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: November 17, 2015
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Sue-Yi Chen, Chien-Hsien Song, Chih-Jen Huang
  • Publication number: 20150279987
    Abstract: A semiconductor device is provided. The semiconductor device includes a semiconductor layer, and a trench formed in a top surface of the semiconductor layer. The trench has a bottom surface and a sidewall. The semiconductor device further includes source and drain regions. One of the source and drain regions may be disposed at the bottom surface of the trench, and the other may be disposed at the top surface of the semiconductor layer, or vice versa. Alternatively, both source and drain regions may be disposed at the bottom surface of the trench. The semiconductor device may further include a first insulator disposed in the trench and in between the source and drain regions. The semiconductor device may further include a second insulator disposed between first insulator and the source region. The semiconductor device may further include a conductive member that disposed on the first insulator, or on the first and second insulators.
    Type: Application
    Filed: April 1, 2014
    Publication date: October 1, 2015
    Applicant: Vanguard International Semiconductor Corporation
    Inventor: Chien-Hsien Song
  • Publication number: 20150200261
    Abstract: A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes an isolation structure formed in a substrate to define an active region of the substrate. The active region has a field plate region therein. A step gate dielectric structure is formed on the substrate in the field plate region. The step gate dielectric structure includes a first layer of a first dielectric material and a second layer of the dielectric material, laminated vertically to each other. The first and second layers of the first dielectric material are separated from each other by a second dielectric material layer. An etch rate of the second dielectric material layer to an etchant is different from that of the second layer of the first dielectric material. A method for forming a semiconductor device is also disclosed.
    Type: Application
    Filed: March 12, 2015
    Publication date: July 16, 2015
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Sue-Yi CHEN, Chien-Hsien SONG, Chih-Jen HUANG
  • Publication number: 20150123199
    Abstract: A lateral diffused semiconductor device is disclosed, including: a substrate; a first isolation and a second isolation comprising at least portions disposed in the substrate to define an active area; a first drift region and a second drift region disposed in the active area, wherein the first drift region is disposed in the second drift region; a gate structure on the substrate; a source region in the first drift region; a drain region in the second drift region; and a ring-shaped field plate on the substrate, wherein the ring-shaped field plate surrounds at least one of the source and the drain region.
    Type: Application
    Filed: November 5, 2013
    Publication date: May 7, 2015
    Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION
    Inventors: Sue-Yi CHEN, Chien-Hsien SONG, Chih-Jen HUANG
  • Patent number: 9012988
    Abstract: A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes an isolation structure formed in a substrate to define an active region of the substrate. The active region has a field plate region therein. A step gate dielectric structure is formed on the substrate in the field plate region. The step gate dielectric structure includes a first layer of a first dielectric material and a second layer of the dielectric material, laminated vertically to each other. The first and second layers of the first dielectric material are separated from each other by a second dielectric material layer. An etch rate of the second dielectric material layer to an etchant is different from that of the second layer of the first dielectric material. A method for forming a semiconductor device is also disclosed.
    Type: Grant
    Filed: August 15, 2013
    Date of Patent: April 21, 2015
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Sue-Yi Chen, Chien-Hsien Song, Chih-Jen Huang
  • Publication number: 20150048448
    Abstract: A semiconductor device and a method for forming the same are disclosed. The semiconductor device includes an isolation structure formed in a substrate to define an active region of the substrate. The active region has a field plate region therein. A step gate dielectric structure is formed on the substrate in the field plate region. The step gate dielectric structure includes a first layer of a first dielectric material and a second layer of the dielectric material, laminated vertically to each other. The first and second layers of the first dielectric material are separated from each other by a second dielectric material layer. An etch rate of the second dielectric material layer to an etchant is different from that of the second layer of the first dielectric material. A method for forming a semiconductor device is also disclosed.
    Type: Application
    Filed: August 15, 2013
    Publication date: February 19, 2015
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Sue-Yi CHEN, Chien-Hsien SONG, Chih-Jen HUANG