Abstract: Provided are a semiconductor device and a method for its manufacture. In one example, the method includes forming an isolation structure having a first refraction index over a sensor embedded in a substrate. A first layer having a second refraction index that is different from the first refraction index is formed over the isolation structure. The first layer is removed from at least a portion of the isolation structure. A second layer having a third refraction index is formed over the isolation structure after the first layer is removed. The third refraction index is substantially similar to the first refraction index.

Abstract: Provided are a semiconductor device and a method for its manufacture. In one example, the method includes forming an isolation structure having a first refraction index over a sensor embedded in a substrate. A first layer having a second refraction index that is different from the first refraction index is formed over the isolation structure. The first layer is removed from at least a portion of the isolation structure. A second layer having a third refraction index is formed over the isolation structure after the first layer is removed. The third refraction index is substantially similar to the first refraction index.

Abstract: A semiconductor device including a semiconductor substrate having a photosensor formed therein; a first layer overlying the substrate, the first layer includes a portion having a generally concave shaped surface being the negative shaped of a micro-lens to be formed there over; a second layer overlying the first layer, the second layer including a generally convex shaped portion vertically aligned with and mating with the generally concave shaped surface, the generally convex shaped portion being constructed and arranged to define a micro-lens positioned to cause parallel light passing through the micro-lens to converge on and strike the photosensor.

Abstract: A photo sensor with pinned photodiode structure integrated with a trench isolation structure. The photo sensor includes a substrate of a first conductivity type, at least one trench in the substrate, at least one doped region of the first conductivity type, and at least one doped region of a second conductivity type. Each doped region of the first conductivity type is beneath a corresponding trench. Each doped region of the second conductivity type is sandwiched between the corresponding doped region and the substrate of the first conductivity type. No edge of any doped region of the first or second conductivity type extends to the trench corners. A method of fabricating the photo sensor is also provided.

Abstract: A photo sensor with pinned photodiode structure integrated with a trench isolation structure. The photo sensor includes a substrate of a first conductivity type, at least one trench in the substrate, at least one doped region of the first conductivity type, and at least one doped region of a second conductivity type. Each doped region of the first conductivity type is beneath a corresponding trench. Each doped region of the second conductivity type is sandwiched between the corresponding doped region and the substrate of the first conductivity type. No edge of any doped region of the first or second conductivity type extends to the trench corners. A method of fabricating the photo sensor is also provided.

Abstract: The present invention is CMOS image sensor and its method of fabrication. This invention provides an efficient structure to improve the quantum efficiency of a CMOS type photodiode with borderless contact. The image sensor comprises a N-well/P-substrate type photodiode with borderless contact and dielectric structure covering the photodiode region. The dielectric structure is located between the photodiode and the interlevel dielectric (ILD) and is used as a buffer layer for the borderless contact. The method of fabricating a high performance photodiode comprises forming a photodiode in the n-well region of a shallow trench, and embedding a dielectric material between the ILD oxide and the photodiode having a refraction index higher than the ILD oxide.

Abstract: The present invention is a CMOS image sensor and its method of fabrication. This invention provides an efficient structure to improve the quantum efficiency of a CMOS image sensor with borderless contact. The image sensor comprises a N-well/P-substrate type photodiode with borderless contact and dielectric structure covering the photodiode region. The dielectric structure is located between the photodiode and the interlevel dielectric (ILD) and is used as a buffer layer for the borderless contact. The method of fabricating a high performance photodiode comprises forming a photodiode in the n-well region of a shallow trench, and embedding a dielectric material between the ILD oxide and the photodiode having a refraction index higher than the ILD oxide.

Abstract: A photo sensor with pinned photodiode structure integrated with a trench isolation structure. The photo sensor includes a substrate of a first conductivity type, at least one trench in the substrate, at least one doped region of the first conductivity type, and at least one doped region of a second conductivity type. Each doped region of the first conductivity type is beneath a corresponding trench. Each doped region of the second conductivity type is sandwiched between the corresponding doped region and the substrate of the first conductivity type. No edge of any doped region of the first or second conductivity type extends to the trench corners. A method of fabricating the photo sensor is also provided.

Abstract: Provided are a semiconductor device and a method for its manufacture. In one example, the method includes forming an isolation structure having a first refraction index over a sensor embedded in a substrate. A first layer having a second refraction index that is different from the first refraction index is formed over the isolation structure. The first layer is removed from at least a portion of the isolation structure. A second layer having a third refraction index is formed over the isolation structure after the first layer is removed. The third refraction index is substantially similar to the first refraction index.

Abstract: The present invention is a CMOS image sensor and its method of fabrication. This invention provides an efficient structure to improve the quantum efficiency of a CMOS image sensor with borderless contact. The image sensor comprises a N-well/P-substrate type photodiode with borderless contact and dielectric structure covering the photodiode region. The dielectric structure is located between the photodiode and the interlevel dielectric (ILD) and is used as a buffer layer for the borderless contact. The method of fabricating a high performance photodiode comprises forming a photodiode in the n-well region of a shallow trench, and embedding a dielectric material between the ILD oxide and the photodiode having a refraction index higher than the ILD oxide.

Abstract: A new grid metal design for image sensors is disclosed which is comprised of a semiconductor image sensor chip having a pixel region covering most of the chip and a logic circuit region on the chip periphery. The pixel region contains. an array of image pixels where for each image pixel the majority of its area is occupied by a light sensing element and the other image pixel circuit elements are arranged in the periphery of the image pixel without overlapping the image-sensing element. A number of metal levels are of the first type, at which functional metal patterns exist both for the chip peripheral logic circuits and for the pixel circuit elements. A number of metal levels are of the second type, at which functional metal patterns exist only for the chip peripheral logic circuits and dummy metal patterns cover the pixel region except for the light sensing elements.

Abstract: A new grid metal design for image sensors is disclosed which is comprised of a semiconductor image sensor chip having a pixel region covering most of the chip and a logic circuit region on the chip periphery. The pixel region contains an array of image pixels where for each image pixel the majority of its area is occupied by a light sensing element and the other image pixel circuit elements are arranged in the periphery of the image pixel without overlapping the image-sensing element. A number of metal levels are of the first type, at which functional metal patterns exist both for the chip peripheral logic circuits and for the pixel circuit elements. A number of metal levels are of the second type, at which functional metal patterns exist only for the chip peripheral logic circuits and dummy metal patterns cover the pixel region except for the light sensing elements.

Abstract: An image sensor optoelectronic product and a method for fabrication thereof comprise a photodiode region overlapping a source/drain region of the same polarity within a reset metal oxide semiconductor field effect transistor device. The image sensor optoelectronic product also comprises a bridging implant region of the same polarity as the photodiode region and the source/drain region. The bridging implant region overlaps the photodiode region, encompasses the source/drain region and extends laterally into the channel region of the reset metal oxide semiconductor field effect transistor device. The bridging implant region provides the image sensor optoelectronic product with attenuated leakage and attenuated white pixel cell susceptibility.

Abstract: A new method to form an image sensor device is achieved. The method comprises forming an image sensing array in a substrate comprising a plurality of light detecting diodes with spaces between the diodes. A first dielectric layer is formed overlying the diodes but not the spaces. The first dielectric layer has a first refractive index. A second dielectric layer is formed overlying the spaces but not the diodes. The second dielectric layer has a second refractive index that is larger than the first refractive index. A new image sensor device is disclosed.

Abstract: A new method to form CMOS image sensors in the manufacture of an integrated circuit device is achieved. The method comprises providing a semiconductor substrate. Sensor diodes are formed in the semiconductor substrate each comprising a first terminal and a second terminal. Gates are formed for transistors in the CMOS image sensors. The gates comprise a conductor layer overlying the semiconductor substrate with an insulating layer therebetween. The transistors include reset transistors. Ions are implanted into the semiconductor substrate to form source/drain regions for the transistors. The source regions of the reset transistors are formed in the first terminals of the sensor diodes. Ions are implanted into the reset transistor sources to form double diffused sources. The implanting is blocked from other source/drain regions.

Abstract: A method for making an array of photodiodes with more uniform optical spectral response for the red, green, and blue pixel cells on a CMOS color imager is achieved. After forming a field oxide on a substrate to electrically isolate device areas for CMOS circuits, an array of deep N doped wells is formed for photodiodes for the long wavelength red pixel cells. An array of P doped well regions is formed adjacent to and interlaced with the N doped wells. Shallow diffused N+ regions are formed within the P doped wells for the shorter wavelength green and blue color pixels cells. The shallow diffused photodiodes improve the quantum efficiency (QE), and provide a color imager with improved color fidelity. An insulating layer and appropriate dye materials are deposited and patterned over the photodiodes to provide the array of color pixel cells. The N and P doped wells are also used for the supporting FET CMOS circuits to provide a cost-effective manufacturing process.

Abstract: A new method to form CMOS image sensors in the manufacture of an integrated circuit device is achieved. The method comprises providing a semiconductor substrate. Sensor diodes are formed in the semiconductor substrate each comprising a first terminal and a second terminal. Gates are formed for transistors in the CMOS image sensors. The gates comprise a conductor layer overlying the semiconductor substrate with an insulating layer therebetween. The transistors include reset transistors. Ions are implanted into the semiconductor substrate to form source/drain regions for the transistors. The source regions of the reset transistors are formed in the first terminals of the sensor diodes. Ions are implanted into the reset transistor sources to form double diffused sources. The implanting is blocked from other source/drain regions.

Abstract: A method for making an array of photodiodes with more uniform optical spectral response for the red, green, and blue pixel cells on a CMOS color imager is achieved. After forming a field oxide on a substrate to electrically isolate device areas for CMOS circuits, an array of deep N doped wells is formed for photodiodes for the long wavelength red pixel cells. An array of P doped well regions is formed adjacent to and interlaced with the N doped wells. Shallow diffused N+ regions are formed within the P doped wells for the shorter wavelength green and blue color pixels cells. The shallow diffused photodiodes improve the quantum efficiency (QE), and provide a color imager with improved color fidelity. An insulating layer and appropriate dye materials are deposited and patterned over the photodiodes to provide the array of color pixel cells. The N and P doped wells are also used for the supporting FET CMOS circuits to provide a cost-effective manufacturing process.

Abstract: A method of fabricating a stripe photodiode element, for an image sensor cell, has been developed. The stripe photodiode element is comprised of a narrow width, serpentine shaped, lightly doped N type region, in a P well region. The use of the serpentine shaped region results in increased photon collection area, when compared to counterparts fabricated using non-serpentine shaped patterns. In addition the use of the serpentine shaped N type regions allow both vertical, as well as horizontal depletion regions, to result, thus increasing the quantum efficiency of the photodiode element. The combination of narrow width, and a reduced dopant level, for the N type serpentine shaped region, result in a fully depleted photodiode element.

Abstract: A method for making an array of photodiodes with more uniform optical spectral response for the red, green, and blue pixel cells on a CMOS color imager is achieved. After forming a field oxide on a substrate to electrically isolate device areas for CMOS circuits, an array of deep N doped wells is formed for photodiodes for the long wavelength red pixel cells. An array of P doped well regions is formed adjacent to and interlaced with the N doped wells. Shallow diffused N+ regions are formed within the P doped wells for the shorter wavelength green and blue color pixels cells. The shallow diffused photodiodes improve the quantum efficiency (QE), and provide a color imager with improved color fidelity. An insulating layer and appropriate dye materials are deposited and patterned over the photodiodes to provide the array of color pixel cells. The N and P doped wells are also used for the supporting FET CMOS circuits to provide a cost-effective manufacturing process.