Patents by Inventor Chien-Kang Chou

Chien-Kang Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050026413
    Abstract: A cylindrical bonding structure and its method of manufacture. The cylindrical bonding structure is formed over the bonding pad of a silicon chip and the chip is flipped over to connect with a substrate board in the process of forming a flip-chip package. The cylindrical bonding structure mainly includes a conductive pillar and a solder cap. The conductive pillar is formed over the bonding pad of the silicon chip and the solder cap is attached to the upper end of the conductive pillar. The solder cap has a melting point lower than the conductive pillar. The solder cap can be configured into a cylindrical, spherical or hemispherical shape. To fabricate the cylindrical bonding structure, a patterned mask layer having a plurality of openings that correspond in position to the bonding pads on the wafer is formed over a silicon wafer. Conductive material is deposited into the openings to form conductive pillars and finally a solder cap is attached to the end of each conductive pillar.
    Type: Application
    Filed: June 22, 2004
    Publication date: February 3, 2005
    Inventors: Jin-Yuan Lee, Chien-Kang Chou, Shih-Hsiung Lin, Hsi-Shan Kuo
  • Publication number: 20050017355
    Abstract: A chip structure comprising a substrate, a plurality of wire bonding pads and a plurality of solder pads is provided. Gold bumps or gold pads can be formed on the wire bonding pads while solder bumps can be formed on the solder pads concurrently. Alternatively, both wire bonding pads and solder pads can be formed of the same metal stack.
    Type: Application
    Filed: May 27, 2004
    Publication date: January 27, 2005
    Inventors: Chien-Kang Chou, Chiu-Ming Chou, Li-Ren Lin, Chu-Fu Lin
  • Patent number: 6802945
    Abstract: A method of forming a device, comprising the following steps. A wafer holder and inner walls of a chamber are coated with a seasoning layer The wafer is placed upon the wafer holder and is cleaned wherein a portion of the seasoning layer is re-deposited upon the wafer over and between adjacent wafer conductive structures. The wafer is removed from the chamber and at least two adjacent upper metal structures are formed over at least one portion of a metal barrier layer. The exposed portions of the metal barrier layer are etched and removed, exposing portions of the re-deposited seasoning layer portions using the metal barrier layer etch process which also removes any exposed portions of the re-deposited seasoning layer portions that are comprised of a material etchable in the metal barrier layer etch process.
    Type: Grant
    Filed: January 6, 2003
    Date of Patent: October 12, 2004
    Assignee: Megic Corporation
    Inventors: Hsien-Tsung Liu, Chien-Kang Chou, Ching-San Lin
  • Patent number: 6784087
    Abstract: A cylindrical bonding structure and its method of manufacture. The cylindrical bonding structure is formed over the bonding pad of a silicon chip and the chip is flipped over to connect with a substrate board in the process of forming a flip-chip package. The cylindrical bonding structure mainly includes a conductive cylinder and a solder block. The conductive cylinder is formed over the bonding pad of the silicon chip and the solder block is attached to the upper end of the conductive cylinder. The solder block has a melting point lower than the conductive cylinder. The solder block can be configured into a cylindrical, spherical or hemispherical shape. To fabricate the cylindrical bonding structure, a patterned mask layer having a plurality of openings that correspond in position to the bonding pads on the wafer is formed over a silicon wafer. Conductive material is deposited into the openings to form conductive cylinders and finally a solder block is attached to the end of each conductive cylinder.
    Type: Grant
    Filed: June 17, 2002
    Date of Patent: August 31, 2004
    Assignee: Megic Corporation
    Inventors: Jin-Yuan Lee, Chien-Kang Chou, Shih-Hsiung Lin, Hsi-Shan Kuo
  • Publication number: 20040129558
    Abstract: A method of metal sputtering, comprising the following steps. A wafer holder and inner walls of a chamber are coated with a seasoning layer comprised of: a) a material etchable in a metal barrier layer etch process; or b) an insulating or non-conductive material. A wafer having two or more wafer conductive structures is placed upon the seasoning layer coated wafer holder. The wafer is cleaned wherein a portion of the seasoning layer is re-deposited upon the wafer over and between adjacent wafer conductive structures. A metal barrier layer is formed over the wafer. The wafer is removed from the chamber and at least two adjacent upper metal structures are formed over at least one portion of the metal barrier layer.
    Type: Application
    Filed: January 6, 2003
    Publication date: July 8, 2004
    Applicant: Megic Corporation
    Inventors: Hsien-Tsung Liu, Chien-Kang Chou, Ching-San Lin
  • Patent number: 6716740
    Abstract: A method for depositing an inter-metal-dielectric layer on a semiconductor substrate by plasma chemical vapor deposition without the layer cracking defect is disclosed. The semiconductor substrate is first heat-treated in the same plasma process chamber to a temperature of at least 300° C. for a length of time sufficient to outgas a surface of the semiconductor substrate. The impurity gases absorbed on the surface of the semiconductor substrate can be effectively outgassed during the heat treatment process such that they are not trapped under an IMD layer deposited in a subsequent plasma deposition process. The method effectively minimizes or eliminates completely the IMD layer cracking defect of the dielectric layer.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: April 6, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Ming Wang, Long-Shang Chuang, Jui-Ping Chuang, Chin-Hsiung Ho, Mei-Yen Li, Chien-Kang Chou
  • Publication number: 20030129822
    Abstract: A cylindrical bonding structure and its method of manufacture. The cylindrical bonding structure is formed over the bonding pad of a silicon chip and the chip is flipped over to connect with a substrate board in the process of forming a flip-chip package. The cylindrical bonding structure mainly includes a conductive cylinder and a solder block. The conductive cylinder is formed over the bonding pad of the silicon chip and the solder block is attached to the upper end of the conductive cylinder. The solder block has a melting point lower than the conductive cylinder. The solder block can be configured into a cylindrical, spherical or hemispherical shape. To fabricate the cylindrical bonding structure, a patterned mask layer having a plurality of openings that correspond in position to the bonding pads on the wafer is formed over a silicon wafer. Conductive material is deposited into the openings to form conductive cylinders and finally a solder block is attached to the end of each conductive cylinder.
    Type: Application
    Filed: June 17, 2002
    Publication date: July 10, 2003
    Inventors: Jin-Yuan Lee, Chien-Kang Chou, Shih-Hsiung Lin, Hsi-Shan Kuo
  • Publication number: 20030127734
    Abstract: A cylindrical bonding structure and its method of manufacture. The cylindrical bonding structure is formed over the bonding pad of a silicon chip and the chip is flipped over to connect with a substrate board in the process of forming a flip-chip package. The cylindrical bonding structure mainly includes a conductive cylinder and a solder block. The conductive cylinder is formed over the bonding pad of the silicon chip and the solder block is attached to the upper end of the conductive cylinder. The solder block has a melting point lower than the conductive cylinder. The solder block can be configured into a cylindrical, spherical or hemispherical shape. To fabricate the cylindrical bonding structure, a patterned mask layer having a plurality of openings that correspond in position to the bonding pads on the wafer is formed over a silicon wafer. Conductive material is deposited into the openings to form conductive cylinders and finally a solder block is attached to the end of each conductive cylinder.
    Type: Application
    Filed: January 22, 2002
    Publication date: July 10, 2003
    Inventors: Jin-Yuan Lee, Chien-Kang Chou, Shih-Hsiung Lin, Hsi-Shan Kuo
  • Publication number: 20030068902
    Abstract: A method for depositing an inter-metal-dielectric layer on a semiconductor substrate by plasma chemical vapor deposition without the layer cracking defect is disclosed. The semiconductor substrate is first heat-treated in the same plasma process chamber to a temperature of at least 300° C. for a length of time sufficient to outgas a surface of the semiconductor substrate. The impurity gases absorbed on the surface of the semiconductor substrate can be effectively outgassed during the heat treatment process such that they are not trapped under an IMD layer deposited in a subsequent plasma deposition process. The method effectively minimizes or eliminates completely the IMD layer cracking defect of the dielectric layer.
    Type: Application
    Filed: October 9, 2001
    Publication date: April 10, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Ming Wang, Long-Shang Chuang, Jui-Ping Chuang, Chin-Hsiung Ho, Mei-Yen Li, Chien-Kang Chou