Patents by Inventor Chien-Pin Chen
Chien-Pin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11947153Abstract: A backlight module and a display device are provided, and the backlight module includes a light guide plate, a plurality of light-emitting components, and a frame. The light guide plate includes a first side, a second side, and two third sides. The light-emitting components are disposed on the first side, and light generated from the light-emitting components enters the light guide plate from the first side. The frame covers the second side and the third sides and includes an opening and at least one buffer portion. The light-emitting components are disposed in the opening, and the buffer portion is disposed on a side of the opening and contacts the light guide plate.Type: GrantFiled: May 4, 2023Date of Patent: April 2, 2024Assignee: Radiant Opto-Electronics CorporationInventors: Hung-Pin Cheng, Shih-Fan Liu, Chien-Yu Ko, Jui-Lin Chen
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Publication number: 20240095168Abstract: A computing system performs shared cache allocation to allocate cache resources to groups of tasks. The computing system monitors the bandwidth at a memory hierarchy device that is at a next level to the cache in a memory hierarchy of the computing system. The computing system estimates a change in dynamic power from a corresponding change in the bandwidth before and after the cache resources are allocated. The allocation of the cache resources are adjusted according to an allocation policy that receives inputs including the estimated change in the dynamic power and a performance indication of task execution.Type: ApplicationFiled: August 17, 2023Publication date: March 21, 2024Inventors: Yu-Pin Chen, Jia-Ming Chen, Chien-Yuan Lai, Ya Ting Chang, Cheng-Tse Chen
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Publication number: 20240095177Abstract: A computing system performs partial cache deactivation. The computing system estimates the leakage power of a cache based on operating conditions of the cache including voltage and temperature. The computing system further identifies a region of the cache as a candidate for deactivation based on cache hit counts. The computing system then adjusts the size of the region for the deactivation based on the leakage power and a bandwidth of a memory hierarchy device. The memory hierarchy device is at the next level to the cache in a memory hierarchy of the computing system.Type: ApplicationFiled: August 17, 2023Publication date: March 21, 2024Inventors: Yu-Pin Chen, Jia-Ming Chen, Chien-Yuan Lai, Ya Ting Chang, Cheng-Tse Chen
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Publication number: 20240074267Abstract: Disclosed is an electronic device having a display region and a peripheral region adjacent to the display region. The electronic device includes a first electrode disposed in the display region, a second electrode disposed in the display region, a circuit module disposed in the peripheral region, a first electrical trace, and a second electrical trace electrically insulated from the first electrical trace. The circuit module is electrically connected to the first electrode through the first electrical trace and provides a first driving voltage to the first electrical trace. The circuit module is electrically connected to the second electrode through the second electrical trace and provides a second driving voltage to the second electrical trace, and the first driving voltage is different from the second driving voltage. In a top view, the first electrical trace at least partially overlaps the second electrical trace.Type: ApplicationFiled: November 8, 2023Publication date: February 29, 2024Applicant: InnoLux CorporationInventors: Shu-Hui Yang, Chien-Chih Chen, Ming-Che Chiang, Hong-Pin Ko
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Publication number: 20150314439Abstract: An end effector controlling method includes the steps of obtaining the 3D physical information of an object, finding an appropriate sucking position by a vector programming method, generating a control command to control the sucking position of an end effector. The vector programming method includes the steps of creating a virtual platform and creating a virtual object on the virtual platform from the obtained 3D physical information, obtaining reference planes from each reference axis, computing a curve of surface interactions of each reference plane and the virtual object separately, and searching a sucking position on each curve according to a reachable range of a finger. of the end effector.Type: ApplicationFiled: May 2, 2014Publication date: November 5, 2015Applicant: PRECISION MACHINERY RESEARCH & DEVELOPMENT CENTERInventors: PEI-JUI WANG, CHIEN-PIN CHEN
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Patent number: 8581887Abstract: A display method for driving a color-sequential display of an electronic device is provided. When the electronic device is not at low power mode, a first image is displayed first by using a second color data and a first color data of the first image sequentially to drive the display. Next, a second image is displayed by using a second color data and a third color data of the second image sequentially to drive the display. When the electronic device is at low power mode, the respective luminance of the first and the second images are obtained. Then, the respective luminance of the first image and the second image are sequentially used to drive the display.Type: GrantFiled: August 14, 2009Date of Patent: November 12, 2013Assignee: Himax Technologies LimitedInventors: Biing-Seng Wu, Lin-Kai Bu, Chien-Pin Chen
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Patent number: 8044913Abstract: A gate driver for driving a display device is disclosed. The gate driver, which includes: a first input buffer configured to for receiving a reference voltage and outputting a first buffered voltage, a control circuit configured to for outputting a plurality of scan starting signals and compensating starting signals, a plurality of compensating output buffers, and a plurality of scan output buffers. Each of the plurality of compensating output buffers is configured to respectively receive one of the compensating starting signals and respectively output a compensating signal, wherein, each compensating output buffer receives the first buffered voltage as power. Each of the plurality of scanning output buffers is configured to respectively receive one of the scan starting signals and output a scan signal.Type: GrantFiled: August 3, 2007Date of Patent: October 25, 2011Assignee: Himax Technologies LimitedInventors: Mao-Hsiung Kuo, Chien-Pin Chen, Fa-Ming Chen
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Patent number: 7830349Abstract: A gate driving apparatus for driving a pixel array on a panel. The apparatus includes a driver chip having a first transistor with a gate coupled to receive a Nth gate driving signal, a source coupled to receive a first voltage and a drain coupled to a Nth scan line of the pixel array, and a driving circuit formed on the panel, providing a second voltage to the Nth scan line when the first transistor in the driver chip is turned off by the Nth gate driving signal and providing the first voltage to the Nth scan line when the first transistor is turned on by the Nth gate driving signal.Type: GrantFiled: August 23, 2007Date of Patent: November 9, 2010Assignee: Himax Technologies, Inc.Inventors: Lin-Kai Bu, Chien-Pin Chen, Hsien-Chang Tsai
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Publication number: 20100264522Abstract: A semiconductor device includes a semiconductor chip, a plurality of bumps and at least one electrically conductive component. The semiconductor chip includes an active area having electronic circuits formed therein and a plurality of pads. The plurality of bumps is placed on the semiconductor chip, wherein a location where at least one of the bumps is located on the semiconductor chip does not overlap a location where a specific pad of the pads is located on the semiconductor chip. The electrically conductive component connects a top surface of at least the bump and the specific pad.Type: ApplicationFiled: February 8, 2010Publication date: October 21, 2010Inventors: Chien-Pin Chen, Chiu-Shun Lin
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Patent number: 7812803Abstract: The present invention relates to a driving method for cholesteric liquid crystal display. A plurality of pixels of the display are controlled by a plurality of row drivers and a plurality of column drivers. According to the method of the invention, firstly, a DC input voltage or a non-symmetric AC input voltage is applied to the row drivers and the column drivers so that the voltage of the pixel is larger than a withstand voltage of the drivers. Then, an initial column signal and an initial row signal are respectively supplied by the corresponding column driver and row driver so as to initialize the corresponding pixel. The polarity of the initial column signal is different from that of the initial row signal. Because the initial row signal minus the initial column signal equals the signal of the pixel, the amplitude of the signal applied to the pixel can be increased.Type: GrantFiled: June 8, 2007Date of Patent: October 12, 2010Assignee: Himax Technologies, Inc.Inventors: Yen-Chen Chen, Chien-Pin Chen, Chia-Cheng Lai
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Publication number: 20090295844Abstract: A display method for driving a color-sequential display of an electronic device is provided. When the electronic device is not at low power mode, a first image is displayed first by using a second color data and a first color data of the first image sequentially to drive the display. Next, a second image is displayed by using a second color data and a third color data of the second image sequentially to drive the display. When the electronic device is at low power mode, the respective luminance of the first and the second images are obtained. Then, the respective luminance of the first image and the second image are sequentially used to drive the display.Type: ApplicationFiled: August 14, 2009Publication date: December 3, 2009Applicant: HIMAX TECHNOLOGIES LIMITEDInventors: Biing-Seng WU, Lin-Kai Bu, Chien-Pin Chen
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Patent number: 7602368Abstract: The invention relates to a reset device for a scan driver. The scan driver is used for driving a control circuit of a display. The reset device comprises: a first input terminal, a second input terminal and a reset circuit. The first input terminal receives a first input voltage. After the first input voltage inputs to the first input terminal, the second input terminal receives a second input voltage. The second input voltage has a temporary section and a stable section. At the stable section, the second input voltage is larger than the first input voltage. When the first input terminal receives the first input voltage, the reset circuit outputs a reset signal to the scan driver. When the second input voltage is larger than a threshold value at the temporary section, the reset circuit clears the reset signal. According to the reset device of the invention, the scan driver maintains at a reset state so as to prevent that outputs of the scan driver to be at high level at the same time of supplying power.Type: GrantFiled: July 5, 2005Date of Patent: October 13, 2009Assignee: Himax Technologies, Inc.Inventors: Chien-Pin Chen, Jang Ting Chen
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Patent number: 7593007Abstract: A display method for driving a color-sequential display of an electronic device is provided. When the electronic device is not at low power mode, a first image is displayed first by using a second color data and a first color data of the first image sequentially to drive the display. Next, a second image is displayed by using a second color data and a third color data of the second image sequentially to drive the display. When the electronic device is at low power mode, the respective luminance of the first and the second images are obtained. Then, the respective luminance of the first image and the second image are sequentially used to drive the display.Type: GrantFiled: August 1, 2005Date of Patent: September 22, 2009Assignee: Himax Technologies LimitedInventors: Biing-Seng Wu, Lin-Kai Bu, Chien-Pin Chen
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Publication number: 20090195526Abstract: A driver integrated circuit (IC) for driving a panel having pixels controlled by gate lines and data lines is disclosed, including a power circuit for generating a high level voltage and a low level voltage, a timing controller, a source driving circuit controlled by the timing controller to drive the data lines, a gate driving circuit controlled by the timing controller to selectively enable one of the gate lines for a line period. The gate driving circuit first asserts the selected gate line with the high level voltage in order to activate the corresponding pixels for receiving the driving signals from the corresponding data lines, and the gate driving circuit subsequently asserts the selected gate line with the low level voltage such that the corresponding pixels are still activated for receiving the driving signals. An LCD device utilizing the driver IC is also provided.Type: ApplicationFiled: February 4, 2008Publication date: August 6, 2009Applicant: HIMAX TECHNOLOGIES LIMITEDInventors: Chien-Pin Chen, Biing-Seng Wu
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Patent number: 7541274Abstract: An integrated circuit with a reduced pad bump area and the manufacturing method thereof are disclosed. The integrated circuit includes a semiconductor substrate, an interconnection layer, a passivation layer, and at least a bump. The semiconductor substrate has a semiconductor device thereon. The interconnection layer is disposed on the semiconductor substrate and topped with a top metal layer which at least includes a bonding pad and a conductive line. The passivation layer is disposed on the interconnection layer and has at least an opening to expose the bonding pad. The bump is disposed on the passivation layer to connect the bonding pad through the opening and is extended to a coverage area not directly over the bonding pad.Type: GrantFiled: October 23, 2006Date of Patent: June 2, 2009Assignee: Himax Technologies LimitedInventors: Chan-Liang Wu, Ming-Cheng Chiu, Chien-Pin Chen
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Publication number: 20090134901Abstract: By adding multiplexing units to selectively transmit signals associated with a functional circuitry of an IC die to test pads, a probe card with less pin counts than the pad number of the IC die can be utilized for testing the functional circuitry. Therefore, the pad number/pad pitch of the IC die is not limited by the pitch of the conventional probe card. A high pin count IC die design is thereby available.Type: ApplicationFiled: November 28, 2007Publication date: May 28, 2009Inventors: Ping-Po Chen, Chien-Pin Chen
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Patent number: 7436383Abstract: The present invention relates to a driving method for cholesteric liquid crystal display. A plurality of pixels of the display are controlled by a plurality of row drivers and a plurality of column drivers. According to the method of the invention, firstly, a DC input voltage or a non-symmetric AC input voltage is applied to the row drivers and the column drivers so that the voltage of the pixel is larger than a withstand voltage of the drivers. Then, an initial column signal and an initial row signal are respectively supplied by the corresponding column driver and row driver so as to initialize the corresponding pixel. The polarity of the initial column signal is different from that of the initial row signal. Because the initial row signal minus the initial column signal equals the signal of the pixel, the amplitude of the signal applied to the pixel can be increased.Type: GrantFiled: April 16, 2004Date of Patent: October 14, 2008Assignee: Himax Technologies, Inc.Inventors: Yen-Chen Chen, Chien-Pin Chen, Chia-Cheng Lai
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Publication number: 20080231582Abstract: A gate driver for driving a display device is disclosed. The gate driver, which includes: a first input buffer configured to for receiving a reference voltage and outputting a first buffered voltage, a control circuit configured to for outputting a plurality of scan starting signals and compensating starting signals, a plurality of compensating output buffers, and a plurality of scan output buffers. Each of the plurality of compensating output buffers is configured to respectively receive one of the compensating starting signals and respectively output a compensating signal, wherein, each compensating output buffer receives the first buffered voltage as power. Each of the plurality of scanning output buffers is configured to respectively receive one of the scan starting signals and output a scan signal.Type: ApplicationFiled: August 3, 2007Publication date: September 25, 2008Applicant: HIMAX TECHNOLOGIES LIMITEDInventors: Mao-Hsiung Kuo, Chien-Pin Chen, Fa-Ming Chen
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Publication number: 20080093737Abstract: An integrated circuit with a reduced pad bump area and the manufacturing method thereof are disclosed. The integrated circuit includes a semiconductor substrate, an interconnection layer, a passivation layer, and at least a bump. The semiconductor substrate has a semiconductor device thereon. The interconnection layer is disposed on the semiconductor substrate and topped with a top metal layer which at least includes a bonding pad and a conductive line. The passivation layer is disposed on the interconnection layer and has at least an opening to expose the bonding pad. The bump is disposed on the passivation layer to connect the bonding pad through the opening and is extended to a coverage area not directly over the bonding pad.Type: ApplicationFiled: October 23, 2006Publication date: April 24, 2008Applicant: HIMAX TECHNOLOGIES LIMITEDInventors: Chan-Liang Wu, Ming-Cheng Chiu, Chien-Pin Chen
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Publication number: 20070285373Abstract: A gate driving apparatus for driving a pixel array on a panel. The apparatus includes a driver chip having a first transistor with a gate coupled to receive a Nth gate driving signal, a source coupled to receive a first voltage and a drain coupled to a Nth scan line of the pixel array, and a driving circuit formed on the panel, providing a second voltage to the Nth scan line when the first transistor in the driver chip is turned off by the Nth gate driving signal and providing the first voltage to the Nth scan line when the first transistor is turned on by the Nth gate driving signal.Type: ApplicationFiled: August 23, 2007Publication date: December 13, 2007Applicant: HIMAX TECHNOLOGIES, INC.Inventors: Lin-Kai Bu, Chien-Pin Chen, Hsien-Chang Tsai