Abstract: A low voltage drop out (LDO) regulator is disclosed. The LDO regulator has a voltage buffer for receiving an input voltage containing a DC component and an AC component, converting the input voltage into a converted voltage having a lower DC component and an AC component following that of the input voltage; a control stage applied with the converted voltage; and an output stage applied with the input voltage. The output stage is controlled by the control stage to output an output voltage of a specific level. In the LDO regulator, elements of small sizes can be used to save a layout area thereof. In the meanwhile, the LDO regulator can maintain a high power supply rejection ratio (PSRR) characteristic.

Abstract: A voltage converter is provided. The voltage converter generates an output voltage signal and comprises a controller, a wave generator, a comparator, and a voltage converting unit. The controller generates a control voltage signal according to the output voltage signal and a first reference voltage. The wave generator generates a saw-wave signal and modifies at least one of an upper limit and a lower limit of a waveform of the saw-wave signal according to the output voltage signal. The comparator generates a pulse width modulation (PWM) signal according to the control voltage signal and the saw-wave signal. The voltage converting unit generates the output voltage signal according to the PWM signal.

Abstract: A method of controlling a buck-boost converting circuit is provided. The buck-boost converting circuit has an inductive element, a first conduction controlling element, a second conduction controlling element, a third conduction controlling element, and a fourth conduction controlling element.

Abstract: Voltage regulators are provided. In one embodiment of the voltage regulators, a differential amplifier receives a reference voltage and a feedback voltage, to generate a control signal according to a voltage difference between the feedback voltage and the reference voltage. An output transistor has a first terminal coupled to a power voltage, a control terminal coupled to the differential amplifier for receiving the control signal, and a second terminal coupled to an output terminal. A voltage feedback circuit is coupled between the output terminal and a ground voltage to generate the feedback voltage. A discharge transistor has a first terminal coupled to the ground voltage, a control terminal coupled to a first control signal, and a second terminal coupled to the output terminal through a first resistor in the voltage feedback circuit.

Abstract: A low voltage drop out (LDO) regulator is disclosed. The LDO regulator has a voltage buffer for receiving an input voltage containing a DC component and an AC component, converting the input voltage into a converted voltage having a lower DC component and an AC component following that of the input voltage; a control stage applied with the converted voltage; and an output stage applied with the input voltage. The output stage is controlled by the control stage to output an output voltage of a specific level. In the LDO regulator, elements of small sizes can be used to save a layout area thereof. In the meanwhile, the LDO regulator can maintain a high power supply rejection ratio (PSRR) characteristic.

Abstract: A voltage converter is provided. The voltage converter generates an output voltage signal and comprises a controller, a wave generator, a comparator, and a voltage converting unit. The controller generates a control voltage signal according to the output voltage signal and a first reference voltage. The wave generator generates a saw-wave signal and modifies at least one of an upper limit and a lower limit of a waveform of the saw-wave signal according to the output voltage signal. The comparator generates a pulse width modulation (PWM) signal according to the control voltage signal and the saw-wave signal. The voltage converting unit generates the output voltage signal according to the PWM signal.

Abstract: Voltage regulators are provided. In one embodiment of the voltage regulators, a differential amplifier receives a reference voltage and a feedback voltage, to generate a control signal according to a voltage difference between the feedback voltage and the reference voltage. An output transistor has a first terminal coupled to a power voltage, a control terminal coupled to the differential amplifier for receiving the control signal, and a second terminal coupled to an output terminal. A voltage feedback circuit is coupled between the output terminal and a ground voltage to generate the feedback voltage. A discharge transistor has a first terminal coupled to the ground voltage, a control terminal coupled to a first control signal, and a second terminal coupled to the output terminal through a first resistor in the voltage feedback circuit.

Abstract: The present invention discloses a signal generating apparatus for generating a clock signal, the signal generating apparatus includes: an adjusting module for generating an adjusting current according to a first reference voltage and a control voltage; and a clock signal generating module coupled to the adjusting module. The clock signal generating module includes: a current generating unit for generating a first current; a signal generating unit coupled to the current generating unit and the adjusting module for generating a voltage signal according to a second current, wherein the second current is generated according to the first current and the adjusting current; and a comparing unit coupled to the signal generating unit and a second reference voltage for comparing the voltage signal and the second reference voltage to generate the clock signal.

Abstract: The present invention discloses a frequency comparator for comparing frequencies of a first signal and a second signal. The frequency comparator includes: a frequency detecting circuit for generating a reference signal according to the first signal and an input voltage; a frequency generator for generating the second signal according to the input voltage; a charge pump circuit for enabling a charging current according to either the reference signal or the second signal to increase an voltage level, and for enabling a discharging current according to the other signal to decrease the voltage level; and a decision logic coupled to the charge pump circuit for indicating a frequency relation between frequencies of the first signal and the second signal according to the voltage level.