Abstract: A backlight module includes a light guide plate and a light source module. The light guide plate includes a light receiving surface, a light exit surface, and a bottom surface. The light exit surface is connected to a first end of the light receiving surface. The bottom surface is connected to a second end of the light receiving surface opposite to the first end and located opposite to the light exit surface. The bottom surface includes a central region and a peripheral girdle region at least partially surrounding the central region. The central region includes a plurality of first reflecting structures, and the peripheral girdle region includes a plurality of second reflecting structures. The second reflecting structure is different from the first reflecting structure. The light source module is disposed along the light receiving surface and provides light beams incident into the light receiving surface.

Abstract: A switchable backlight module is disclosed. The switchable backlight module includes two light source modules arranged parallelly with respect to a plane. Each of the light source modules includes a turning film and a LGP. The LGP is of an edge-lit type arranged parallelly under the turning film. A light ray enters the LGP from a light incident side of the LGP, exits the LGP from a light emergent surface of the LGP, enters the turning film, and exits the turning film from a surface of the turning film away from the LGP. The light incident side of the LGP of one of the light source modules is perpendicular to the light incident side of the LGP of the other light source module. The switchable backlight module is in an anti-peeping mode having a narrow viewing angle when only an upper one of the light source modules emits light.

Abstract: The present disclosure provides a fabrication method of a light guide plate including the following steps. A first substrate with a processing plane is provided. A plurality of first mold trenches are formed along a second direction on the processing plane by a first cutter, where the first mold trenches are connected to each other. A plurality of second mold trenches are formed along a first direction different from the second direction in a first processing region of the processing plane by a second cutter, where the first processing region is near to a first edge of the processing plane. A light-emitting surface of the light guide plate is formed by using the first substrate as a mold.

Abstract: A switchable backlight module is disclosed. The switchable backlight module includes two light source modules arranged parallelly with respect to a plane. Each of the light source modules includes a turning film and a LGP. The LGP is of an edge-lit type arranged parallelly under the turning film. A light ray enters the LGP from a light incident side of the LGP, exits the LGP from a light emergent surface of the LGP, enters the turning film, and exits the turning film from a surface of the turning film away from the LGP. The light incident side of the LGP of one of the light source modules is perpendicular to the light incident side of the LGP of the other light source module. The switchable backlight module is in an anti-peeping mode having a narrow viewing angle when only an upper one of the light source modules emits light.

Abstract: A backlight module includes a light guide plate and a light source module. The light guide plate includes a light receiving surface, a light exit surface, and a bottom surface. The light exit surface is connected to a first end of the light receiving surface. The bottom surface is connected to a second end of the light receiving surface opposite to the first end and located opposite to the light exit surface. The bottom surface includes a central region and a peripheral girdle region at least partially surrounding the central region. The central region includes a plurality of first reflecting structures, and the peripheral girdle region includes a plurality of second reflecting structures. The second reflecting structure is different from the first reflecting structure. The light source module is disposed along the light receiving surface and provides light beams incident into the light receiving surface.

Abstract: The present disclosure provides a fabrication method of a light guide plate including the following steps. A first substrate with a processing plane is provided. A plurality of first mold trenches are formed along a second direction on the processing plane by a first cutter, where the first mold trenches are connected to each other. A plurality of second mold trenches are formed along a first direction different from the second direction in a first processing region of the processing plane by a second cutter, where the first processing region is near to a first edge of the processing plane. A light-emitting surface of the light guide plate is formed by using the first substrate as a mold.

Abstract: The present disclosure provides a backlight module including a plurality of light-emitting elements and a light guide plate, in which the light guide plate includes a light-emitting surface, a bottom surface opposite to the light-emitting surface, and a light-incident side connecting the light-emitting surface and the bottom surface. The light-emitting elements are disposed at the light-incident side along a first direction, and the light-emitting surface includes a first region near the light-incident side. The light guide plate includes a plurality of columns extending along the first direction and disposed in the first region of the light-emitting surface and a plurality of microstructure groups, in which each microstructure group includes a plurality of microstructures arranged along a second direction different from the first direction, and each microstructure connects the adjacent two of the columns.

Abstract: The present disclosure provides a backlight module including a light guide plate including a light-emitting surface, a bottom surface opposite to the light-emitting surface, and a light-incident side connecting the light-emitting surface and the bottom surface and light-emitting elements disposed at the light-incident side along a first direction. The light guide plate includes first columnar microstructures extending along a second direction perpendicular to the first direction on the light-emitting surface and columnar microstructure groups with second columnar microstructures, which are 1-15 times the number of the adjacent first columnar microstructures, between the first columnar microstructures extending along the second direction on the light-emitting surface. A first width of the first columnar microstructures is larger than or equal to a second width of the columnar microstructure groups along the first direction.

Abstract: The present disclosure provides a backlight module including a light guide plate including a light-emitting surface, a bottom surface opposite to the light-emitting surface, and a light-incident side connecting the light-emitting surface and the bottom surface and light-emitting elements disposed at the light-incident side along a first direction. The light guide plate includes first columnar microstructures extending along a second direction perpendicular to the first direction on the light-emitting surface and columnar microstructure groups with second columnar microstructures, which are 1-15 times the number of the adjacent first columnar microstructures, between the first columnar microstructures extending along the second direction on the light-emitting surface. A first width of the first columnar microstructures is larger than or equal to a second width of the columnar microstructure groups along the first direction.

Abstract: The present disclosure provides a backlight module including a plurality of light-emitting elements and a light guide plate, in which the light guide plate includes a light-emitting surface, a bottom surface opposite to the light-emitting surface, and a light-incident side connecting the light-emitting surface and the bottom surface. The light-emitting elements are disposed at the light-incident side along a first direction, and the light-emitting surface includes a first region near the light-incident side. The light guide plate includes a plurality of columns extending along the first direction and disposed in the first region of the light-emitting surface and a plurality of microstructure groups, in which each microstructure group includes a plurality of microstructures arranged along a second direction different from the first direction, and each microstructure connects the adjacent two of the columns.

Abstract: A temperature correction method is provided for detecting a temperature of a computer device that includes a first ambient temperature sensor and a second ambient temperature sensor that are spaced apart from each other, and a fan module. When a temperature difference between the temperatures sensed by the first and second ambient temperature sensors is greater than a predetermined threshold value, a controller of the computer device performs temperature correction that is related to the temperature difference, a fan speed of the fan module, and at least one of the sensed temperatures.

Abstract: A band gap engineered, charge trapping memory cell includes a charge trapping element that is separated from a gate by a blocking layer of metal doped silicon oxide material having a medium dielectric constant, such as aluminum doped silicon oxide, and separated from the semiconductor body including the channel by an engineered tunneling dielectric.

Abstract: A blocking dielectric engineered, charge trapping memory cell includes a charge trapping element that is separated from a gate by a blocking dielectric including a buffer layer in contact with the charge trapping element, such as silicon dioxide which can be made with high-quality, and a second capping layer in contact with said one of the gate and the channel. The capping layer has a dielectric constant that is higher than that of the first layer, and preferably includes a high-? material. The second layer also has a conduction band offset that is relatively high. A bandgap engineered tunneling layer between the channel and the charge trapping element is provided which, in combination with the multilayer blocking dielectric described herein, provides for high-speed erase operations by hole tunneling. In an alternative, a single layer tunneling layer is used.

Abstract: A blocking dielectric engineered, charge trapping memory cell includes a charge trapping element that is separated from a gate by a blocking dielectric including a buffer layer in contact with the charge trapping element, such as silicon dioxide which can be made with high-quality, and a second capping layer in contact with said one of the gate and the channel. The capping layer has a dielectric constant that is higher than that of the first layer, and preferably includes a high-? material. The second layer also has a conduction band offset that is relatively high. A bandgap engineered tunneling layer between the channel and the charge trapping element is provided which, in combination with the multilayer blocking dielectric described herein, provides for high-speed erase operations by hole tunneling. In an alternative, a single layer tunneling layer is used.

Abstract: A blocking dielectric engineered, charge trapping memory cell includes a charge trapping element that is separated from a gate by a blocking dielectric including a buffer layer in contact with the charge trapping element, such as silicon dioxide which can be made with high-quality, and a second capping layer in contact with said one of the gate and the channel. The capping layer has a dielectric constant that is higher than that of the first layer, and preferably includes a high-? material. The second layer also has a conduction band offset that is relatively high. A bandgap engineered tunneling layer between the channel and the charge trapping element is provided which, in combination with the multilayer blocking dielectric described herein, provides for high-speed erase operations by hole tunneling. In an alternative, a single layer tunneling layer is used.

Abstract: A blocking dielectric engineered, charge trapping memory cell includes a charge trapping element that is separated from a gate by a blocking dielectric including a buffer layer in contact with the charge trapping element, such as silicon dioxide which can be made with high-quality, and a second capping layer in contact with said one of the gate and the channel. The capping layer has a dielectric constant that is higher than that of the first layer, and preferably includes a high-? material. The second layer also has a conduction band offset that is relatively high. A bandgap engineered tunneling layer between the channel and the charge trapping element is provided which, in combination with the multilayer blocking dielectric described herein, provides for high-speed erase operations by hole tunneling. In an alternative, a single layer tunneling layer is used.

Abstract: A blocking dielectric engineered, charge trapping memory cell includes a charge trapping element that is separated from a gate by a blocking dielectric including a buffer layer in contact with the charge trapping element, such as silicon dioxide which can be made with high-quality, and a second capping layer in contact with said one of the gate and the channel. The capping layer has a dielectric constant that is higher than that of the first layer, and preferably includes a high-? material. The second layer also has a conduction band offset that is relatively high. A bandgap engineered tunneling layer between the channel and the charge trapping element is provided which, in combination with the multilayer blocking dielectric described herein, provides for high-speed erase operations by hole tunneling. In an alternative, a single layer tunneling layer is used.

Abstract: A band gap engineered, charge trapping memory cell includes a charge trapping element that is separated from a gate by a blocking layer of metal doped silicon oxide material having a medium dielectric constant, such as aluminum doped silicon oxide, and separated from the semiconductor body including the channel by an engineered tunneling dielectric.

Abstract: A band gap engineered, charge trapping memory cell includes a charge trapping element that is separated from a gate by a blocking layer of metal doped silicon oxide material having a medium dielectric constant, such as aluminum doped silicon oxide, and separated from the semiconductor body including the channel by an engineered tunneling dielectric.

Abstract: A blocking dielectric engineered, charge trapping memory cell includes a charge trapping element that is separated from a gate by a blocking dielectric comprising a buffer layer in contact with the charge trapping element, such as silicon dioxide which can be made with high-quality, and a second capping layer in contact with said one of the gate and the channel. The capping layer has a dielectric constant that is higher than that of the first layer, and preferably comprises a high-? material. The second layer also has a conduction band offset that is relatively high. A bandgap engineered tunneling layer between the channel and the charge trapping element is provided which, in combination with the multilayer blocking dielectric described herein, provides for high-speed erase operations by hole tunneling. In an alternative, a single layer tunneling layer is used.