Patents by Inventor Chien-Yang Chen

Chien-Yang Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978929
    Abstract: A close-end fuel cell and an anode bipolar plate thereof are provided. The anode bipolar plate includes an airtight conductive frame and a conductive porous substrate disposed within the airtight conductive frame. In the airtight conductive frame, an edge of a first side has a fuel inlet, and an edge of a second side has a fuel outlet. The conductive porous substrate has at least one flow channel, where a first end of the flow channel communicates with the fuel inlet, a second end of the flow channel communicates with the fuel outlet. The flow channel is provided with a blocking part near the fuel inlet to divide the flow channel into two areas.
    Type: Grant
    Filed: August 23, 2021
    Date of Patent: May 7, 2024
    Assignee: Industrial Technology Research Institute
    Inventors: Sung-Chun Chang, Chien-Ming Lai, Chiu-Ping Huang, Li-Duan Tsai, Keng-Yang Chen
  • Patent number: 11969727
    Abstract: Present invention is related to a tumor microenvironment on chip or a biochip for cell therapy having a carrier, a first cell or tissue culture area and a second cell or tissue area imbedded within the carrier. The present invention provides a biochip successfully cooperating micro fluidic technology and cell culture achieving the goal for detecting or testing the function of cell therapy for cancer or tumor.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: April 30, 2024
    Assignees: China Medical University, China Medical University Hospital
    Inventors: Yi-Wen Chen, Ming-You Shie, Der-Yang Cho, Shao-Chih Chiu, Kai-Wen Kan, Chien-Chang Chen
  • Publication number: 20240114688
    Abstract: A memory structure including a substrate, a first doped region, a second doped region, a first gate, a second gate, a first charge storage structure, and a second charge storage structure is provided. The first gate is located on the first doped region. The second gate is located on the second doped region. The first charge storage structure is located between the first gate and the first doped region. The first charge storage structure includes a first tunneling dielectric layer, a first dielectric layer, and a first charge storage layer. The second charge storage structure is located between the second gate and the second doped region. The second charge storage structure includes a second tunneling dielectric layer, a second dielectric layer, and a second charge storage layer. The thickness of the second tunneling dielectric layer is greater than the thickness of the first tunneling dielectric layer.
    Type: Application
    Filed: November 21, 2022
    Publication date: April 4, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chia-Wen Wang, Chien-Hung Chen, Chia-Hui Huang, Ling Hsiu Chou, Jen Yang Hsueh, Chih-Yang Hsu
  • Publication number: 20240071888
    Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.
    Type: Application
    Filed: August 28, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Chang Lin, Yen-Fu Su, Chin-Liang Chen, Wei-Yu Chen, Hsin-Yu Pan, Yu-Min Liang, Hao-Cheng Hou, Chi-Yang Yu
  • Patent number: 11913597
    Abstract: A product-display system for displaying and securing a retail product. The system may include a retainer having a retainer bracket and a retainer body coupled to the retainer bracket. A retaining cable may be coupled to the retainer body at an opening in the retainer body. A fastener that may be unfastened to release the product from the retainer may only be accessed through the opening of the retainer body such that when the retaining cable is coupled to the opening, no fasteners of the retainer may be visible or accessible. The system may also include a display stem for holding the retainer and product. The display stem may include a recess for receiving at least a portion of the retainer body. The retaining cable may extend through the display stem and may simultaneously transmit power and data to a displayed product. The retainer may be returned to and held on top of the display stem using a retaining cable.
    Type: Grant
    Filed: December 1, 2021
    Date of Patent: February 27, 2024
    Assignee: Apple Inc.
    Inventors: Sheng Yang, Eric W. Wang, Steven C. Michalske, Olivia Ching, Clayton R. Woosley, Samuel Wing Man Yuen, Paul Joseph Hack, Ricardo A Mariano, Chien Tsun Chen, George Tziviskos, Charles A. Schwalbach
  • Patent number: 10014783
    Abstract: The present invention provides a switching regulator with PFC function and a control circuit and a control method thereof. The switching regulator with PFC function includes a power stage circuit, a current sense circuit, and a control circuit. The power stage circuit operates at least one power switch therein according to an operation signal to convert an input voltage to an output voltage. When a transient voltage of the input voltage exceeds a transient voltage upper limit, or when a transient slew rate of the input voltage exceeds a transient slew rate upper limit, the control circuit adjusts a frequency response gain from a stable state frequency response gain to a transient state frequency response gain, such that a transient current of an output current does not exceed a current upper limit, and/or that a transient response time of the output current does not exceed a threshold transient time period.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: July 3, 2018
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Yi-Wei Lee, Chien-Yang Chen, Isaac Y. Chen, Ta-Yung Yang
  • Patent number: 9966833
    Abstract: The present invention discloses a switching regulator capable of reducing current ripple and a control circuit thereof. The switching regulator includes a buck power stage circuit and a control circuit. The control circuit includes an operation signal generation circuit and a current source circuit for reducing current ripple. The current source circuit is coupled to the operation signal generation circuit and the buck power stage circuit, for operating a ripple reduction switch therein according to an operation signal, to convert the output voltage to a load voltage between a load node and a reference node, and to reduce a current ripple of the output current, so as to generate a load current which is supplied to a load circuit, wherein the load circuit is coupled between the load node and the reference node, and the current source circuit is coupled between the output node and the load node.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: May 8, 2018
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Chien-Yang Chen, Ta-Yung Yang, Yu-Wen Chang
  • Publication number: 20170353102
    Abstract: The present invention discloses a switching regulator capable of reducing current ripple and a control circuit thereof. The switching regulator includes a buck power stage circuit and a control circuit. The control circuit includes an operation signal generation circuit and a current source circuit for reducing current ripple. The current source circuit is coupled to the operation signal generation circuit and the buck power stage circuit, for operating a ripple reduction switch therein according to an operation signal, to convert the output voltage to a load voltage between a load node and a reference node, and to reduce a current ripple of the output current, so as to generate a load current which is supplied to a load circuit, wherein the load circuit is coupled between the load node and the reference node, and the current source circuit is coupled between the output node and the load node.
    Type: Application
    Filed: April 17, 2017
    Publication date: December 7, 2017
    Inventors: Chien-Yang Chen, Ta-Yung Yang, Yu-Wen Chang
  • Publication number: 20170331381
    Abstract: The present invention provides a switching regulator with PFC function and a control circuit and a control method thereof. The switching regulator with PFC function includes a power stage circuit, a current sense circuit, and a control circuit. The power stage circuit operates at least one power switch therein according to an operation signal to convert an input voltage to an output voltage. When a transient voltage of the input voltage exceeds a transient voltage upper limit, or when a transient slew rate of the input voltage exceeds a transient slew rate upper limit, the control circuit adjusts a frequency response gain from a stable state frequency response gain to a transient state frequency response gain, such that a transient current of an output current does not exceed a current upper limit, and/or that a transient response time of the output current does not exceed a threshold transient time period.
    Type: Application
    Filed: December 30, 2016
    Publication date: November 16, 2017
    Inventors: Yi-Wei Lee, Chien-Yang Chen, Isaac Y. Chen, Ta-Yung Yang
  • Patent number: 9504102
    Abstract: The present invention provides a light emitting device driver circuit and a control circuit and a control method thereof. The light emitting device driver circuit includes a power stage circuit, a feedback circuit, and a control circuit. The control circuit includes a comparison circuit, a hysteresis control circuit, and a bleeder circuit. The control circuit generates an analog control signal according to a rectified dimmer signal and an output signal, for controlling the power stage circuit to regulate an output current, which is supplied to a light emitting device circuit to determine its brightness. When the analog control signal decreases to a predetermined hysteresis low level, the light emitting device driver circuit operates in a cut-off mode wherein the bleeder circuit consumes a bleeder current so as to maintain the output current at a zero current, for keeping the light emitting device circuit OFF.
    Type: Grant
    Filed: March 12, 2016
    Date of Patent: November 22, 2016
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Pei-Yuan Chen, Chien-Yang Chen, Leng-Nien Hsiu
  • Publication number: 20160323944
    Abstract: The present invention provides a light emitting device driver circuit and a control circuit and a control method thereof. The light emitting device driver circuit includes a power stage circuit, a feedback circuit, and a control circuit. The control circuit includes a comparison circuit, a hysteresis control circuit, and a bleeder circuit. The control circuit generates an analog control signal according to a rectified dimmer signal and an output signal, for controlling the power stage circuit to regulate an output current, which is supplied to a light emitting device circuit to determine its brightness. When the analog control signal decreases to a predetermined hysteresis low level, the light emitting device driver circuit operates in a cut-off mode wherein the bleeder circuit consumes a bleeder current so as to maintain the output current at a zero current, for keeping the light emitting device circuit OFF.
    Type: Application
    Filed: March 12, 2016
    Publication date: November 3, 2016
    Inventors: Pei-Yuan Chen, Chien-Yang Chen, Leng-Nien Hsiu
  • Patent number: 9247601
    Abstract: The present invention discloses a light emitting device control circuit with dimming function and a control method thereof. The light emitting device control circuit includes: a dimmer circuit, a rectifier and filter circuit, a power converter circuit, and a headroom voltage regulation circuit. The dimmer circuit generates an AC dimming voltage according to an AC voltage. The rectifier and filter circuit generates an input voltage according to the AC dimming voltage. The power converter circuit operates according to a control signal to convert the input voltage to an output voltage which is supplied to a light emitting device circuit. The headroom voltage regulation circuit generates the control signal according to a reference value and a difference between the input voltage and the output voltage, and regulates the difference at a level corresponding to the reference value by a feedback control loop.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: January 26, 2016
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Leng-Nien Hsiu, Pei-Yuan Chen, Chien-Yang Chen
  • Patent number: 9119254
    Abstract: The present invention provides a light emitting device power supply circuit with dimming function and a control circuit thereof. The light emitting device power supply circuit includes: a phase-cut dimming circuit, a rectifier circuit, a transformer circuit, and a control circuit. The transformer circuit includes an auxiliary winding, which is coupled to a primary winding, for generating a bleeder current to keep a conduction current higher than a holding current and prevent the phase-cut dimming circuit from turning OFF when the phase-cut dimming circuit operates in conductive phase. The control circuit includes a waveform analysis circuit, a bleeder current control circuit, and a bleeder current source. The bleeder current source includes a linear regulator or a variable current source. The bleeder current source controls the bleeder current so that the bleeder current is generated in a continuous and non-switching manner within the conductive phase.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: August 25, 2015
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Yi-Wei Lee, Isaac Y. Chen, Tong-Cheng Jao, Chien-Yang Chen
  • Publication number: 20150173153
    Abstract: The present invention discloses a light emitting device control circuit with dimming function and a control method thereof. The light emitting device control circuit includes: a dimmer circuit, a rectifier and filter circuit, a power converter circuit, and a headroom voltage regulation circuit. The dimmer circuit generates an AC dimming voltage according to an AC voltage. The rectifier and filter circuit generates an input voltage according to the AC dimming voltage. The power converter circuit operates according to a control signal to convert the input voltage to an output voltage which is supplied to a light emitting device circuit. The headroom voltage regulation circuit generates the control signal according to a reference value and a difference between the input voltage and the output voltage, and regulates the difference at a level corresponding to the reference value by a feedback control loop.
    Type: Application
    Filed: December 4, 2014
    Publication date: June 18, 2015
    Applicant: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Leng-Nien Hsiu, Pei-Yuan Chen, Chien-Yang Chen
  • Publication number: 20150173145
    Abstract: The present invention provides a light emitting device power supply circuit with dimming function and a control circuit thereof. The light emitting device power supply circuit includes: a phase-cut dimming circuit, a rectifier circuit, a transformer circuit, and a control circuit. The transformer circuit includes an auxiliary winding, which is coupled to a primary winding, for generating a bleeder current to keep a conduction current higher than a holding current and prevent the phase-cut dimming circuit from turning OFF when the phase-cut dimming circuit operates in conductive phase. The control circuit includes a waveform analysis circuit, a bleeder current control circuit, and a bleeder current source. The bleeder current source includes a linear regulator or a variable current source. The bleeder current source controls the bleeder current so that the bleeder current is generated in a continuous and non-switching manner within the conductive phase.
    Type: Application
    Filed: December 11, 2014
    Publication date: June 18, 2015
    Applicant: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Yi-Wei Lee, Isaac Y. Chen, Tong-Cheng Jao, Chien-Yang Chen
  • Patent number: 9048246
    Abstract: A die seal ring is provided. The die seal ring includes a substrate and a first layer extruding from the substrate. The first layer has a first fin ring structure and a layout of the first fin ring structure has a stamp-like shape. In addition, a method for forming a die seal ring is provided. A substrate having an active region is provided. A patterned sacrificial layer is formed on the substrate. A spacer is formed on the sidewall of the patterned sacrificial layer. The patterned sacrificial layer is removed. The substrate is patterned by using the spacer as a mask, thereby simultaneously forming at least a fin structure of a Fin-FET and a first layer of the die seal ring.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: June 2, 2015
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Te Wei, Po-Chao Tsao, Ching-Li Yang, Chien-Yang Chen, Hui-Ling Chen, Guan-Kai Huang
  • Publication number: 20140367835
    Abstract: A die seal ring is provided. The die seal ring includes a substrate and a first layer extruding from the substrate. The first layer has a first fin ring structure and a layout of the first fin ring structure has a stamp-like shape. In addition, a method for forming a die seal ring is provided. A substrate having an active region is provided. A patterned sacrificial layer is formed on the substrate. A spacer is formed on the sidewall of the patterned sacrificial layer. The patterned sacrificial layer is removed. The substrate is patterned by using the spacer as a mask, thereby simultaneously forming at least a fin structure of a Fin-FET and a first layer of the die seal ring.
    Type: Application
    Filed: June 18, 2013
    Publication date: December 18, 2014
    Inventors: Ming-Te Wei, Po-Chao Tsao, Ching-Li Yang, Chien-Yang Chen, Hui-Ling Chen, Guan-Kai Huang
  • Patent number: 8860181
    Abstract: A thin film resistor structure includes a substrate, a flat bottom ILD (inter layer dielectric) disposed on the substrate, a plurality of first contacts disposed in the bottom ILD, and each top surface of the first contacts is on the same level as a top surface of the bottom ILD; a flat top ILD disposed on the bottom ILD, a plurality of second contacts disposed in the top ILD, and each top surface of the second contacts is on the same level as a top surface of the top ILD, and a thin film resistor disposed between the bottom ILD and the top ILD.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: October 14, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Ming-Te Wei, Po-Chao Tsao, Chen-Hua Tsai, Chien-Yang Chen, Chia-Jui Liang, Ming-Tsung Chen
  • Publication number: 20140300288
    Abstract: The present invention discloses a light emitting device power supply circuit and a damping circuit therein and a driving method thereof. The light emitting device power supply circuit includes: a tri-electrode AC switch (TRIAC) dimming circuit, a rectifier circuit, a light emitting device driver circuit, and a damping circuit. The damping circuit includes: an impedance circuit, which is electrically connected between the rectifier circuit and the light emitting device driver circuit; a silicon control rectifier (SCR) circuit, which is connected to the impedance circuit in parallel; and a delay circuit, which is coupled to the SCR circuit, for turning ON the SCR circuit after a delay time period from when the TRIAC diming circuit begins to start-up, wherein the delay circuit does not directly receive a full scale of the input voltage.
    Type: Application
    Filed: March 24, 2014
    Publication date: October 9, 2014
    Applicant: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Chien-Yang Chen, Chi-Hsiu Lin, Yi-Wei Lee
  • Patent number: 8730222
    Abstract: A display capable of improving frame quality includes a display panel, a timing controller, and a source driver. The timing controller is used for generating a scan start signal, and generating at least one control signal in a blanking time of the display panel according to polarity of a last datum before the blanking time and polarity of a first datum after the blanking time. The source driver is used for generating at least one datum synchronized with the at least one control signal according to the polarity of the last datum before the blanking time, a voltage of the first datum after the blanking time and the at least one control signal. The source driver does not change a last datum of the at least one datum after the at least one control signal in the blanking time.
    Type: Grant
    Filed: January 3, 2012
    Date of Patent: May 20, 2014
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Chih-Wei Chang, Shu-Wen Chang, Chien-Yang Chen