Patents by Inventor Chih-An Wei

Chih-An Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240085621
    Abstract: A method includes encapsulating a first device die and a second device die in an encapsulant, and forming an interconnect structure over and electrically connecting to the first device die and the second device die. A waveguide is formed in the interconnect structure. An optical-engine based interconnect component is bonded to the interconnect structure. The optical-engine based interconnect component forms a part of a signal path that connects the first device die to the second device die.
    Type: Application
    Filed: January 6, 2023
    Publication date: March 14, 2024
    Inventors: Hsing-Kuo Hsia, Chen-Hua Yu, Chih-Wei Tseng, Jui Lin Chao
  • Patent number: 11930174
    Abstract: A method and apparatus for block partition are disclosed. If a cross-colour component prediction mode is allowed, the luma block and the chroma block are partitioned into one or more luma leaf blocks and chroma leaf blocks. If a cross-colour component prediction mode is allowed, whether to enable an LM (Linear Model) mode for a target chroma leaf block is determined based on a first split type applied to an ancestor chroma node of the target chroma leaf block and a second split type applied to a corresponding ancestor luma node. According to another method, after the luma block and the chroma block are partitioned using different partition tress, determine whether one or more exception conditions to allow an LM for a target chroma leaf block are satisfied when the chroma partition tree uses a different split type, a different partition direction, or both from the luma partition tree.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: March 12, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Chia-Ming Tsai, Tzu-Der Chuang, Chih-Wei Hsu, Ching-Yeh Chen, Zhi-Yi Lin
  • Patent number: 11927303
    Abstract: A wearable device includes a host, a first belt, a second belt, a circuit board, a cable, and an adjustment mechanism. The first belt, one end of which is connected to a first side of the host, has a cable holding part. One end of the second belt is connected to a second side of the host. The circuit board is disposed at an overlap of the first belt and the second belt. A first end and a second end opposite to each other of the cable are connected to the circuit board and the first side respectively, and a holding section of the cable is fixed to the cable holding part. The adjusting mechanism is disposed at an overlap of the first belt and the second belt to adjust an overlapping length of the first belt and the second belt.
    Type: Grant
    Filed: July 25, 2022
    Date of Patent: March 12, 2024
    Assignee: HTC Corporation
    Inventors: Tsen-Wei Kung, Chung-Ju Wu, Tsung Hua Yang, Chih-Yao Chang, Wei Te Tu
  • Patent number: 11929273
    Abstract: A system and computer-implemented method are provided for manufacturing a semiconductor electronic device. An assembler receives a jig and a boat supporting a die. The assembler includes a separator that separates the jig into a first jig portion and a second jig portion and a loader that positions the boat between the first jig portion and the second jig portion. A robot receives an assembly prepared by the assembler and manipulates a locking system that fixes an alignment of the boat relative to the first jig portion and the second jig portion to form a locked assembly. A process chamber receives the locked assembly and subjects the locked assembly to a fabrication operation.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: March 12, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Tsung-Sheng Kuo, Chih-Hung Huang, Guan-Wei Huang, Ping-Yung Yen, Hsuan Lee, Jiun-Rong Pai
  • Patent number: 11929314
    Abstract: In some implementations, one or more semiconductor processing tools may form a metal cap on a metal gate. The one or more semiconductor processing tools may form one or more dielectric layers on the metal cap. The one or more semiconductor processing tools may form a recess to the metal cap within the one or more dielectric layers. The one or more semiconductor processing tools may perform a bottom-up deposition of metal material on the metal cap to form a metal plug within the recess and directly on the metal cap.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsien Huang, Peng-Fu Hsu, Yu-Syuan Cai, Min-Hsiu Hung, Chen-Yuan Kao, Ken-Yu Chang, Chun-I Tsai, Chia-Han Lai, Chih-Wei Chang, Ming-Hsing Tsai
  • Publication number: 20240079019
    Abstract: Computer-implemented methods for training a neural network, as well as for implementing audio encoders and decoders via trained neural networks, are provided. The neural network may receive an input audio signal, generate an encoded audio signal and decode the encoded audio signal. A loss function generating module may receive the decoded audio signal and a ground truth audio signal, and may generate a loss function value corresponding to the decoded audio signal. Generating the loss function value may involve applying a psychoacoustic model. The neural network may be trained based on the loss function value. The training may involve updating at least one weight of the neural network.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Applicant: Dolby Laboratories Licensing Corporation
    Inventors: Roy M. FEJGIN, Grant A. DAVIDSON, Chih-Wei WU, Vivek KUMAR
  • Publication number: 20240077762
    Abstract: A display is disclosed. The display comprises a display panel, and an optical film disposed on a viewing side of the display panel. The optical film has a total haze ranging from 15% to 60%, an inner haze less than or equal to 10%, and a reflectivity satisfying the relationships of 0.35%?(RSCI-RSCE)?1.50% and RSCE?1.50%, wherein RSCI is an average reflectivity of diffuse component and specular component, and RSCE is an average reflectivity of diffuse component. By adjusting the total haze, inner haze and reflectivity of the optical film to satisfy the above relationship, the display can have good anti-glare properties, and the contrast ratio of the display will not be reduced too much to avoid the display quality be affected.
    Type: Application
    Filed: April 10, 2023
    Publication date: March 7, 2024
    Applicant: BenQ Materials Corporation
    Inventors: Yu-Wei Tu, Chih-Wei Lin, Kuo-Hsuan Yu
  • Publication number: 20240079051
    Abstract: Disclosed is a memory cell including a first transistor having a first terminal coupled to a bit line; a second transistor having a first terminal coupled to a bit line bar; a weight storage circuit coupled between a gate terminal of the first transistor and a gate terminal of the second transistor, storing a weight value, and determining to turn on the first transistor or the second transistor according to the weight value; and a driving circuit coupled to a second terminal of the first transistor, a second terminal of the second transistor, and at least one word line, receiving at least one threshold voltage and at least one input data from the word line, and determining whether to generate an operation current on a path of the turned-on first transistor or the turned-on second transistor according to the threshold voltage and the input data.
    Type: Application
    Filed: November 8, 2022
    Publication date: March 7, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Chih-Sheng Lin, Tuo-Hung Hou, Fu-Cheng Tsai, Jian-Wei Su, Kuo-Hua Tseng
  • Publication number: 20240079981
    Abstract: A motor drive system includes an electric motor, a drive circuit and a control unit. The drive circuit provides a driving current to the electric motor. A current command generator of the control unit generates a current command according to a torque command and a motor operating information. The driving current is converted into a d-axis current and/or a q-axis current by the control unit. Consequently, the driving current is close to the d-axis current command and/or the q-axis current command corresponding to the current command. If a value of the torque command is positive, the current command generator generates the corresponding current command according to a MTPA lookup table. If the value of the torque command is negative, the current command generator generates the corresponding current command according to a zero recycle lookup table.
    Type: Application
    Filed: December 2, 2022
    Publication date: March 7, 2024
    Inventors: Chih-Hung Hsiao, Chung-Hsing Ku, Shang-Wei Chiu, Zhi-Sheng Yang
  • Publication number: 20240080490
    Abstract: A video codec receives data for a block of pixels to be encoded or decoded as a current block of a current picture of a video. The video codec signals or parses a first syntax element for a first coding mode in a particular set of two or more coding modes. Each of coding mode of the particular set of coding modes modifies a merge candidate or an inter-prediction that is generated based on the merge candidate. The video codec enables the first coding mode and disables one or more other coding modes in the particular set of coding modes. The disabled one or more coding modes in the particular set of coding modes are disabled without parsing syntax elements for the disabled coding modes. The video codec encodes or decodes the current block by using the enabled first coding mode and bypassing the disabled coding modes.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Applicant: HFI Innovation Inc.
    Inventors: Man-Shu Chiang, Chih-Wei Hsu, Ching-Yeh Chen
  • Publication number: 20240079399
    Abstract: A package structure and methods of forming a package structure are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is located aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element. The encapsulant laterally encapsulates the second die and the wall structure.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chien Pan, Chin-Fu Kao, Li-Hui Cheng, Szu-Wei Lu
  • Publication number: 20240079758
    Abstract: An electronic device includes a metal back cover, a metal frame, and a first, second, third, and fourth radiators. The metal frame includes a discrete part and two connection parts. The connection parts are located by two sides of the discrete part, separated from the discrete part, and connected to the metal back cover. A U-shaped slot is formed between the discrete part and the metal back cover and between the discrete part and the connection parts. The first radiator is separated from the discrete part and includes a feed end. The second, third, and fourth radiators are connected to the discrete part and the metal back cover. The third radiator is located between the first and second radiators. The first radiator is located between the third and fourth radiators. The discrete part and the first, second, third, and fourth radiators form an antenna module together.
    Type: Application
    Filed: August 2, 2023
    Publication date: March 7, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Chih-Wei Liao, Hau Yuen Tan, Shih-Keng Huang, Wen-Hgin Chuang, Lin-Hsu Chiang, Chang-Hua Wu, Han-Wei Wang, Chun-Jung Hu
  • Publication number: 20240077670
    Abstract: A semiconductor structure includes an optical interposer having at least one first photonic device in a first dielectric layer and at least one second photonic device in a second dielectric layer, wherein the second dielectric layer is disposed above the first dielectric layer. The semiconductor structure further includes a first die disposed on the optical interposer and electrically connected to the optical interposer; a first substrate under the optical interposer; and conductive connectors under the first substrate.
    Type: Application
    Filed: January 13, 2023
    Publication date: March 7, 2024
    Inventors: Chih-Wei Tseng, Hsing-Kuo Hsia, Stefan Rusu, Chen-Hua Yu, Chewn-Pu Jou
  • Publication number: 20240080984
    Abstract: A package structure, including a circuit board, multiple circuit structure layers, at least one bridge structure, and at least one supporting structure, is provided. The circuit structure layer is disposed on the circuit board. The bridge structure is connected between the two adjacent circuit structure layers. The supporting structure is located between the two adjacent circuit structure layers, and the supporting structure has a first end and a second end opposite to each other and respectively connecting the bridge structure and the circuit board.
    Type: Application
    Filed: January 3, 2023
    Publication date: March 7, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Wei Huang, Ching-Feng Yu, Chih-Cheng Hsiao
  • Patent number: 11924481
    Abstract: The disclosed computer-implemented method may include (1) accessing a first media data object and a different, second media data object that, when played back, each render temporally sequenced content, (2) comparing first temporally sequenced content represented by the first media data object with second temporally sequenced content represented by the second media data object to identify a set of common temporal subsequences between the first media data object and the second media data object, (3) identifying a set of edits relative to the set of common temporal subsequences that describe a difference between the temporally sequenced content of the first media data object and the temporally sequenced content of the second media data object, and (4) executing a workflow relating to the first media data object and/or the second media data object based on the set of edits. Various other methods, systems, and computer-readable media are also disclosed.
    Type: Grant
    Filed: March 20, 2023
    Date of Patent: March 5, 2024
    Assignee: Netflix, Inc.
    Inventors: Yadong Wang, Chih-Wei Wu, Kyle Tacke, Shilpa Jois Rao, Boney Sekh, Andrew Swan, Raja Ranjan Senapati
  • Patent number: 11921307
    Abstract: The present disclosure provides an optical element driving mechanism, which includes a movable part, a fixed assembly, and a driving assembly. The movable part is configured to be connected to an optical element. The movable part is movable relative to the fixed assembly. The driving assembly is configured to drive the movable part to move relative to the fixed assembly. The movable part includes a connecting assembly configured to position the optical element.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: March 5, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Hsi Wang, Chao-Chang Hu, Chih-Wei Weng, Kuen-Wang Tsai, Tzu-Ying Chen
  • Patent number: 11923293
    Abstract: In some embodiments, the present disclosure relates to an integrated chip that includes a first interconnect dielectric layer arranged over a substrate. An interconnect wire extends through the first interconnect dielectric layer, and a barrier structure is arranged directly over the interconnect wire. The integrated chip further includes an etch stop layer arranged over the barrier structure and surrounds outer sidewalls of the barrier structure. A second interconnect dielectric layer is arranged over the etch stop layer, and an interconnect via extends through the second interconnect dielectric layer, the etch stop layer, and the barrier structure to contact the interconnect wire.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Chieh Yao, Chung-Ju Lee, Chih Wei Lu, Hsi-Wen Tien, Wei-Hao Liao, Yu-Teng Dai
  • Patent number: 11924413
    Abstract: A video decoder that decodes a current block of pixels by using multi-hypothesis combined prediction mode is provided. The video decoder generates a first prediction of the current block based on an inter prediction mode. The video decoder enables the combined prediction mode for the current block based on a block size of the current block determined according to a width and a height of the current block. The combined prediction mode is disabled when the width of or the height of the current block is greater than a threshold length. When the combined prediction mode is enabled, the video decoder generates a second prediction based on an intra prediction mode that is inferred to be a planar mode, and subsequently a combined prediction for the current block based on the first prediction and the second prediction. The video decoder reconstructs the current block by using the combined prediction.
    Type: Grant
    Filed: March 6, 2023
    Date of Patent: March 5, 2024
    Assignee: MediaTek Inc.
    Inventors: Man-Shu Chiang, Chih-Wei Hsu
  • Patent number: 11924444
    Abstract: Method and apparatus for constrained de-blocking filter are disclosed. One method receives input data related to a current block in a current picture at a video encoder side or a video bitstream corresponding to compressed data including the current block in the current picture at a video decoder side, and determines a first boundary associated with the current block, wherein the first boundary corresponds to one vertical boundary or one horizontal boundary of the current block. The method then applies de-blocking process to a reconstructed current block corresponding to the current block to result in a filtered-reconstructed current block, using a plurality of first reference samples at a same side of the first boundary, and replaces a first set of the first reference samples by one or more padding values. The method then generates a filtered decoded picture including the filtered-reconstructed current block.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: March 5, 2024
    Assignee: HFI INNOVATION INC.
    Inventors: Chia-Ming Tsai, Chih-Wei Hsu, Ching-Yeh Chen, Tzu-Der Chuang, Yu-Wen Huang
  • Patent number: 11921101
    Abstract: Disclosed are calibration techniques that can be implemented by a device that conducts biological tests. In certain embodiments, the device for testing a biological specimen includes a receiving mechanism to receive a carrier, a camera module arranged to capture imagery of the carrier, and a processor. Some examples of the processor can detect a calibration mode trigger. In calibration mode, the processor can divide the captured imagery into segments and selectively perform one or more calibration procedures for each segment. Then, the processor records a calibration result for each segment.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: March 5, 2024
    Assignee: Bonraybio Co., Ltd.
    Inventors: Cheng-Teng Hsu, Chih-Pin Chang, Kuang-Li Huang, Yu-Chiao Chi, Chia-Wei Chang, Chiung-Han Wang