Patents by Inventor Chih-Che Lin
Chih-Che Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240120338Abstract: A semiconductor device structure is provided. The semiconductor device has a first dielectric wall between an n-type source/drain region and a p-type source/drain region to physically and electrically isolate the n-type source/drain region and the p-type source/drain region from each other. A second dielectric wall is formed between a first channel region connected to the n-type source/drain region and a second channel region connected to the p-type source/drain region. A contact is formed to physically and electrically connect the n-type source/drain region with the p-type source/drain region, wherein the contact extends over the first dielectric wall. The first electric wall has a gradually decreasing width W5 towards a tip of the dielectric wall from a top contact position between the first dielectric wall and either the n-type source/drain region or the p-type source/drain region.Type: ApplicationFiled: February 15, 2023Publication date: April 11, 2024Inventors: Ta-Chun LIN, Ming-Che CHEN, Yu-Hsuan LU, Chih-Hao CHANG
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Patent number: 11949056Abstract: The light emitting diode packaging structure includes a flexible substrate, a first adhesive layer, micro light emitting elements, a conductive pad, a redistribution layer, and an electrode pad. The first adhesive layer is disposed on the flexible substrate. The micro light emitting elements are disposed on the first adhesive layer and have a first surface facing to the first adhesive layer and an opposing second surface. The micro light emitting elements include a red micro light emitting element, a blue micro light emitting element, and a green micro light emitting element. The conductive pad is disposed on the second surface of the micro light emitting element. The redistribution layer covers the micro light emitting elements and the conductive pad. The electrode pad is disposed on the redistribution layer and is electrically connected to the circuit layer. A thickness of the flexible substrate is less than 100 um.Type: GrantFiled: April 20, 2023Date of Patent: April 2, 2024Assignee: Lextar Electronics CorporationInventors: Chih-Hao Lin, Jo-Hsiang Chen, Shih-Lun Lai, Min-Che Tsai, Jian-Chin Liang
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Patent number: 11942419Abstract: An integrated circuit structure includes a dielectric layer and an etch stop layer. The etch stop layer includes a first sub layer including a metal nitride over the first dielectric layer, and a second sub layer overlying or underlying the first sub layer. The second sub layer includes a metal compound comprising an element selected from carbon and oxygen, and is in contact with the first sub layer.Type: GrantFiled: June 30, 2022Date of Patent: March 26, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shiu-Ko JangJian, Tsung-Hsuan Hong, Chun Che Lin, Chih-Nan Wu
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Patent number: 11935804Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.Type: GrantFiled: April 10, 2023Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tzu-Sung Huang, Ming Hung Tseng, Yen-Liang Lin, Hao-Yi Tsai, Chi-Ming Tsai, Chung-Shi Liu, Chih-Wei Lin, Ming-Che Ho
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Patent number: 11934027Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: GrantFiled: June 21, 2022Date of Patent: March 19, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
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Patent number: 11632106Abstract: A switch device includes a first node, a switch unit, an adjustment switch, an impedance element, a second node and a detection unit. A first terminal of the switch unit is coupled to the first node. A first terminal and a second terminal of the adjustment switch are respectively coupled to a second terminal of the switch unit and a reference voltage terminal. A first terminal and a second terminal of the impedance element are respectively coupled to the first terminal and the second terminal of the adjustment switch. The detection unit is coupled to the second node, and a control terminal of the switch unit and a control terminal of the adjustment switch. The detection unit detects a node signal at the second node to accordingly control the switch unit and the adjustment switch.Type: GrantFiled: December 2, 2021Date of Patent: April 18, 2023Assignee: RichWave Technology Corp.Inventors: Chih-Sheng Chen, Chih-Che Lin, Yu-Siang Huang, Hsuan-Der Yen
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Publication number: 20230109162Abstract: A switch device includes a first node, a switch unit, an adjustment switch, an impedance element, a second node and a detection unit. A first terminal of the switch unit is coupled to the first node. A first terminal and a second terminal of the adjustment switch are respectively coupled to a second terminal of the switch unit and a reference voltage terminal. A first terminal and a second terminal of the impedance element are respectively coupled to the first terminal and the second terminal of the adjustment switch. The detection unit is coupled to the second node, and a control terminal of the switch unit and a control terminal of the adjustment switch. The detection unit detects a node signal at the second node to accordingly control the switch unit and the adjustment switch.Type: ApplicationFiled: December 2, 2021Publication date: April 6, 2023Applicant: RichWave Technology Corp.Inventors: Chih-Sheng Chen, Chih-Che Lin, Yu-Siang Huang, Hsuan-Der Yen
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Publication number: 20230041666Abstract: An autonomous water quality sensing apparatus, a system and a method for operating the apparatus are provided. In the autonomous water quality sensing system, the autonomous water quality sensing apparatus is configured to move on a track. In the method, a driving mechanism is used to drive the autonomous water quality sensing apparatus to operate over an elevated track surrounding one or more pools. The autonomous water quality sensing apparatus includes a sensing device. The sensor is put into the pool at a planned stop by a sensor deploying mechanism of the autonomous water quality sensing apparatus, so as to obtain water quality data of each of the pools according to a routing plan and a length setting.Type: ApplicationFiled: August 3, 2021Publication date: February 9, 2023Inventor: CHIH-CHE LIN
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Patent number: 11566954Abstract: The disclosure relates to a force measurement device including central portion, fixing portion, first and second sensing portions, and first and second electromechanical elements. The first sensing portion has first natural frequency. The first sensing portion is connected to the central portion. The second sensing portion has a second natural frequency. The second sensing portion is connected to the first sensing portion and the fixing portion. The first electromechanical element is disposed on the first sensing portion to measure a first vibration amplitude. The second electromechanical element is disposed on the second sensing portion to measure a second vibration amplitude. When the central portion is subjected to a first force, the first vibration amplitude is larger than the second vibration amplitude. When the central portion is subjected to a second force, the first vibration amplitude is smaller than the second vibration amplitude.Type: GrantFiled: June 11, 2020Date of Patent: January 31, 2023Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chih-Che Lin, Chih-Yuan Chen, Chung-Yuan Su, Chao-Ta Huang
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Publication number: 20220382174Abstract: The present disclosure describes a lithography apparatus comprising a photoresist coating unit configured to perform one or more coating processes on a substrate. The lithography apparatus further comprises a detection unit configured to determine a contamination level of a contaminant from the one or more coating processes adheres on a sidewall of the lithography apparatus. The lithography apparatus further comprises a controller unit configured to adjust one or more operations of the lithography apparatus based on a comparison between the contamination level and a baseline cleanliness requirement of the lithography apparatus.Type: ApplicationFiled: August 10, 2022Publication date: December 1, 2022Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Fu-Chun HSIEH, Chih-Che LIN, Pei-Yi SU
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Patent number: 11448978Abstract: The present disclosure describes a lithography apparatus comprising a photoresist coating unit configured to perform one or more coating processes on a substrate. The lithography apparatus further comprises a detection unit configured to determine a contamination level of a contaminant from the one or more coating processes adheres on a sidewall of the lithography apparatus. The lithography apparatus further comprises a controller unit configured to adjust one or more operations of the lithography apparatus based on a comparison between the contamination level and a baseline cleanliness requirement of the lithography apparatus.Type: GrantFiled: April 9, 2021Date of Patent: September 20, 2022Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Fu-Chun Hsieh, Chih-Che Lin, Pei-Yi Su
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Patent number: 11256180Abstract: A method includes transferring a wafer into a first processing chamber by using a robot arm mechanism, and applying a photoresist on the wafer in a first processing chamber. The wafer is transferred from the first processing chamber into a second processing chamber by using the robot arm mechanism, and the photoresist is exposed to a pattern of light in the second processing chamber. The method includes transferring the wafer from the second processing chamber into a third processing chamber by using the robot arm mechanism, and developing the exposed wafer in the third processing chamber. The method includes cleaning the robot arm mechanism in a dummy chamber.Type: GrantFiled: April 29, 2019Date of Patent: February 22, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Fu-Chun Hsieh, Pei-Yi Su, Chih-Che Lin
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Patent number: 11232052Abstract: A timing control method and system applied on the network simulator platform are disclosed. When at least one subprocess calls a system call to enter a blocking I/O, a marking operation is performed, the kernel issues a first notification event to a network simulator, to request the network simulator to pause until the subprocess leaves from the blocking I/O. when the kernel detects that the subprocess leaves from the blocking I/O already, the kernel issues a second notification event to the network simulator, so that the network simulator continues to simulate. The present invention can control the subprocess to not continuously occupy resource, and first and second notification events can prevent a simulator timer from continuously running during the subprocess execution period, to cause an abnormal timing of a simulation result.Type: GrantFiled: January 9, 2020Date of Patent: January 25, 2022Assignee: Estinet Technologies IncorporationInventors: Chih-Che Lin, Ting-Wei Ho
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Patent number: 11177901Abstract: A method of WDM-aware optical routing for on-chip devices is proposed, which is executed by a computer, the method comprising using the computer to perform the following steps of: performing a path separation to identify signal net candidates; performing a path clustering to find path clusters of the signal net candidates; performing an endpoint placement to find legal locations for WDM endpoints; and performing a pin-to-waveguide routing all nets to corresponding WDM waveguides.Type: GrantFiled: October 19, 2020Date of Patent: November 16, 2021Assignee: ANAGLOBE TECHNOLOGY, INC.Inventors: Yu-Sheng Lu, Sheng-Jung Yu, Yao-Wen Chang, Chih-Che Lin, Yu-Tsang Hsieh
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Publication number: 20210223709Abstract: The present disclosure describes a lithography apparatus comprising a photoresist coating unit configured to perform one or more coating processes on a substrate. The lithography apparatus further comprises a detection unit configured to determine a contamination level of a contaminant from the one or more coating processes adheres on a sidewall of the lithography apparatus. The lithography apparatus further comprises a controller unit configured to adjust one or more operations of the lithography apparatus based on a comparison between the contamination level and a baseline cleanliness requirement of the lithography apparatus.Type: ApplicationFiled: April 9, 2021Publication date: July 22, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Fu-Chun Hsieh, Chih-Che Lin, Pei-Yi Su
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Publication number: 20210199518Abstract: The disclosure relates to a force measurement device including central portion, fixing portion, first and second sensing portions, and first and second electromechanical elements. The first sensing portion has first natural frequency. The first sensing portion is connected to the central portion. The second sensing portion has a second natural frequency. The second sensing portion is connected to the first sensing portion and the fixing portion. The first electromechanical element is disposed on the first sensing portion to measure a first vibration amplitude. The second electromechanical element is disposed on the second sensing portion to measure a second vibration amplitude. When the central portion is subjected to a first force, the first vibration amplitude is larger than the second vibration amplitude. When the central portion is subjected to a second force, the first vibration amplitude is smaller than the second vibration amplitude.Type: ApplicationFiled: June 11, 2020Publication date: July 1, 2021Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chih-Che LIN, Chih-Yuan CHEN, Chung-Yuan SU, Chao-Ta HUANG
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Patent number: 11035746Abstract: A multi-axis force sensor including a central portion, an outer ring portion, and at least one sensing portion disposed along an axial direction of an axis is provided. The sensing portion includes a first and a second elements connected with each other, and at least one first and at least one second strain gauges. A first end surface of the first element is connected to the central portion, and a second end surface of the second element is connected to the outer ring portion. A normal vector of the first end surface is parallel to the axis and the axis passes through a centroid of the first end surface. When the first end surface is subjected to an axial force, a first strain of a first sensing region of the first element in the axial direction is smaller than a second strain of a second sensing region of the second element in the axial direction.Type: GrantFiled: July 22, 2019Date of Patent: June 15, 2021Assignee: Industrial Technology Research InstituteInventors: Chih-Che Lin, Chih-Yuan Chen, Chung-Yuan Su, Chao-Ta Huang
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Patent number: 10976676Abstract: The present disclosure describes a semiconductor apparatus and a method for handling contamination from a semiconductor manufacturing process. The semiconductor apparatus can include a chuck configured to hold a substrate, a drain cup configured to surround the chuck and to capture a chemical sprayed from the substrate, and a detection module disposed in a space between the drain cup and the chuck and configured to monitor sidewalls of the drain cup.Type: GrantFiled: June 28, 2019Date of Patent: April 13, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Fu-Chun Hsieh, Chih-Che Lin, Pei-Yi Su
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Publication number: 20210026790Abstract: A timing control method and system applied on the network simulator platform are disclosed. When at least one subprocess calls a system call to enter a blocking I/O, a marking operation is performed, the kernel issues a first notification event to a network simulator, to request the network simulator to pause until the subprocess leaves from the blocking I/O. when the kernel detects that the subprocess leaves from the blocking I/O already, the kernel issues a second notification event to the network simulator, so that the network simulator continues to simulate. The present invention can control the subprocess to not continuously occupy resource, and first and second notification events can prevent a simulator timer from continuously running during the subprocess execution period, to cause an abnormal timing of a simulation result.Type: ApplicationFiled: January 9, 2020Publication date: January 28, 2021Inventors: CHIH-CHE LIN, TING-WEI HO
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Publication number: 20200341390Abstract: A method includes transferring a wafer into a first processing chamber by using a robot arm mechanism, and applying a photoresist on the wafer in a first processing chamber. The wafer is transferred from the first processing chamber into a second processing chamber by using the robot arm mechanism, and the photoresist is exposed to a pattern of light in the second processing chamber. The method includes transferring the wafer from the second processing chamber into a third processing chamber by using the robot arm mechanism, and developing the exposed wafer in the third processing chamber. The method includes cleaning the robot arm mechanism in a dummy chamber.Type: ApplicationFiled: April 29, 2019Publication date: October 29, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Fu-Chun HSIEH, Pei-Yi SU, Chih-Che LIN