Abstract: A power module and a power device are provided. The power device includes two screws, a heat dissipation components and a power module. The power module includes a substrate, a package body and two fixing structures. Each fixing structure includes a first through hole, two second through holes, an annular structure and two sinking structures. When the power module is fixed to the heat dissipation component, each sinking structure is bent toward the heat dissipation component, and each annular structure is fixed to the flat surface of the heat dissipation component by the screws. The heat dissipation surface of the substrate can be flatly attached to the flat surface of the heat dissipation component through the two fixed structures, so that the heat energy generated during the operation of the power module can be transferred out through the heat dissipation component.

Abstract: A circuit board includes a substrate and a first metal circuit layer. The substrate has an upper surface and a lower surface opposite to the upper surface. The first metal circuit layer is located on the upper surface, and the first metal circuit layer includes a first line area and a second line area. The first line area and the second line area are separated by a groove area, and the groove area includes a bent section. Accordingly, the risk of detachment between the first metal circuit layer and the substrate due to stress concentration on the circuit board can be reduced.

Abstract: A method is provided to operate an image sensor, including the following steps: comparing a first threshold with multiple first frame-difference signals to generate a first region of interest (ROI) address, wherein each of multiple first frame-difference signals is generated by a corresponding pixel, in multiple pixels, operating during a first time frame and a second time frame, wherein multiple pixels are arranged in multiple columns and multiple rows; identifying edge columns and edge rows in the first ROI address; adjusting, according to the edge columns and the edge rows, the first ROI address to generate a second ROI address; and outputting a ROI image according to the second ROI address and multiple second frame-difference signals generated by multiple pixels operating during the second time frame and a third time frame after the second time frame.

Abstract: A power module package is provided. The power module package includes an electronic assembly that includes a substrate and a power device group. The substrate includes an insulating layer, a circuit pattern layer, and a conductive heat-dissipating layer. The circuit pattern layer and the conductive heat-dissipating layer are respectively disposed at two opposite sides of the insulating layer. The power device group is disposed on the circuit pattern layer, and the power device group and the circuit pattern layer are configured to form a common circuit. A total area of the conductive heat-dissipating layer is greater than that of the circuit pattern layer, and a thickness of the circuit pattern layer is greater than that of the insulating layer.

Abstract: A power module package is provided. The power module package includes an electronic assembly, a first terminal assembly and a second terminal assembly. The electronic assembly at least includes a substrate. The first terminal assembly includes a first power device terminal, and the second terminal assembly includes a second power device terminal. The first power device terminal and the second power device terminal respectively extend from different surfaces of the substrate to form a height difference therebetween. The first power device terminal includes a first contact section and a first non-contact section. The first contact section is directly connected to the substrate, and the first non-contact section is not in contact with the substrate. The substrate protrudes from the first contact section and extends to a position under the first non-contact section.

Abstract: An image sensor chip and a sensing method thereof are disclosed. The image sensor chip includes pixel units. Each pixel unit includes a reset switch, a sampling switch, a light sensing element, a capacitor, and an output circuit. The sampling switch is coupled between the reset switch and the light sensing element. The capacitor is coupled between the sampling switch and the output circuit. The output circuit outputs difference information corresponding to a difference between a plurality of sensing results of the light sensing element in different frame periods to a corresponding readout line. The sampling switch has an ON-time length during an exposure period and an OFF-time length during a readout and clean-up period. A ratio of the ON-time length to the OFF-time length is related to a ratio of a capacitance of the light sensing element to a capacitance of the capacitor.

Abstract: An image sensor integrated with a convolutional neural network computation circuit is provided. The image sensor includes: a pixel array including pixels divided into pixel groups, wherein each pixel converts a light signal into a PWM signal; a convolution computation circuit controlling a turn-on time of a corresponding weighted current according to the first PWM signal of each pixel, and accumulating the weighted currents into an integrated current; a comparison circuit converting the integrated current into a second PWM signal and comparing it with that of an adjacent pixel group to output a larger one; and a classification circuit quantizing the second PWM signal to a quantization value according to a weight of a node in a fully-connected layer corresponding to each pixel group, accumulating the quantization values of all pixel groups into a feature value, and comparing the feature value with a feature threshold to obtain a classification result.

Abstract: A power module and a power device are provided. The power device includes two screws, a heat dissipation components and a power module. The power module includes a substrate, a package body and two fixing structures. Each fixing structure includes a first through hole, two second through holes, an annular structure and two sinking structures. When the power module is fixed to the heat dissipation component, each sinking structure is bent toward the heat dissipation component, and each annular structure is fixed to the flat surface of the heat dissipation component by the screws. The heat dissipation surface of the substrate can be flatly attached to the flat surface of the heat dissipation component through the two fixed structures, so that the heat energy generated during the operation of the power module can be transferred out through the heat dissipation component.

Abstract: An image sensor chip and a sensing method thereof are provided. The image sensor chip includes a pixel array. The pixel array includes a plurality of pixel units, and each of the pixel units includes a light sensing circuit, a reset switch and an output circuit. The reset switch is coupled to a first terminal of the light sensing circuit. The reset switch resets the light sensing circuit during reset period. The output circuit is coupled to the first terminal of the light sensing circuit. The output circuit of the pixel unit outputs difference information corresponding to the difference between the first sensing result of the light sensing circuit in a first frame period and the second sensing result of the light sensing circuit in a second frame period after the first frame period to a corresponding one of a plurality of readout lines of the pixel array.

Abstract: An image sensor integrated with a convolutional neural network computation circuit is provided. The image sensor includes: a pixel array including pixels divided into pixel groups, wherein each pixel converts a light signal into a PWM signal; a convolution computation circuit controlling a turn-on time of a corresponding weighted current according to the first PWM signal of each pixel, and accumulating the weighted currents into an integrated current; a comparison circuit converting the integrated current into a second PWM signal and comparing it with that of an adjacent pixel group to output a larger one; and a classification circuit quantizing the second PWM signal to a quantization value according to a weight of a node in a fully-connected layer corresponding to each pixel group, accumulating the quantization values of all pixel groups into a feature value, and comparing the feature value with a feature threshold to obtain a classification result.

Abstract: An image sensor chip and a sensing method thereof are provided. The image sensor chip includes a pixel array. The pixel array includes a plurality of pixel units, and each of the pixel units includes a light sensing circuit, a reset switch and an output circuit. The reset switch is coupled to a first terminal of the light sensing circuit. The reset switch resets the light sensing circuit during reset period. The output circuit is coupled to the first terminal of the light sensing circuit. The output circuit of the pixel unit outputs difference information corresponding to the difference between the first sensing result of the light sensing circuit in a first frame period and the second sensing result of the light sensing circuit in a second frame period after the first frame period to a corresponding one of a plurality of readout lines of the pixel array.

Abstract: A power module including a carrier assembly and a power device disposed on the carrier assembly is provided. The carrier assembly includes a bottom board, a circuit board, a lead frame, and a pad group. The circuit board is disposed on the bottom board and includes a device mounting portion and an extending portion protruding from a side of the device mounting portion. The lead frame disposed on the bottom board includes a first conductive portion and a second conductive portion insulated from each other. The extending portion of the circuit board is disposed between the first and second conductive portions, and an upper surface of the lead frame is flush with a top surface of the extending portion. A pad group includes a first pad disposed on the extending portion, a second pad and a third pad respectively disposed on the first and second conductive portions.

Abstract: A method for integrating a processing-in-sensor unit and an in-memory computing includes the following steps. A providing step is performed to transmit the first command signal and the initial data to the in-memory computing unit. A converting step is performed to drive the first command signal and the initial data to convert to a second command signal and a plurality of input data through a synchronizing module. A fetching step is performed to drive a frame difference module to receive the input data to fetch a plurality of difference data. A slicing step is performed to drive a bit-slicing module to receive the difference data and slice each of the difference data into a plurality of bit slices. A controlling step is performed to encode the difference address into a control signal, and the in-memory computing unit accesses each of the bit slices according to the control signal.

Abstract: A power module including a carrier assembly and a power device disposed on the carrier assembly is provided. The carrier assembly includes a bottom board, a circuit board, a lead frame, and a pad group. The circuit board is disposed on the bottom board and includes a device mounting portion and an extending portion protruding from a side of the device mounting portion. The lead frame disposed on the bottom board includes a first conductive portion and a second conductive portion insulated from each other. The extending portion of the circuit board is disposed between the first and second conductive portions, and an upper surface of the lead frame is flush with a top surface of the extending portion. A pad group includes a first pad disposed on the extending portion, a second pad and a third pad respectively disposed on the first and second conductive portions.

Abstract: A processing device for position sensing includes a plurality of light sensors, a signal processing unit, a current mirror unit and a transforming unit. The light sensors are spaced apart from each other and sense a light field to generate a plurality of position sensing current signals. The signal processing unit receives the position sensing current signals and provides a load isolation, so as to generate a first current signal and a second current signal. The second current signal is transmitted to a node. The first and second current signals respectively correspond to a first group and a second group of light sensors. The current mirror unit mirrors the first current signal to a third current signal. The third current is transmitted to the node. The transforming unit transforms a differential current signal formed by the second and third current signals on the node to a voltage signal.

Abstract: A processing device for position sensing includes a plurality of light sensors, a signal processing unit, a current mirror unit and a transforming unit. The light sensors are spaced apart from each other and sense a light field to generate a plurality of position sensing current signals. The signal processing unit receives the position sensing current signals and provides a load isolation, so as to generate a first current signal and a second current signal. The second current signal is transmitted to a node. The first and second current signals respectively correspond to a first group and a second group of light sensors. The current mirror unit mirrors the first current signal to a third current signal. The third current is transmitted to the node. The transforming unit transforms a differential current signal formed by the second and third current signals on the node to a voltage signal.

Abstract: A brake energy recovery module for an electric vehicle. The electric vehicle includes a motor module and a battery module. The brake energy recovery module includes a first detecting unit, a signal decoder, a power converting unit and a control unit. The first detecting unit is electrically connected to the motor module to detect a first voltage of the motor module. The signal decoder generates a first signal and a second signal according to plural operation signals of the motor module. The power converting unit is electrically connected to the motor module and the battery module. The control unit is electrically connected to the first detecting unit, the signal decoder and the power converting unit. The control unit controls the power converting unit to adjust the first voltage to provide the battery module with a second voltage according to the first voltage, the first signal and the second signal.

Abstract: A manufacturing method of a chip package structure is provided. Firstly, a conductive frame including a bottom plate and a plurality of partition plates is provided. The bottom plate has a supporting surface and a bottom surface opposite thereto, and the partition plates protrude from the supporting surface to define a plurality of the accommodating regions. Subsequently, a plurality of chips is provided, and each of the chips is correspondingly accommodated in each of the accommodating regions with a back surface facing to the supporting surface. Thereafter, the conductive frame is cut to form a plurality of separated chip package structures.

Abstract: A fan-out wafer level chip package structure and the manufacturing method thereof are provided. The method includes the steps of providing a supporting plate having a removable tape formed on the supporting plate, placing a plurality of chips on the removable tape, applying an adhesive layer on a back surface of each of the chips, providing a conductive cover for covering all chips and isolating the chips from each other by a plurality of partitions, injecting a molding compound into an inside of the conductive cover and curing the molding compound for forming an encapsulation, separating the encapsulation from the supporting plate, forming a connection layer on an active surface of each of the chips to establish electrical connections, and performing a cutting process to divide the encapsulation into a plurality of the package structures.

Abstract: A semiconductor package structure and manufacturing method thereof are provided. Firstly, a first surface mounting unit, a first printed circuit board, and a second printed circuit board are provided. The first surface mounting unit includes a first chip and a first conductive frame, and the first conductive frame has a first carrier board and a first metal member connected to the first carrier board. A first side of the first chip is electrically connected to the first carrier board of the first conductive frame. A second side of the first chip and the first metal member are connected to the first circuit board by a first pad and a second pad respectively. The second circuit board is connected to the first carrier board and hence, the first surface mounting unit is located between the first circuit board and the second circuit board.