Patents by Inventor Chih-Cheng Lu

Chih-Cheng Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240194217
    Abstract: A data processing method for acoustic event includes: establishing a simulated acoustic frequency event module, a data capturing module, and a sound application decision module in a software manner, setting a simulated hardware parameter to the simulated acoustic frequency event module, inputting a sound signal to a frequency filtering module of the simulated acoustic frequency event module, and obtaining metadata from a frequency event quantizer of the simulated acoustic frequency event module, dividing each of the metadata into multiple frames according to a time interval by the data capturing module, accumulating an event number of each frame by the data capturing module, setting a label of each frame according to the event number, storing these frames, the event number and the label in a database, and training a decision model by the sound application decision module according to the database and a sound application.
    Type: Application
    Filed: December 27, 2022
    Publication date: June 13, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Cheng LU, Jian-Bai LI, Cheng-Ming SHIH, Yu-Lee YEH, Kai-Cheung JUANG
  • Publication number: 20230196094
    Abstract: A quantization method for neural network model includes following steps: initializing a weight array of a neural network model, wherein the weight array includes a plurality of initial weights; performing a quantization procedure to generate a quantized weight array according to the weight array, wherein the quantized weight array includes a plurality of quantized weights within a fixed range; performing a training procedure of the neural network model according to the quantized weight array; and determining whether a loss function is convergent in the training procedure and outputting a post-trained quantized weight array when the loss function is convergent.
    Type: Application
    Filed: December 22, 2021
    Publication date: June 22, 2023
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Cheng LU, Jin-Yu LIN, Kai-Cheung JUANG
  • Publication number: 20210199503
    Abstract: A data processing system disposed on a sensor comprises a de-identified sensing device and a decoding device. The de-identified sensing device is configured to receive a sensing data of a target and to process the sensing data to generate a de-identified data. The decoding device communicably connects to the de-identified sensing device and is configured to generate a decoded data according to the de-identified data and a decoding parameter obtained from a database trained by machine learning. The de-identified sensing device comprises an analog encoder configured to encode the sensing data to generate a responsive data.
    Type: Application
    Filed: December 26, 2019
    Publication date: July 1, 2021
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Cheng LU, Kai-Cheung JUANG
  • Publication number: 20190171198
    Abstract: A semiconductor manufacturing system includes an operating terminal, a first controller, and a plurality of second controllers. The operating terminal controls a main controller. Each of the plurality of second controllers is electrically connected to the first controller. In an initial or default state, the operating terminal controls the first controller as a main controller, and when the first controller fails, the operating terminal controls one of the plurality of the second controllers as a main controller, the others of the plurality of second controllers being controlled by the main controller.
    Type: Application
    Filed: May 28, 2018
    Publication date: June 6, 2019
    Inventors: YI-CHUN CHIU, CHUN-KAI HUANG, CHIH-CHENG LU, CHUN-CHUNG CHEN, CHEN-TSU FU, SHENG-FU TSAI
  • Publication number: 20190139802
    Abstract: A front opening unified pod (FOUP) loading and air filling system comprises a FOUP loading device and an air filling device. The FOUP loading device is configured to load and unload a FOUP, and comprises a substrate and a controller. The substrate comprises a frame, a bearing platform installed on the frame, and a cavity under the bearing platform. The bearing platform is configured to support the FOUP. The controller and the air filling device are accommodated in the cavity. The air filling device is connected to the FOUP.
    Type: Application
    Filed: December 7, 2017
    Publication date: May 9, 2019
    Inventors: YI-CHUN CHIU, CHUN-KAI HUANG, CHIH-CHENG LU, CHUN-CHUNG CHEN, CHEN-TSU FU, SHENG-FU TSAI
  • Publication number: 20190074208
    Abstract: A wafer supporting system includes a supporting pedestal. The supporting pedestal includes a main supporting body and a hollow frame surrounding the supporting pedestal. The main supporting body includes a top surface and a bottom surface opposite to the top surface, the top surface defined a plurality of vent grooves and a plurality of holding grooves. The main supporting body includes a plurality of holding channels extending through from the bottom surface to the holding grooves and a plurality of first through holes pass through from the top surface to the bottom surface, each holding groove is surrounded by a plurality of first through holes; an inner side surface of the hollow frame and a side wall of the supporting pedestal form a gap, and a plurality of exhaust cylinders are arranged in the annular gap and each exhaust cylinder is communicated with each vent groove.
    Type: Application
    Filed: June 11, 2018
    Publication date: March 7, 2019
    Inventors: YI-CHUN CHIU, CHUN-KAI HUANG, CHIH-CHENG LU, CHUN-CHUNG CHEN, CHEN-TSU FU, SHENG-FU TSAI
  • Publication number: 20190064401
    Abstract: A reflective exposure apparatus includes a platform, an illuminating system, a photomask, a chip, and a reflecting convex mirror. The photomask is formed on the platform and faces the illuminating system. The chip is formed on the platform. The illuminating system and the reflecting curved mirror are formed on opposite sides of the platform. The platform can be moved relative to the illuminating system and the reflecting curved mirror.
    Type: Application
    Filed: December 22, 2017
    Publication date: February 28, 2019
    Inventors: YI-CHUN CHIU, CHUN-KAI HUANG, CHIH-CHENG LU, CHUN-CHUNG CHEN, CHEN-TSU FU, SHENG-FU TSAI
  • Publication number: 20190035658
    Abstract: An air purifying device for a front opening unified pod (FOUP) carrying silicon wafers includes an air supply assembly and an air discharging assembly. The air supply assembly can be triggered by a signal to supply purified air to the FOUP. The air discharging assembly discharges air from the FOUP when the air supply assembly begins to supply the FOUP with purified air and detects a humidity and a temperature of the discharged air. The detected humidity and the detected temperature correspond to a relative humidity of the discharged air. When the relative humidity is equal to a preset relative humidity, the air supply assembly is stopped and the air discharging assembly is stopped.
    Type: Application
    Filed: November 29, 2017
    Publication date: January 31, 2019
    Inventors: YI-CHUN CHIU, CHUN-CHUNG CHEN, CHUN-KAI HUANG, CHIH-CHENG LU
  • Publication number: 20190035659
    Abstract: An air purifying device for an FOUP includes an air supply assembly. The air supply assembly includes an air supply tube and an airtight connecting unit connecting the tube to the FOUP in an airtight manner. The air tight connecting unit includes an elastic absorbing portion, a nozzle, and a driver. An initial position of the elastic absorbing portion is lower than a supporting surface of a load port before the FOUP is placed on the supporting surface. One end of the nozzle is fixedly inserted to the elastic absorbing portion, and another end of the nozzle is movably inserted to the air supply tube. The driver can drive the nozzle and the elastic absorbing portion to move upward to press against the FOUP when the FOUP is placed on the supporting surface, causing the elastic absorbing portion to be vertically deformed to maintain an airtight connection.
    Type: Application
    Filed: November 29, 2017
    Publication date: January 31, 2019
    Inventors: YI-CHUN CHIU, CHUN-KAI HUANG, CHIH-CHENG LU, CHUN-CHUNG CHEN
  • Patent number: 10087005
    Abstract: A shunting device used to transport workpieces comprises a plurality of rotating shafts parallel to one another and arranged in arrays, a plurality of first omnidirectional wheels, and a plurality of second omnidirectional wheels. The first omnidirectional wheels and the second omnidirectional wheels are each wrapped around a corresponding one of the rotating shafts in a matrix. The first omnidirectional wheels and the second omnidirectional wheels are alternatively arranged along the corresponding one of the plurality of rotating shafts and a second direction perpendicular to the plurality of rotating shafts. A plurality of first driven rollers of the first omnidirectional wheels and a plurality of second driven rollers of the second omnidirectional wheels are mirror-symmetrical along at least one of a third direction parallel to the plurality of rotating shafts and the second direction.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: October 2, 2018
    Assignee: FOXSEMICON INTEGRATED TECHNOLOGY, INC.
    Inventors: Yi-Chun Chiu, Chun-Kai Huang, Chih-Cheng Lu, Chun-Chung Chen
  • Patent number: 9709640
    Abstract: A single bridge magnetic field sensor includes a fluxguide mounted to a surface of a substrate. A bridge unit includes first, second, third, and fourth magnetoresistive elements mounted around the fluxguide and mounted on the surface of the substrate. A switching circuit is electrically connected to two voltage inputs, two grounding terminals, two voltage output terminals, and the four magnetoresistive elements. The switching circuit can proceed with circuit switching according to a magnetic field in each axis direction to be measured, thereby changing electrical connection between the voltage inputs, the grounding terminals, the voltage output terminals, and the four magnetoresistive elements. A measuring unit is electrically connected to the two voltage output terminals and the four magnetoresistive elements.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: July 18, 2017
    Assignee: National Taiwan University
    Inventors: Ching-Ray Chang, Jen-Tzong Jeng, Jen-Hwa Hsu, Chih-Cheng Lu, Bor-Lin Lai, Van-Su Luong
  • Publication number: 20170059668
    Abstract: A single bridge magnetic field sensor includes a fluxguide mounted to a surface of a substrate. A bridge unit includes first, second, third, and fourth magnetoresistive elements mounted around the fluxguide and mounted on the surface of the substrate. A switching circuit is electrically connected to two voltage inputs, two grounding terminals, two voltage output terminals, and the four magnetoresistive elements. The switching circuit can proceed with circuit switching according to a magnetic field in each axis direction to be measured, thereby changing electrical connection between the voltage inputs, the grounding terminals, the voltage output terminals, and the four magnetoresistive elements. A measuring unit is electrically connected to the two voltage output terminals and the four magnetoresistive elements.
    Type: Application
    Filed: August 31, 2015
    Publication date: March 2, 2017
    Inventors: CHING-RAY CHANG, JEN-TZONG JENG, JEN-HWA HSU, CHIH-CHENG LU, BOR-LIN LAI, VAN-SU LUONG
  • Patent number: 8692571
    Abstract: The reliability of an integrated circuit is inferred from the operational characteristics of sample metal oxide semiconductor (MOS) devices switchably coupled to drain/source bias and gate input voltages that are nominal, versus voltage and current conditions that elevate stress and cause temporary or permanent degradation, e.g., hot carrier injection (HCI), bias temperature instability (BTI, NBTI, PBTI), time dependent dielectric breakdown (TDDB). The MOS devices under test (preferably both PMOS and NMOS devices tested concurrently or in turn) are configured as current sources in the supply of power to a ring oscillator having cascaded inverter stages, thereby varying the oscillator frequency as a measure of the effects of stress on the devices under test, but without elevating the stress applied to the inverter stages.
    Type: Grant
    Filed: July 15, 2011
    Date of Patent: April 8, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fang-Shi Jordan Lai, Chih-Cheng Lu, Yung-Fu Lin, Hsu-Feng Hsueh, Chin-Hao Chang, Cheng Yen Weng, Manoj M. Mhala
  • Publication number: 20140060629
    Abstract: A solar cell includes a substrate, a first lightly-doped region, a second lightly-doped region, a second heavily-doped region, a first electrode and a second electrode. The first lightly-doped region having a first doping type is disposed in a first surface of the substrate. The second lightly-doped region and the second heavily-doped region having a second doping type different from the first doping type are disposed in a second surface of the substrate. The first electrode is disposed on the first surface of the substrate, and the second electrode is disposed on the second surface of the substrate.
    Type: Application
    Filed: August 8, 2013
    Publication date: March 6, 2014
    Applicant: AU Optronics Corp.
    Inventors: Liang-Hsing Lai, Chih-Cheng Lu, Jen-Chieh Chen, Zhen-Cheng Wu
  • Patent number: 8493259
    Abstract: A pipelined ADC includes a first, second, and third pairs of comparators. The first pair of comparators compare an input voltage to a first positive reference voltage and to a first negative reference voltage. The second pair of comparators compare the input voltage to a second positive reference voltage and to a second negative reference voltage. Each comparator of the first and second pairs of comparators outputs a digital signal to an encoder. A third pair of comparators compares the input voltage to a third positive reference voltage and to a third negative reference voltage, and a comparator compares the input voltage to ground. The comparator and each comparator of the third pair of comparators is configured to output respective digital signals to an encoder. A multiplying digital-to-analog converter outputs a voltage based on the input voltage, an output from the encoder, and an output of the random number generator.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: July 23, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fang-Shi Jordan Lai, Hsu-Feng Hsueh, Chin-Hao Chang, Cheng Yen Weng, Chih-Cheng Lu, Manoj M. Mhala, Yung-Fu Lin
  • Publication number: 20130141260
    Abstract: A pipelined ADC includes a first, second, and third pairs of comparators. The first pair of comparators compare an input voltage to a first positive reference voltage and to a first negative reference voltage. The second pair of comparators compare the input voltage to a second positive reference voltage and to a second negative reference voltage. Each comparator of the first and second pairs of comparators outputs a digital signal to an encoder. A third pair of comparators compares the input voltage to a third positive reference voltage and to a third negative reference voltage, and a comparator compares the input voltage to ground. The comparator and each comparator of the third pair of comparators is configured to output respective digital signals to an encoder. A multiplying digital-to-analog converter outputs a voltage based on the input voltage, an output from the encoder, and an output of the random number generator.
    Type: Application
    Filed: December 6, 2011
    Publication date: June 6, 2013
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fang-Shi Jordan LAI, Hsu-Feng HSUEH, Chin-Hao CHANG, Cheng Yen WENG, Chih-Cheng LU, Manoj M. MHALA, Yung-Fu LIN
  • Publication number: 20130015876
    Abstract: The reliability of an integrated circuit is inferred from the operational characteristics of sample metal oxide semiconductor (MOS) devices switchably coupled to drain/source bias and gate input voltages that are nominal, versus voltage and current conditions that elevate stress and cause temporary or permanent degradation, e.g., hot carrier injection (HCI), bias temperature instability (BTI, NBTI, PBTI), time dependent dielectric breakdown (TDDB). The MOS devices under test (preferably both PMOS and NMOS devices tested concurrently or in turn) are configured as current sources in the supply of power to a ring oscillator having cascaded inverter stages, thereby varying the oscillator frequency as a measure of the effects of stress on the devices under test, but without elevating the stress applied to the inverter stages.
    Type: Application
    Filed: July 15, 2011
    Publication date: January 17, 2013
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fang-Shi Jordan LAI, Chih-Cheng LU, Yung-Fu LIN, Hsu-Feng HSUEH, Chin-Hao CHANG, Cheng Yen WENG, Manoj M. MHALA
  • Patent number: 7872913
    Abstract: A nonvolatile analog memory has a floating gate point. The nonvolatile analog memory includes a capacitor, a first current source, a second current source and a current adjuster. The first current source controlled by a voltage value at the floating gate point and generates a first current. The second current source controlled by the voltage value at the floating gate point and generates a second current. The current adjuster receives the output voltage and a reference voltage and adjusts the first current and the second current based on the output voltage and the reference voltage. The current adjuster charges or discharges the capacitor to equalize the output voltage to the reference voltage.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: January 18, 2011
    Assignee: National Tsing Hua University
    Inventors: Cheng-Da Huang, Chih-Cheng Lu, Hsin Chen
  • Publication number: 20100188899
    Abstract: A nonvolatile analog memory has a floating gate point. The nonvolatile analog memory includes a capacitor. a first current source, a second current source and a current adjuster. The first current source controlled by a voltage value at the floating gate point and generates a first current. The second current source controlled by the voltage value at the floating gate point and generates a second current. The current adjuster receives the output voltage and a reference voltage and adjusts the first current and the second current based on the output voltage and the reference voltage. The current adjuster charges or discharges the capacitor to equalize the output voltage to the reference voltage.
    Type: Application
    Filed: April 12, 2010
    Publication date: July 29, 2010
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: Cheng-Da Huang, Chih-Cheng Lu, Hsin Chen
  • Patent number: 7746693
    Abstract: A nonvolatile analog memory has a floating gate point. The nonvolatile analog memory includes a first current source, a second current source, and a current adjuster. The first current source generates a first current, and the second current source generates a second current. The current adjuster turns on or turns off a current path of the second current according to a reference current and the first current. Furthermore, when the current path of the second current is turned on, the first current is adjusted according to the second current, such that the first current is equal to the reference current.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: June 29, 2010
    Assignee: National Tsing Hua University
    Inventors: Cheng-Da Huang, Chih-Cheng Lu, Hsin Chen