Patents by Inventor Chih-Chia Chen

Chih-Chia Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11973985
    Abstract: Various schemes pertaining to pre-encoding processing of a video stream with motion compensated temporal filtering (MCTF) are described. An apparatus determines a filtering interval for a received raw video stream having pictures in a temporal sequence. The apparatus selects from the pictures a plurality of target pictures based on the filtering interval, as well as a group of reference pictures for each target picture to perform pixel-based MCTF, which generates a corresponding filtered picture for each target picture. The apparatus subsequently transmits the filtered pictures as well as non-target pictures to an encoder for encoding the video stream. Subpictures of natural images and screen content images are separately processed by the apparatus.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: April 30, 2024
    Assignee: MediaTek Inc.
    Inventors: Chih-Yao Chiu, Chun-Chia Chen, Chih-Wei Hsu, Tzu-Der Chuang, Ching-Yeh Chen, Yu-Wen Huang
  • Patent number: 11950016
    Abstract: The present invention provides a control method of a receiver. The control method includes the steps of: when the receiver enters a sleep/standby mode, continually detecting an auxiliary signal from an auxiliary channel to generate a detection result; and if the detection result indicates that the auxiliary signal has a preamble or a specific pattern, generating a wake-up control signal to wake up the receiver before successfully receiving the auxiliary signal having a wake-up command.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: April 2, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chun-Chia Chen, Chih-Hung Pan, Chia-Chi Liu, Shun-Fang Liu, Meng-Kun Li, Chao-An Chen
  • Publication number: 20240105778
    Abstract: A semiconductor device includes a fin extending from a substrate. The fin has a source/drain region and a channel region. The channel region includes a first semiconductor layer and a second semiconductor layer disposed over the first semiconductor layer and vertically separated from the first semiconductor layer by a spacing area. A high-k dielectric layer at least partially wraps around the first semiconductor layer and the second semiconductor layer. A metal layer is formed along opposing sidewalls of the high-k dielectric layer. The metal layer includes a first material. The spacing area is free of the first material.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 28, 2024
    Inventors: I-Sheng CHEN, Yee-Chia YEO, Chih Chieh YEH, Cheng-Hsien WU
  • Patent number: 11942750
    Abstract: A laser inspection system is provided. A laser source emits a laser with a first spectrum and the laser is transmitted by a first optical fiber. A gain optical fiber doped with special ions is connected to the first optical fiber, and a light detector is provided around the gain optical fiber. When the laser with the first spectrum passes through the gain optical fiber, the gain optical fiber absorbs part of the energy level of the laser with the first spectrum, so that the laser with the first spectrum is converted to generate light with a second spectrum based on the frequency conversion phenomenon. The light detector detects the intensity of the light with the second spectrum, so that the power of the laser source can be obtained.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: March 26, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Chi Lee, Hsin-Chia Su, Shih-Ting Lin, Yu-Cheng Song, Fu-Shun Ho, Chih-Chun Chen
  • Patent number: 11943584
    Abstract: A micro-electro-mechanical system (MEMS) microphone is provided. The MEMS microphone includes a substrate, a diaphragm, a backplate and a first protrusion. The substrate has an opening portion. The diaphragm is disposed on one side of the substrate and extends across the opening portion of the substrate. The backplate includes a plurality of acoustic holes. The backplate is disposed on one side of the diaphragm. An air gap is formed between the backplate and the diaphragm. The first protrusion extends from the backplate towards the air gap.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: March 26, 2024
    Assignee: FORTEMEDIA, INC.
    Inventors: Chih-Yuan Chen, Jien-Ming Chen, Feng-Chia Hsu, Wen-Shan Lin, Nai-Hao Kuo
  • Publication number: 20240082163
    Abstract: A metformin tablet, a metformin tablet for relieving pain and reducing inflammation, and a manufacturing method thereof. The tablet for relieving pain and reducing inflammation comprises: a filler, a diluent, an excipient, a binder, a slow-release agent, a sweetener, and a medicinal powder; the excipient comprises: at least one of PVP, PEG, and polymer; the medicinal powder comprises: at least one of metformin and the excipient. The metformin tablet comprises: a hollow part, a thick colloidal layer formed on an outer side of the hollow part, and a powder colloidal layer formed on an outer side of the thick colloidal layer. The tablet for relieving pain and reducing inflammation comprises: a thick colloidal layer, a powder colloidal layer formed on an outer side of the thick colloidal layer, and a hollow part located at a center of the tablet and on an inner side of the thick colloidal layer.
    Type: Application
    Filed: September 8, 2022
    Publication date: March 14, 2024
    Inventors: CHAO-YI CHEN, CHIH-CHIA TSAI
  • Publication number: 20240088267
    Abstract: A semiconductor device comprises a fin structure disposed over a substrate; a gate structure disposed over part of the fin structure; a source/drain structure, which includes part of the fin structure not covered by the gate structure; an interlayer dielectric layer formed over the fin structure, the gate structure, and the source/drain structure; a contact hole formed in the interlayer dielectric layer; and a contact material disposed in the contact hole. The fin structure extends in a first direction and includes an upper layer, wherein a part of the upper layer is exposed from an isolation insulating layer. The gate structure extends in a second direction perpendicular to the first direction. The contact material includes a silicon phosphide layer and a metal layer.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Yi PENG, Chih Chieh YEH, Chih-Sheng CHANG, Hung-Li CHIANG, Hung-Ming CHEN, Yee-Chia YEO
  • Patent number: 11916031
    Abstract: A semiconductor device including a first die and a second die bonded to one another. The first die includes a first passivation layer over a substrate, and first bond pads in the first passivation layer. The second die includes a second passivation layer, which may be bonded to the first passivation layer, and second bond pads in the second passivation layer, which may be bonded to the first bond pads. The second bond pads include inner bond pads and outer bond pads. The outer bond pads may have a greater diameter than the inner bond pads as well as the first bond pads.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chia Hu, Ching-Pin Yuan, Sung-Feng Yeh, Sen-Bor Jan, Ming-Fa Chen
  • Publication number: 20230341257
    Abstract: A light sensor includes an optoelectronic device and a light guide element. The light guide element has a first light incident surface and a light exit surface, so as to allow an incident light to enter the light guide element from the first light incident surface and then exit to the optoelectronic device from the light exit surface; wherein at least one of the light incident surface and the light exit surface has a single curved surface.
    Type: Application
    Filed: June 6, 2022
    Publication date: October 26, 2023
    Applicant: Qisda Corporation
    Inventors: Che-Yi LAI, Chun-Ming SHEN, Chin-Kuei LEE, Chih-Chia CHEN
  • Publication number: 20220200589
    Abstract: A switch unit is configured to provide reverse current protection. The switch unit comprises an input terminal, an output terminal, a switch device, an operational amplifier, and a voltage difference circuit. The switch device is coupled between the input terminal and the output terminal. The voltage difference circuit receives the voltage of the output terminal for generating a first signal, where the first signal is greater than the voltage of the output terminal. The operational amplifier is coupled to the input terminal and the first signal for generating a second signal to control the switch device.
    Type: Application
    Filed: December 18, 2020
    Publication date: June 23, 2022
    Inventor: Chih-Chia Chen
  • Publication number: 20220188495
    Abstract: A physical parameter generator is configured to generate physical parameter information. The physical parameter generator comprises a physical parameter unit, a current source, and a function pin. The physical parameter unit is coupled to the current source for generating an output signal, where the output signal is related to the physical parameter information. The current source is coupled to the function pin for outputting the physical parameter information. When the function pin is in a floating state, the physical parameter generator may generate the physical parameter information by the function pin.
    Type: Application
    Filed: December 15, 2020
    Publication date: June 16, 2022
    Inventor: Chih-Chia Chen
  • Patent number: 10865268
    Abstract: A method for preparing a wear-resistant hybrid, includes (A) providing nano-silica with hydroxyl groups on its surface to react with an isocyanate-based silane to form silica with silyl groups; (B) subjecting the silica with silyl groups to a hydrolytic condensation reaction by using a sol-gel technology to form highly bifurcated Si-HB nanoparticles with hydroxyl groups; (C) providing a diisocyanate to react with a polyol to form a urethane pre-polymer; and (D) subjecting the Si-HB nanoparticles with hydroxyl groups to an addition reaction with the urethane pre-polymer and with a chain-extending reagent to form a hybrid of Si-polyurethane (PU/Si-HB), whereby a wear-resistant hybrid of Si-polyurethane is prepared.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: December 15, 2020
    Assignee: National Chung-Shan Institute of Science and Technology
    Inventors: Chang-Lun Lee, Bei-Huw Shen, Chih-Chia Chen, Wen-Yen Hsieh, Chin-Lung Chiang
  • Publication number: 20200377642
    Abstract: A method for preparing a wear-resistant hybrid, includes (A) providing nano-silica with hydroxyl groups on its surface to react with an isocyanate-based silane to form silica with silyl groups; (B) subjecting the silica with silyl groups to a hydrolytic condensation reaction by using a sol-gel technology to form highly bifurcated Si-HB nanoparticles with hydroxyl groups; (C) providing a diisocyanate to react with a polyol to form a urethane pre-polymer; and (D) subjecting the Si-HB nanoparticles with hydroxyl groups to an addition reaction with the urethane pre-polymer and with a chain-extending reagent to form a hybrid of Si-polyurethane (PU/Si-HB), whereby a wear-resistant hybrid of Si-polyurethane is prepared.
    Type: Application
    Filed: October 14, 2019
    Publication date: December 3, 2020
    Inventors: Chang-Lun Lee, Bei-Huw Shen, Chih-Chia Chen, Wen-Yen Hsieh, Chin-Lung Chiang
  • Patent number: 10691004
    Abstract: A projector includes a casing, a lens, a bracket, a support member, a first spacer and a first fixing member. The lens is connected to the casing. The bracket is connected to the casing and has a through hole formed thereon. The support member is inserted into the through hole and abuts against the lens. The first spacer is disposed on the support member and has a first curved surface and the first curved surface faces the through hole. The first fixing member is disposed on the support member and pushes the first spacer towards the bracket, such that the first curved surface contacts a periphery of the through hole.
    Type: Grant
    Filed: August 2, 2018
    Date of Patent: June 23, 2020
    Assignee: Qisda Corporation
    Inventors: Chih-Chia Chen, Chun-Ming Shen
  • Publication number: 20190391468
    Abstract: A projector includes a casing, a lens, a bracket, a support member, a first spacer and a first fixing member. The lens is connected to the casing. The bracket is connected to the casing and has a through hole formed thereon. The support member is inserted into the through hole and abuts against the lens. The first spacer is disposed on the support member and has a first curved surface and the first curved surface faces the through hole. The first fixing member is disposed on the support member and pushes the first spacer towards the bracket, such that the first curved surface contacts a periphery of the through hole.
    Type: Application
    Filed: August 2, 2018
    Publication date: December 26, 2019
    Inventors: Chih-Chia Chen, Chun-Ming Shen
  • Patent number: 9958895
    Abstract: Structure and methods for a compensated bandgap reference circuit. A first integrated circuit die having a first bandgap reference circuit with a non-zero temperature coefficient; and having a first output reference signal is provided, a second integrated circuit die having a second bandgap reference circuit with a non-zero temperature coefficient that is of opposite polarity from the temperature coefficient of the first bandgap reference circuit, and having a second output reference signal is provided; an adder circuit disposed on at least one of the first and second integrated circuit dies combines the first and second output reference signals, and outputs a combined reference signal; and connectors for connecting the first and second output signals to the adder circuit are provided. Methods are disclosed for pairing integrated circuit dies with bandgap reference circuits and coupling the dies to form temperature compensated signals.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: May 1, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chia Chen, Mark Shane Peng
  • Patent number: 9811664
    Abstract: Unwanted web contents are detected in an endpoint computer. The endpoint computer receives a web page from a website. The reputation of the website is determined and the web page is scanned for malicious codes to protect the endpoint computer from web threats. To further protect the endpoint computer from web threats including mutating unwanted web contents, page structure traits of the web page are generated and compared to page structure traits of other web pages detected to contain unwanted web contents.
    Type: Grant
    Filed: August 15, 2011
    Date of Patent: November 7, 2017
    Assignee: Trend Micro Incorporated
    Inventors: Cheng-Hsin Hsu, Peng-Shih Pu, Chih-Chia Chen, Shr-An Su
  • Patent number: 9671457
    Abstract: A method comprises connecting a testing setup having a plurality of probes to a device under test having a plurality of vias, wherein a probe is aligned with a corresponding via of the device under test and conducting a plurality of via electrical characteristic tests through a conductive path comprising the vias, the probes and a plurality of conductive devices, each of which connects two adjacent probes, wherein the conductive devices are in the testing setup.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: June 6, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mill-Jer Wang, Chih-Chia Chen, Hung-Chih Lin, Ching-Nen Peng, Hao Chen
  • Patent number: 9557354
    Abstract: A circuit including a first switch receiving an input reference voltage, a second switch receiving an input testing voltage, the first switch and the second switch are electrically connected in parallel. The circuit further includes a first capacitor electrically connected in series with the first switch and the second switch. The circuit further includes a feedback stage comprising a feedback inverter electrically connected in parallel with a feedback switch, where the feedback stage is electrically connected in series with the first capacitor. The circuit further includes a first inverter electrically connected in series to the feedback stage, and a third switch electrically connected in series with the first inverter. The circuit further includes a second inverter electrically connected in parallel to a third inverter, the second inverter and the third inverter are electrically connected in series to the third switch, and the third inverter outputs a first output signal.
    Type: Grant
    Filed: January 31, 2012
    Date of Patent: January 31, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Chia Chen, Kuan-Yu Lin, Chin-Chou Liu
  • Publication number: 20150087089
    Abstract: A method comprises connecting a testing setup having a plurality of probes to a device under test having a plurality of vias, wherein a probe is aligned with a corresponding via of the device under test and conducting a plurality of via electrical characteristic tests through a conductive path comprising the vias, the probes and a plurality of conductive devices, each of which connects two adjacent probes, wherein the conductive devices are in the testing setup.
    Type: Application
    Filed: December 5, 2014
    Publication date: March 26, 2015
    Inventors: Mill-Jer Wang, Chih-Chia Chen, Hung-Chih Lin, Ching-Nen Peng, Hao Chen