Patents by Inventor Chih-Chiang Wang
Chih-Chiang Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11955507Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.Type: GrantFiled: September 9, 2021Date of Patent: April 9, 2024Assignee: AU OPTRONICS CORPORATIONInventors: Hsin-Hung Li, Wei-Syun Wang, Chih-Chiang Chen, Yu-Cheng Shih, Cheng-Chan Wang, Chia-Hsin Chung, Ming-Jui Wang, Sheng-Ming Huang
-
Patent number: 11949270Abstract: A battery module for monitoring and suppressing battery swelling and interacting with a charging device includes a battery cell disposed in a nonconductive housing, a conductive label affixed to the nonconductive housing, a switch, and a controller. The battery cell is charged via a supply voltage from a charging device. The switch is coupled between the battery cell and the conductive label. The controller detects a resistance variation value ?R of the conductive label as result of swelling of the nonconductive housing, and generates a corresponding control voltage. As the resistance of the conductive label increases, the supply voltage may be adjusted downward according to the control voltage. If the resistance variation value ?R conductive label is greater than or equal to a predetermined threshold, the controller closes the switch, and the battery cell may then fully discharge through the conductive label.Type: GrantFiled: October 18, 2021Date of Patent: April 2, 2024Assignee: ACER INCORPORATEDInventors: Shuo-Jung Chou, Chuan-Jung Wang, Chih-Chiang Chen
-
Patent number: 11876331Abstract: A wire-clamping connector is provided. The wire-clamping connector includes a housing and a contact element. The housing includes a through hole. The contact element is disposed in the housing, and includes a bottom plate structure and an elastic sheet body. The bottom plate structure is disposed opposite to a top wall of the housing, and includes a protruding portion that has a contact surface. A terminal portion of the elastic sheet body is fixed to the top wall, and the elastic sheet body has an acute-angular structure configured to be adjacent to the contact surface. An insertion interval is defined between the acute-angular structure and the contact surface. A wire core of a wire inserted in the through hole enters the insertion interval and is clamped together by the acute-angular structure and the contact surface, and an elastic restoring force is generated by the pressed elastic sheet body.Type: GrantFiled: November 8, 2021Date of Patent: January 16, 2024Assignee: CviLux CorporationInventors: Wen-Hsin Huang, Chih-Chiang Wang
-
Publication number: 20230387870Abstract: A hybrid class-D amplifier is provided. The hybrid class-D amplifier includes a digital-to-analog conversion (DAC) input stage circuit, a loop filter circuit electrically coupled to the DAC input stage circuit, a quantizer circuit electrically coupled to the loop filter circuit, an output stage circuit electrically coupled to the quantizer circuit, and a feedback circuit electrically coupled between the output stage circuit and the loop filter circuit. The DAC input stage circuit converts a digital signal into an analog signal. The loop filter circuit generates a filtered signal according to the analog signal and a feedback signal. The quantizer circuit performs a quantization operation on the filtered signal to generate a quantized signal. The output stage circuit performs power amplification on the quantized signal to generate an output signal. The feedback circuit generates the feedback signal according to the output signal.Type: ApplicationFiled: May 23, 2023Publication date: November 30, 2023Applicant: Realtek Semiconductor Corp.Inventor: Chih-Chiang Wang
-
Publication number: 20230327610Abstract: A signal amplifying circuit includes an amplifier and a common mode feedback circuit. The amplifier generates first and second outputs. The common mode feedback circuit receives the first and second outputs, and controls an output common mode voltage of the first and second outputs to a first reference voltage. The common mode feedback circuit includes an output common mode voltage detection circuit, a pull-up circuit and a pull-down circuit. The output common mode voltage detection circuit generates first and second control signals according to the output common mode voltage. The pull-up circuit with a first conduction degree controlled by the first control signal controls the output common mode voltage to be positively correlated with the first conduction degree. The pull-down circuit with a second conduction degree controlled by the second control signal controls the output common mode voltage to be negatively correlated with the second conduction degree.Type: ApplicationFiled: March 21, 2023Publication date: October 12, 2023Inventor: Chih-Chiang WANG
-
Publication number: 20230299046Abstract: An electric package device is provided, including a first chip and a second chip. The first chip includes a first conductive pad. The second chip includes a second conductive pad. The second conductive pad couples to the first conductive pad through a connection wire. In some embodiments, the first chip includes a first signal control circuit that receives, in response to a selection signal, one of multiple input signals as a first signal, filters the first signal, and outputs the filtered first signal, as a second signal, from the first conductive pad to the second conductive pad.Type: ApplicationFiled: February 20, 2023Publication date: September 21, 2023Inventor: Chih-Chiang WANG
-
Publication number: 20220344841Abstract: A wire-clamping connector is provided. The wire-clamping connector includes a housing and a contact element. The housing includes a through hole. The contact element is disposed in the housing, and includes a bottom plate structure and an elastic sheet body. The bottom plate structure is disposed opposite to a top wall of the housing, and includes a protruding portion that has a contact surface. A terminal portion of the elastic sheet body is fixed to the top wall, and the elastic sheet body has an acute-angular structure configured to be adjacent to the contact surface. An insertion interval is defined between the acute-angular structure and the contact surface. A wire core of a wire inserted in the through hole enters the insertion interval and is clamped together by the acute-angular structure and the contact surface, and an elastic restoring force is generated by the pressed elastic sheet body.Type: ApplicationFiled: November 8, 2021Publication date: October 27, 2022Inventors: WEN-HSIN HUANG, CHIH-CHIANG WANG
-
Patent number: 11463100Abstract: A digital-to-analog converter and a digital-to-analog conversion method thereof are provided. The digital-to-analog conversion method includes: converting a digital data signal into an analog data signal in a first cycle according to a clock signal, resetting the analog data signal in a second cycle according to the clock signal and a reset signal corresponding to a first reset level, and compensating for a voltage level of the reset analog data signal in the second cycle according to a second reset level, so that the voltage level of the reset analog data signal is the second reset level. The second reset level is higher or lower than the first reset level.Type: GrantFiled: August 19, 2021Date of Patent: October 4, 2022Assignee: REALTEK SEMICONDUCTOR CORP.Inventor: Chih-Chiang Wang
-
Publication number: 20220311450Abstract: A digital-to-analog converter and a digital-to-analog conversion method thereof are provided. The digital-to-analog conversion method includes: converting a digital data signal into an analog data signal in a first cycle according to a clock signal, resetting the analog data signal in a second cycle according to the clock signal and a reset signal corresponding to a first reset level, and compensating for a voltage level of the reset analog data signal in the second cycle according to a second reset level, so that the voltage level of the reset analog data signal is the second reset level. The second reset level is higher or lower than the first reset level.Type: ApplicationFiled: August 19, 2021Publication date: September 29, 2022Applicant: REALTEK SEMICONDUCTOR CORP.Inventor: Chih-Chiang Wang
-
Patent number: 10998916Abstract: A sigma-delta analog-to-digital converter includes: a subtractor for subtracting a feedback signal from an analog input signal; a loop filter for processing the output signal from the subtractor to generate a filtered signal; a signal comparing circuit for selectively operating in an offset detection mode or a signal comparison mode, wherein the signal comparing circuit generates an error signal irrelevant to the relative magnitude between the filtered signal and a reference signal in the offset detection mode, and generates a comparison signal corresponding to the relative magnitude between the filtered signal and the reference signal in the signal comparison mode; an offset calibration control circuit for calibrating the offset of the signal comparing circuit and for controlling the signal comparing circuit to alternately switch between the offset detection mode and the signal comparison mode; and a digital-to-analog converter for generating the feedback signal according to the comparison signal.Type: GrantFiled: January 14, 2020Date of Patent: May 4, 2021Assignee: REALTEK SEMICONDUCTOR CORP.Inventor: Chih-Chiang Wang
-
Patent number: 10778240Abstract: A device and a method for digital to analog conversion are provided. The device contains a signal generation circuit and a conversion circuit. The signal generation circuit generates two reset signals which are a first reset signal and a second reset signal. The two reset signals are mutually inverted digital signals and contain the same number of bits. The conversion circuit converts a digital data signal into an analog data signal when a first clock signal is at a first level, and generates the analog data signal at two reset levels respectively according to the two reset signals when the first clock signal is at a second level.Type: GrantFiled: November 22, 2019Date of Patent: September 15, 2020Assignee: REALTEK SEMICONDUCTOR CORP.Inventor: Chih-Chiang Wang
-
Publication number: 20200235749Abstract: A sigma-delta analog-to-digital converter includes: a subtractor for subtracting a feedback signal from an analog input signal; a loop filter for processing the output signal from the subtractor to generate a filtered signal; a signal comparing circuit for selectively operating in an offset detection mode or a signal comparison mode, wherein the signal comparing circuit generates an error signal irrelevant to the relative magnitude between the filtered signal and a reference signal in the offset detection mode, and generates a comparison signal corresponding to the relative magnitude between the filtered signal and the reference signal in the signal comparison mode; an offset calibration control circuit for calibrating the offset of the signal comparing circuit and for controlling the signal comparing circuit to alternately switch between the offset detection mode and the signal comparison mode; and a digital-to-analog converter for generating the feedback signal according to the comparison signal.Type: ApplicationFiled: January 14, 2020Publication date: July 23, 2020Applicant: REALTEK SEMICONDUCTOR CORP.Inventor: Chih-Chiang WANG
-
Patent number: 10084212Abstract: A battery module and a battery safety method are provided herein. The battery module includes at least one connection unit and a determining unit. The at least one connection unit is configured to be detachably and electrically connected to an electronic device. The determining unit is configured to determine whether the battery module is detached from the electronic device through the at least one connection unit. When determining that the battery module is detached from the electronic, the determining unit controls the battery module to enter a shipping mode.Type: GrantFiled: October 22, 2015Date of Patent: September 25, 2018Assignee: QUANTA COMPUTER INC.Inventors: Shun-Yung Liao, Yu-An Huang, Li-Sheng Chiou, Chih-Chiang Wang, Yu-Ti Lin
-
Publication number: 20170047617Abstract: A battery module and a battery safety method are provided herein. The battery module includes at least one connection unit and a determining unit. The at least one connection unit is configured to be detachably and electrically connected to an electronic device. The determining unit is configured to determine whether the battery module is detached from the electronic device through the at least one connection unit. When determining that the battery module is detached from the electronic, the determining unit controls the battery module to enter a shipping mode.Type: ApplicationFiled: October 22, 2015Publication date: February 16, 2017Inventors: Shun-Yung Liao, Yu-An Huang, Li-Sheng Chiou, Chih-Chiang Wang, Yu-Ti Lin
-
Publication number: 20130322026Abstract: An electronic device of the invention includes a base and a touch-vibration module. The base has an opening. The touch-vibration module includes a supporting bracket, a mass balancing element, a vibrating unit and a touch unit. The supporting bracket is connected to the base at the opening of the base. The mass balancing element is disposed at the supporting bracket. The vibrating unit is disposed at the supporting bracket. The touch unit is disposed at the supporting bracket and the vibrating unit is located between the supporting bracket and the touch unit.Type: ApplicationFiled: June 4, 2013Publication date: December 5, 2013Applicant: COMPAL ELECTRONICS, INC.Inventors: Yi-Chieh Huang, Chih-Chiang Wang, Ming-Wang Lin, Hui-Lian Chang
-
Publication number: 20130163188Abstract: An electronic device including a first body, a driving component, and a connector module is provided. The first body includes a main portion and an edge portion, wherein the thickness of the edge portion is smaller than the thickness of the main portion, and the edge portion has an opening. The driving component and the connector module are slidably disposed in the first body and so that the driving component drives the connector module to move from the main portion to the edge portion and the connector module is exposed from the opening of the edge portion.Type: ApplicationFiled: December 19, 2012Publication date: June 27, 2013Inventors: Ping-Huei Lee, Chih-Chiang Wang, Pan-Jen Chen, Tsung-Han Lin, Ming-Wang Lin, Hui-Lian Chang, Yu-Hsuan Ku
-
Publication number: 20130139355Abstract: A hinge mechanism suitable for a foldable electronic device has a first body, a second body and a hinging-body. The hinge mechanism includes a first cradle, a second cradle, a pair of pivoting-shafts, a pair of position-limiting elements, a set of gears and a positioning element. The positioning-element is fixed to the hinging-body and structurally independent from the position-limiting elements, pivoted to the pivoting-shafts so as to be detachably assembled with the position-limiting elements. The first body rotates relatively to the hinging-body through the first cradle rotates the pivoting-shaft fixed to the first cradle relatively to the positioning element so as to rotate the set of gears, make the second cradle rotate the pivoting-shaft fixed to the second cradle relatively to the positioning-element and bring the second body for rotation relatively to the hinging-body. Additionally, a foldable electronic device is also provided.Type: ApplicationFiled: August 17, 2012Publication date: June 6, 2013Applicant: COMPAL ELECTRONICS, INC.Inventors: Jui-Yuan Lee, Hui-Lian Chang, Ming-Wang Lin, Chih-Chiang Wang, Hsin-Hsiang Shao, Chun-Wei Chang
-
Patent number: 8354718Abstract: An apparatus comprising a substrate of first dopant type and first dopant concentration; pocket regions in the substrate and having the first dopant type and a second dopant concentration greater than the first dopant concentration; a gate stack over the substrate and laterally between the pocket regions; first and second source/drain regions on opposing sides of the gate stack and vertically between the gate stack and the pocket regions, the first and second source/drain regions having a second dopant type opposite the first dopant type and a third dopant concentration; and third and fourth source/drain regions having the second dopant type and a fourth dopant concentration that is greater than the third dopant concentration, wherein the pocket regions are between the third and fourth source/drain regions, and the third and fourth source/drain regions are vertically between the first and second source/drain regions and a bulk portion of the substrate.Type: GrantFiled: May 22, 2007Date of Patent: January 15, 2013Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Chiang Wang, Yi-Ming Sheu, Ying-Shiou Lin
-
Patent number: 8273633Abstract: A method of enhancing dopant activation without suffering additional dopant diffusion, includes forming shallow and lightly-doped source/drain extension regions in a semiconductor substrate, performing a first anneal process on the source/drain extension regions, forming deep and heavily-doped source/drain regions in the substrate adjacent to the source/drain extension regions, and performing a second anneal process on source/drain regions. The first anneal process is a flash anneal process performed for a time of between about 1 millisecond and 3 milliseconds, and the second anneal process is a rapid thermal anneal process performed for a time of between about 1 second and 30 seconds.Type: GrantFiled: March 26, 2007Date of Patent: September 25, 2012Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Keh-Chiang Kuo, Chien-Hao Chen, Chun-Feng Nieh, Li-Ping Huang, Hsun Chang, Li-Ting Wang, Chih-Chiang Wang, Tze-Liang Lee
-
Publication number: 20100179098Abstract: A pharmaceutical composition for preventing and treating cancer comprising furost-5-ene-3,22,26-triol glycoside, which can be used to prevent and treat cancer by promoting apoptosis.Type: ApplicationFiled: September 7, 2006Publication date: July 15, 2010Applicant: HENKAN PHARMACEUTICAL CO., LTD.Inventors: Shoei-Sheng Lee, Ming-Yang Lai, Chien-Kuang Chen, Chih-Chiang Wang