Patents by Inventor Chih-Chieh Cheng
Chih-Chieh Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11385267Abstract: A power detector with wide dynamic range. The power detector includes a linear detector, followed by a voltage-to-current-to-voltage converter, which is then followed by an amplification stage. The current-to-voltage conversion in the converter is performed logarithmically. The power detector generates a desired linear-in-dB response at the output. In this power detector, the distribution of gain along the signal path is optimized in order to preserve linearity, and to minimize the impact of offset voltage inherently present in electronic blocks, which would corrupt the output voltage. Further, the topologies in the sub-blocks are designed to provide wide dynamic range, and to mitigate error sources. Moreover, the temperature sensitivity is designed out by either minimizing temperature variation of an individual block such as the v-i-v detector, or using two sub-blocks in tandem to provide overall temperature compensation.Type: GrantFiled: February 14, 2019Date of Patent: July 12, 2022Assignee: pSemi CorporationInventors: Damian Costa, Chih-Chieh Cheng, Christopher C. Murphy, Tero Tapio Ranta
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Publication number: 20220120812Abstract: The present invention discloses an isolation circuit having test mechanism. An isolation circuit component performs signal transmission when a signal that a control terminal receives has an enabling state and performs signal isolation when the signal has a disabling state. The test circuit includes a multiplexer and a control circuit. Under a shifting operation state in a test mode, the control circuit controls the multiplexer to select an operation input terminal to receive and output an isolation control signal having the enabling state to the control input terminal. Under a capturing operation state in the test mode, the control circuit controls the multiplexer to select a test input terminal to receive and output the test signal to the control input terminal. The control circuit further determines whether the isolation circuit performs signal transmission or signal isolation according to the signals at the data input terminal and the data output terminal.Type: ApplicationFiled: October 14, 2021Publication date: April 21, 2022Inventors: KUO-KAI LIU, CHIH-CHIEH CHENG, PEI-YING HSUEH
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Patent number: 11289132Abstract: The present invention discloses an operation method of memory device, applied to a memory device including a number of word lines and one or more functional lines. The operation method includes: receiving a read command for a target memory cell of the memory device; and outputting a signal having a first waveform to a target word line corresponding to the target memory cell to be read among a plurality of the word lines of the memory device, output a signal having a second waveform to the one or more functional lines of the memory device, and output a signal having a third waveform to the word lines other than the target word line. A falling time of the third waveform is longer than a falling time of the first waveform.Type: GrantFiled: February 5, 2021Date of Patent: March 29, 2022Assignee: MACRONIX INTERNATIONAL CO., LTD.Inventors: Yu-Hung Huang, Cheng-Hsien Cheng, Chih-Chieh Cheng, Yin-Jen Chen
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Patent number: 11251765Abstract: A flexible multi-path RF adaptive tuning network switch architecture that counteracts impedance mismatch conditions arising from various combinations of coupled RF band filters, particularly in a Carrier Aggregation-based (CA) radio system. In one version, a digitally-controlled tunable matching network is coupled to a multi-path RF switch in order to provide adaptive impedance matching for various combinations of RF band filters. Optionally, some or all RF band filters include an associated digitally-controlled filter pre-match network to further improve impedance matching. In a second version, some or all RF band filters coupled to a multi-path RF switch include a digitally-controlled phase matching network to provide necessary per-band impedance matching. Optionally, a digitally-controlled tunable matching network may be included on the common port of the multi-path RF switch to provide additional impedance matching capability.Type: GrantFiled: April 17, 2020Date of Patent: February 15, 2022Assignee: pSemi CorporationInventors: Emre Ayranci, Miles Sanner, Ke Li, James Francis McElwee, Tero Tapio Ranta, Kevin Roberts, Chih-Chieh Cheng
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Patent number: 11177000Abstract: An operating method of a non-volatile memory includes: generating a first programming pulse with a first time period to a target memory cell in a memory array; reading and verifying whether a threshold voltage of the target memory cell reaches a target voltage level; and generating a second programming pulse with a second time period to the target memory cell when the threshold voltage of the target memory cell does not reach the target voltage level, wherein the second time period is longer than the first time period.Type: GrantFiled: June 19, 2019Date of Patent: November 16, 2021Assignee: MACRONIX INTERNATIONAL CO., LTD.Inventors: Guan-Wei Wu, Yao-Wen Chang, Chih-Chieh Cheng, I-Chen Yang
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Publication number: 20210336588Abstract: An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.Type: ApplicationFiled: April 28, 2021Publication date: October 28, 2021Inventors: Tero Tapio Ranta, Chih-Chieh Cheng, Kevin Roberts
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Patent number: 11037632Abstract: Provided is an erase method for a multi-tier three-dimension (3D) memory including a plurality of tiers and a plurality of blocks, each of the tiers including a plurality of word lines. The erase method includes: in erasing a selected block among the plurality of blocks, in a current iteration, selecting at least one tier among the plurality of tiers to be erased by a first erase voltage; determining whether the at least one tier passes erase verification; and if the at least one tier passes erase verification, in a next iteration, inhibiting the at least tier which already passes erase verification from erase.Type: GrantFiled: March 25, 2020Date of Patent: June 15, 2021Assignee: MACRONIX INTERNATIONAL CO., LTD.Inventors: Shaw-Hung Ku, Chih-Chieh Cheng, Cheng-Hsien Cheng, Yu-Hung Huang, Atsuhiro Suzuki, Wen-Jer Tsai
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Patent number: 11005432Abstract: An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.Type: GrantFiled: January 24, 2020Date of Patent: May 11, 2021Assignee: pSemi CorporationInventors: Tero Tapio Ranta, Chih-Chieh Cheng, Kevin Roberts
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Publication number: 20200381053Abstract: An operating method of a non-volatile memory includes: generating a first programming pulse with a first time period to a target memory cell in a memory array; reading and verifying whether a threshold voltage of the target memory cell reaches a target voltage level; and generating a second programming pulse with a second time period to the target memory cell when the threshold voltage of the target memory cell does not reach the target voltage level, wherein the second time period is longer than the first time period.Type: ApplicationFiled: June 19, 2019Publication date: December 3, 2020Inventors: Guan-Wei WU, Yao-Wen CHANG, Chih-Chieh CHENG, I-Chen YANG
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Publication number: 20200321935Abstract: A flexible multi-path RF adaptive tuning network switch architecture that counteracts impedance mismatch conditions arising from various combinations of coupled RF band filters, particularly in a Carrier Aggregation-based (CA) radio system. In one version, a digitally-controlled tunable matching network is coupled to a multi-path RF switch in order to provide adaptive impedance matching for various combinations of RF band filters. Optionally, some or all RF band filters include an associated digitally-controlled filter pre-match network to further improve impedance matching. In a second version, some or all RF band filters coupled to a multi-path RF switch include a digitally-controlled phase matching network to provide necessary per-band impedance matching. Optionally, a digitally-controlled tunable matching network may be included on the common port of the multi-path RF switch to provide additional impedance matching capability.Type: ApplicationFiled: April 17, 2020Publication date: October 8, 2020Inventors: Emre Ayranci, Miles Sanner, Ke Li, James Francis McElwee, Tero Tapio Ranta, Kevin Roberts, Chih-Chieh Cheng
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Publication number: 20200264217Abstract: A power detector with wide dynamic range. The power detector includes a linear detector, followed by a voltage-to-current-to-voltage converter, which is then followed by an amplification stage. The current-to-voltage conversion in the converter is performed logarithmically. The power detector generates a desired linear-in-dB response at the output. In this power detector, the distribution of gain along the signal path is optimized in order to preserve linearity, and to minimize the impact of offset voltage inherently present in electronic blocks, which would corrupt the output voltage. Further, the topologies in the sub-blocks are designed to provide wide dynamic range, and to mitigate error sources. Moreover, the temperature sensitivity is designed out by either minimizing temperature variation of an individual block such as the v-i-v detector, or using two sub-blocks in tandem to provide overall temperature compensation.Type: ApplicationFiled: February 14, 2019Publication date: August 20, 2020Inventors: Damian Costa, Chih-Chieh Cheng, Christopher C. Murphy, Tero Tapio Ranta
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Publication number: 20200235709Abstract: An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.Type: ApplicationFiled: January 24, 2020Publication date: July 23, 2020Inventors: Tero Tapio Ranta, Chih-Chieh Cheng, Kevin Roberts
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Patent number: 10700658Abstract: A flexible multi-path RF adaptive tuning network switch architecture that counteracts impedance mismatch conditions arising from various combinations of coupled RF band filters, particularly in a Carrier Aggregation-based (CA) radio system. In one version, a digitally-controlled tunable matching network is coupled to a multi-path RF switch in order to provide adaptive impedance matching for various combinations of RF band filters. Optionally, some or all RF band filters include an associated digitally-controlled filter pre-match network to further improve impedance matching. In a second version, some or all RF band filters coupled to a multi-path RF switch include a digitally-controlled phase matching network to provide necessary per-band impedance matching. Optionally, a digitally-controlled tunable matching network may be included on the common port of the multi-path RF switch to provide additional impedance matching capability.Type: GrantFiled: July 6, 2018Date of Patent: June 30, 2020Assignee: pSemi CorporationInventors: Emre Ayranci, Miles Sanner, Ke Li, James Francis McElwee, Tero Tapio Ranta, Kevin Roberts, Chih-Chieh Cheng
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Patent number: 10587229Abstract: Methods and devices for providing a feedback network in a multi-stage power amplifier are described. According to one aspect, a final amplifier of the multi-stage power amplifier is a cascode amplifier. The feedback network is placed between an output of the final amplifier and an output of a driver amplifier. The feedback network can decrease a mismatch between the output impedance of the final amplifier and a load presented to the final amplifier. In addition, the feedback network can change a load presented to the driver amplifier and thereby allow the transfer functions of each stage to be tuned so that the overall transfer function of the multi-stage amplifier becomes more linear.Type: GrantFiled: December 11, 2018Date of Patent: March 10, 2020Assignee: pSemi CorporationInventors: Damian Costa, Chih-Chieh Cheng, Tero Tapio Ranta
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Patent number: 10581387Abstract: An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.Type: GrantFiled: July 6, 2018Date of Patent: March 3, 2020Assignee: pSemi CorporationInventors: Tero Tapio Ranta, Chih-Chieh Cheng, Kevin Roberts
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Patent number: 10439564Abstract: Methods and devices for improving AM-AM and AM-PM performance of an RF amplifier are presented. According to one aspect, input and output harmonic terminations coupled to the input and output of the amplifier are tuned at frequencies near to, but different than, a second harmonic frequency of an RF signal to be amplified. Improved AM-AM and AM-PM performance is obtained when i) the input harmonic termination is tuned at a frequency that is below the second harmonic frequency and the output harmonic termination is tuned at a frequency that is above the second harmonic frequency, and ii) the input harmonic termination is tuned at a frequency that is farther away from the second harmonic frequency than the frequency used for tuning of the output harmonic termination.Type: GrantFiled: March 30, 2018Date of Patent: October 8, 2019Assignee: pSemi CorporationInventors: Damian Costa, Chih-Chieh Cheng, Richard B. Whatley, Tero Tapio Ranta
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Publication number: 20190305733Abstract: Methods and devices for improving AM-AM and AM-PM performance of an RF amplifier are presented. According to one aspect, input and output harmonic terminations coupled to the input and output of the amplifier are tuned at frequencies near to, but different than, a second harmonic frequency of an RF signal to be amplified. Improved AM-AM and AM-PM performance is obtained when i) the input harmonic termination is tuned at a frequency that is below the second harmonic frequency and the output harmonic termination is tuned at a frequency that is above the second harmonic frequency, and ii) the input harmonic termination is tuned at a frequency that is farther away from the second harmonic frequency than the frequency used for tuning of the output harmonic termination.Type: ApplicationFiled: March 30, 2018Publication date: October 3, 2019Inventors: Damian Costa, Chih-Chieh Cheng, Richard B. Whatley, Tero Tapio Ranta
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Patent number: 10340876Abstract: A high performance integrated tunable impedance matching network with coupled merged inductors. Embodiments include a combination of merged multiport constructively coupled spiral inductors and tunable capacitors configured to reduce insertion losses, circuit size, and optimization time while maintaining a high Q factor for the coupled spiral inductors. Some embodiments integrate one or more filter circuits with a tunable impedance matching network, useful in conjunction with such applications as radio frequency power amplifiers.Type: GrantFiled: February 19, 2016Date of Patent: July 2, 2019Assignee: pSemi CorporationInventors: Chih-Chieh Cheng, Tero Tapio Ranta, Richard Bryon Whatley, Vikram Sekar
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Publication number: 20190140602Abstract: An improved architecture for a radio frequency (RF) power amplifier, impedance matching network, and selector switch. One aspect of embodiments of the invention is splitting the functionality of a final stage impedance matching network (IMN) into two parts, comprising a base set of off-chip IMN components and an on-chip IMN tuning component. The on-chip IMN tuning component may be a digitally tunable capacitor (DTC). In one embodiment, an integrated circuit having a power amplifier, an on-chip IMN tuner, and a selector switch is configured to be coupled to an off-chip set of IMN components. In another embodiment, an integrated circuit having an on-chip IMN tuner and a selector switch is configured to be coupled through an off-chip set of IMN components to a separate integrated circuit having an RF power amplifier.Type: ApplicationFiled: July 6, 2018Publication date: May 9, 2019Inventors: Tero Tapio Ranta, Chih-Chieh Cheng, Kevin Roberts
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Patent number: 10284151Abstract: A receiver front end capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” input stage and a “common gate” output stage can be turned on or off using the gate of the output stage. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input stage of each cascode. Further switches used for switching degeneration inductors, gate/sources caps and gate to ground caps for each legs can be used to further improve the matching performance of the invention.Type: GrantFiled: February 13, 2018Date of Patent: May 7, 2019Assignee: pSemi CorporationInventors: Hossein Noori, Chih-Chieh Cheng