Patents by Inventor Chih-Chieh Fu
Chih-Chieh Fu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240098908Abstract: A preparation method for a circuit board connection structure includes: providing a circuit board module that including a first outer wiring layer, and the first outer wiring layer including solder pads; forming a first pyrolytic adhesive layer and an inner wiring layer on the first outer wiring layer; forming a second pyrolytic adhesive layer and a second copper foil layer on the inner wiring layer; defining a plurality of through holes each configured to expose one of the solder pads; forming a copper plating layer on the second copper foil layer; etching the copper plating layer and the second copper foil layer to form a second outer wiring layer, thereby obtaining an intermediate body; heating and washing the intermediate body to remove the first pyrolytic adhesive layer and the second pyrolytic adhesive layer. The present application also provides a circuit board connection structure.Type: ApplicationFiled: August 14, 2023Publication date: March 21, 2024Applicants: HongQiSheng Precision Electronics (QinHuangDao) Co.,Ltd., Avary Holding (Shenzhen) Co., Limited.Inventors: CHIH-CHIEH FU, YUAN-YU LIN, QUAN YUAN
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Publication number: 20240006748Abstract: The present application provides a circuit board and a manufacturing method thereof. The manufacturing method includes: providing a stacked board; the stacked board includes a third conducting circuit, a second substrate, a first conducting circuit, a first substrate, and a second conducting circuit, which are stacked disposed in that order; defining several through holes on a surface of the stacked board along a stacked direction of the stacked board; and manufacturing antenna conductors in the through holes. The antenna conductors are disposed in the through holes on a surface of the stacked board, the antenna conductors on different layers are connected to corresponding conducting circuits, some of the antenna conductors are directly connected with the conducting circuit. A loss of signals while transmitting is reduced, and the circuit board including the antenna structure is changed from an up-down structure into a left-right structure for reducing a board thickness.Type: ApplicationFiled: October 18, 2021Publication date: January 4, 2024Inventors: CHIH-CHIEH FU, YU-JIA MEN
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Patent number: 11864329Abstract: A method for manufacturing a fan-out chip packaging structure with decreased use of a crack-inducing hot-soldering process includes a first carrier plate with first and a second outer wiring layers. Two first conductive posts are formed on the first outer wiring layer, one end of each post is electrically connected to the first outer wiring layer. A receiving groove is formed between first conductive posts, and a sidewall of each post is surrounded by a first insulating layer. An embedded component is laid in the receiving groove and a second carrier plate is formed on the first insulating layer, wherein the second carrier plate carries third and fourth outer wiring layers. A first outer component is connected to the second outer wiring layer, and a second outer component is connected to the fourth outer wiring layer.Type: GrantFiled: May 25, 2022Date of Patent: January 2, 2024Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.Inventors: Chih-Chieh Fu, Yuan-Yu Lin, Ze-Jie Li
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Publication number: 20230345643Abstract: A method for manufacturing a fan-out chip packaging structure with decreased use of a crack-inducing hot-soldering process includes a first carrier plate with first and a second outer wiring layers. Two first conductive posts are formed on the first outer wiring layer, one end of each post is electrically connected to the first outer wiring layer. A receiving groove is formed between first conductive posts, and a sidewall of each post is surrounded by a first insulating layer. An embedded component is laid in the receiving groove and a second carrier plate is formed on the first insulating layer, wherein the second carrier plate carries third and fourth outer wiring layers. A first outer component is connected to the second outer wiring layer, and a second outer component is connected to the fourth outer wiring layer.Type: ApplicationFiled: May 25, 2022Publication date: October 26, 2023Inventors: CHIH-CHIEH FU, YUAN-YU LIN, ZE-JIE LI
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Patent number: 11483931Abstract: An all-directions embedded module includes a substrate layer, many first embedded pads, many second embedded pads, and many side wall circuits. The substrate layer comprises a first surface, a second surface opposite to the first surface, and a plurality of side surfaces connected to the first surface and the second surface. The first embedded pads is formed on the first surface. The second embedded pads is formed on the second surface. The side wall circuits embedded in the substrate layer and exposed from the side surfaces. The all-directions embedded module further includes a plurality of first connecting circuits formed on the first surface and a plurality of second connecting circuits formed on the second surface. The first embedded pads is connected to the side wall circuits by the first connecting circuits. The second embedded pads is connected to the side wall circuits by the second connecting circuits.Type: GrantFiled: May 12, 2021Date of Patent: October 25, 2022Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.Inventor: Chih-Chieh Fu
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Publication number: 20220279655Abstract: A packaging structure, includes: a dielectric layer; at least one inner wiring layer embedded in the dielectric layer; at least two outer wiring layers arranged two sides of the at least one inner wiring layer and combined with the dielectric layer; and at least one electronic component embedded in the dielectric layer; each inner wiring layer including at least two spaced supporting pads, and each supporting pad including a main body and a protruding portion extending outward from a periphery of the main body, the packaging structure further including at least two spaced positioning pillars, and each positioning pillar correspondingly connected to one main body, each electronic component arranged between at least two positioning pillars, and an end of each electronic component being in contact with protruding portions of at least two supporting pads, thereby packaging the electronic component accurately.Type: ApplicationFiled: May 18, 2022Publication date: September 1, 2022Applicants: HongQiSheng Precision Electronics (QinHuangDao) Co.,Ltd., Avary Holding (Shenzhen) Co., Limited., Avary Holding (Shenzhen) Co., Limited.Inventor: CHIH-CHIEH FU
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Patent number: 11399436Abstract: A circuit board includes a baseboard, a first conductive circuit layer, a second conductive circuit layer, at least one through hole, and a number of conductive lines. The first conductive circuit layer includes a number of first conductive circuit lines formed on a first side of the baseboard. The second conductive circuit layer includes a number of second conductive circuit lines formed on a second side of the baseboard. The through hole is defined through the first conductive circuit layer, the baseboard, and the second conductive circuit layer. The number of conductive lines are formed in an inner wall of the through hole and spaced apart around the through hole. Each conductive line electrically couples one of the first conductive circuit lines to a corresponding one of the second conductive circuit lines.Type: GrantFiled: September 22, 2020Date of Patent: July 26, 2022Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.Inventor: Chih-Chieh Fu
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Patent number: 11375619Abstract: A packaging structure, includes: a dielectric layer; at least one inner wiring layer embedded in the dielectric layer; at least two outer wiring layers arranged two sides of the at least one inner wiring layer and combined with the dielectric layer; and at least one electronic component embedded in the dielectric layer; each inner wiring layer including at least two spaced supporting pads, and each supporting pad including a main body and a protruding portion extending outward from a periphery of the main body, the packaging structure further including at least two spaced positioning pillars, and each positioning pillar correspondingly connected to one main body, each electronic component arranged between at least two positioning pillars, and an end of each electronic component being in contact with protruding portions of at least two supporting pads, thereby packaging the electronic component accurately. The present invention also needs to provide a method for manufacturing the packaging structure.Type: GrantFiled: September 24, 2019Date of Patent: June 28, 2022Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.Inventor: Chih-Chieh Fu
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Patent number: 11289468Abstract: A package structure includes an inner wiring layer, a first dielectric layer, a first outer wiring layer, and an electronic component assembly. The first dielectric layer includes a first surface and a second surface facing away from the first surface. The inner wiring layer and the electronic component assembly are embedded into the first dielectric layer from the first surface. The first outer wiring layer is disposed on the second surface. The electronic component assembly includes a first electronic element and a second electronic element. The second electronic element is disposed close to the second surface, and an electrical connector of the second electronic element faces the second surface. The first electronic element is disposed on a side of the second electronic element facing away from the second surface, and exposed from the first surface. The first outer wiring layer electrically connects the electrical connector of the second electronic element and the inner wiring layer, respectively.Type: GrantFiled: June 12, 2019Date of Patent: March 29, 2022Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.Inventor: Chih-Chieh Fu
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Publication number: 20220037178Abstract: An apparatus, system and method for storing die carriers and transferring a semiconductor die between the die carriers. A die stocker includes a rack enclosure with an integrated sorting system. The rack enclosure includes storage cells configured to receive and store die carriers having different physical configurations. A transport system transports first and second die carriers between a first plurality of storage cells and a first sorter load port, where the transport system introduces the first and second die carriers to a first sorter. The transport system transports third and fourth die carriers between a second plurality of storage cells and a second sorter load port, where the transport system introduces the third and fourth die carriers to a second sorter. The first and second die carriers have a first physical configuration, and the third and fourth die carriers have a second physical configuration, different than the first physical configuration.Type: ApplicationFiled: July 31, 2020Publication date: February 3, 2022Inventors: Tsung-Sheng KUO, Chih-Chun CHIU, Chih-Chieh FU, Chueng-Jen WANG, Hsuan LEE, Jiun-Rong PAI
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Publication number: 20210368626Abstract: A packaging structure, includes: a dielectric layer; at least one inner wiring layer embedded in the dielectric layer; at least two outer wiring layers arranged two sides of the at least one inner wiring layer and combined with the dielectric layer; and at least one electronic component embedded in the dielectric layer; each inner wiring layer including at least two spaced supporting pads, and each supporting pad including a main body and a protruding portion extending outward from a periphery of the main body, the packaging structure further including at least two spaced positioning pillars, and each positioning pillar correspondingly connected to one main body, each electronic component arranged between at least two positioning pillars, and an end of each electronic component being in contact with protruding portions of at least two supporting pads, thereby packaging the electronic component accurately. The present invention also needs to provide a method for manufacturing the packaging structure.Type: ApplicationFiled: September 24, 2019Publication date: November 25, 2021Inventor: CHIH-CHIEH FU
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Publication number: 20210296301Abstract: A package structure includes an inner wiring layer, a first dielectric layer, a first outer wiring layer, and an electronic component assembly. The first dielectric layer includes a first surface and a second surface facing away from the first surface. The inner wiring layer and the electronic component assembly are embedded into the first dielectric layer from the first surface. The first outer wiring layer is disposed on the second surface. The electronic component assembly includes a first electronic element and a second electronic element. The second electronic element is disposed close to the second surface, and an electrical connector of the second electronic element faces the second surface. The first electronic element is disposed on a side of the second electronic element facing away from the second surface, and exposed from the first surface. The first outer wiring layer electrically connects the electrical connector of the second electronic element and the inner wiring layer, respectively.Type: ApplicationFiled: June 12, 2019Publication date: September 23, 2021Applicants: HongQiSheng Precision Electronics (QinHuangDao) Co.,Ltd., Avary Holding (Shenzhen) Co., Limited.Inventor: CHIH-CHIEH FU
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Publication number: 20210267064Abstract: An all-directions embedded module includes a substrate layer, many first embedded pads, many second embedded pads, and many side wall circuits. The substrate layer comprises a first surface, a second surface opposite to the first surface, and a plurality of side surfaces connected to the first surface and the second surface. The first embedded pads is formed on the first surface. The second embedded pads is formed on the second surface. The side wall circuits embedded in the substrate layer and exposed from the side surfaces. The all-directions embedded module further includes a plurality of first connecting circuits formed on the first surface and a plurality of second connecting circuits formed on the second surface. The first embedded pads is connected to the side wall circuits by the first connecting circuits. The second embedded pads is connected to the side wall circuits by the second connecting circuits.Type: ApplicationFiled: May 12, 2021Publication date: August 26, 2021Inventor: CHIH-CHIEH FU
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Patent number: 11044813Abstract: An all-directions embedded module includes a substrate layer, many first embedded pads, many second embedded pads, and many side wall circuits. The substrate layer comprises a first surface, a second surface opposite to the first surface, and a plurality of side surfaces connected to the first surface and the second surface. The first embedded pads is formed on the first surface. The second embedded pads is formed on the second surface. The side wall circuits embedded in the substrate layer and exposed from the side surfaces. The all-directions embedded module further includes a plurality of first connecting circuits formed on the first surface and a plurality of second connecting circuits formed on the second surface. The first embedded pads is connected to the side wall circuits by the first connecting circuits. The second embedded pads is connected to the side wall circuits by the second connecting circuits.Type: GrantFiled: December 13, 2019Date of Patent: June 22, 2021Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.Inventor: Chih-Chieh Fu
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Patent number: 10993328Abstract: A module-embedded multilayer circuit board includes an inner circuit board, component embedded module embedded in the through opening, a first outer circuit board, and a second outer circuit board. A through opening is defined in the inner circuit board. The component embedded module includes a top surface and side surfaces. The top surface has a length greater than that of the two side surfaces. Each component embedded module includes a component, upper circuit patterns formed on the top surface, and side circuit patterns formed on the side surface and exposed from the through opening. The first and the second outer circuit board are formed on the inner circuit board. One end of the side circuit patterns is electrically connected to the first and the second outer circuit board, the other end of the side circuit patterns is electrically connected to the component by the upper circuit patterns, respectively.Type: GrantFiled: September 27, 2019Date of Patent: April 27, 2021Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.Inventor: Chih-Chieh Fu
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Publication number: 20210120674Abstract: An all-directions embedded module includes a substrate layer, many first embedded pads, many second embedded pads, and many side wall circuits. The substrate layer comprises a first surface, a second surface opposite to the first surface, and a plurality of side surfaces connected to the first surface and the second surface. The first embedded pads is formed on the first surface. The second embedded pads is formed on the second surface. The side wall circuits embedded in the substrate layer and exposed from the side surfaces. The all-directions embedded module further includes a plurality of first connecting circuits formed on the first surface and a plurality of second connecting circuits formed on the second surface. The first embedded pads is connected to the side wall circuits by the first connecting circuits. The second embedded pads is connected to the side wall circuits by the second connecting circuits.Type: ApplicationFiled: December 13, 2019Publication date: April 22, 2021Inventor: CHIH-CHIEH FU
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Publication number: 20210037653Abstract: A module-embedded multilayer circuit board includes an inner circuit board, component embedded module embedded in the through opening, a first outer circuit board, and a second outer circuit board. A through opening is defined in the inner circuit board. The component embedded module includes a top surface and side surfaces. The top surface has a length greater than that of the two side surfaces. Each component embedded module includes a component, upper circuit patterns formed on the top surface, and side circuit patterns formed on the side surface and exposed from the through opening. The first and the second outer circuit board are formed on the inner circuit board. One end of the side circuit patterns is electrically connected to the first and the second outer circuit board, the other end of the side circuit patterns is electrically connected to the component by the upper circuit patterns, respectively.Type: ApplicationFiled: September 27, 2019Publication date: February 4, 2021Inventor: CHIH-CHIEH FU
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Publication number: 20210007226Abstract: A circuit board includes a baseboard, a first conductive circuit layer, a second conductive circuit layer, at least one through hole, and a number of conductive lines. The first conductive circuit layer includes a number of first conductive circuit lines formed on a first side of the baseboard. The second conductive circuit layer includes a number of second conductive circuit lines formed on a second side of the baseboard. The through hole is defined through the first conductive circuit layer, the baseboard, and the second conductive circuit layer. The number of conductive lines are formed in an inner wall of the through hole and spaced apart around the through hole. Each conductive line electrically couples one of the first conductive circuit lines to a corresponding one of the second conductive circuit lines.Type: ApplicationFiled: September 22, 2020Publication date: January 7, 2021Inventor: CHIH-CHIEH FU
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Patent number: 10827623Abstract: A circuit board includes a baseboard, a first conductive circuit layer, a second conductive circuit layer, at least one through hole, and a number of conductive lines. The first conductive circuit layer includes a number of first conductive circuit lines formed on a first side of the baseboard. The second conductive circuit layer includes a number of second conductive circuit lines formed on a second side of the baseboard. The through hole is defined through the first conductive circuit layer, the baseboard, and the second conductive circuit layer. The number of conductive lines are formed in an inner wall of the through hole and spaced apart around the through hole. Each conductive line electrically couples one of the first conductive circuit lines to a corresponding one of the second conductive circuit lines.Type: GrantFiled: December 25, 2018Date of Patent: November 3, 2020Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.Inventor: Chih-Chieh Fu
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Patent number: 10757817Abstract: A circuit board with embedded components includes an inner layer board, electronic component disposed in the inner layer circuit board, and third to sixth conductive circuit layers. The third and fourth conductive circuit layers are on opposite surfaces of the inner circuit board through first and second adhesive layers. The third conductive circuit layer and the fourth conductive circuit layer are electrically connected to the first conductive circuit layer and the second conductive circuit layer.Type: GrantFiled: January 15, 2019Date of Patent: August 25, 2020Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.Inventor: Chih-Chieh Fu