Abstract: A human-machine interface (HMI) system comprises a local operation device, a display device, a HMI display control device and a communication control device. The local operation device generates a local operation signal. The display device shows a display image corresponding to a display signal. The HMI display control device generates the display signal according to the local operation signal or a remote operation signal. The communication control device comprises a wireless communication connection port for connecting with a remote operation device. The communication control device transmits the local operation signal to the HMI display control device, transmits the display signal to the display device, and selectively transmits the display signal to the remote operation device.

Abstract: A semiconductor device includes a semiconductor substrate and a passive component. The passive component is formed on the semiconductor substrate and includes a first polysilicon (poly) layer, a salicide blockage (SAB) layer and a first salicide layer. The SAB layer is formed on the first poly layer. The first salicide layer is formed on the SAB layer.

Abstract: An intelligent diagnosis system for a power module. The system includes a power module, a hardware checking module and a diagnostic module. The power module has a temperature sensing element for obtaining a temperature difference between a starting minimum temperature and a current temperature. The hardware checking module has a current sensing element, a voltage sensing element and a magnetic coupling closed loop detection element for obtaining the current, the output voltage and the input voltage of the power module, and the hardware loop status, respectively. The diagnostic module calculates the number of cycles that have been operated, a measured impedance and an instantaneous power based on those measurement results, and calculating a risk index based on the number of cycles that have been operated, the temperature difference, the measured impedance, the instantaneous power and the hardware loop status, thereby determining the accumulation of the abnormality index record.

Abstract: A semiconductor device includes a semiconductor substrate and a passive component. The passive component is formed on the semiconductor substrate and includes a first polysilicon (poly) layer, a salicide blockage (SAB) layer and a first salicide layer. The SAB layer is formed on the first poly layer. The first salicide layer is formed on the SAB layer.

Abstract: A semiconductor device includes a well region of a first conductivity type, having a first depth, formed in a substrate. A source contact region of a second conductivity type is formed in the well region. A drift region of the second conductivity type, having a second depth greater than 50% of the first depth, is formed in the substrate adjacent to the well region. A drain contact region of the second conductivity type is formed in the drift region. A gate electrode is formed on the substrate between the source contact region and the drain contact region. The drain contact region is spaced apart from the gate electrode and the source contact region is adjacent to the gate electrode. Furthermore, a method of fabricating a semiconductor device is also provided. The method includes performing a multi-step implantation process to form a drift region.

Abstract: An intelligent diagnosis system for a power module. The system includes a power module, a hardware checking module and a diagnostic module. The power module has a temperature sensing element for obtaining a temperature difference between a starting minimum temperature and a current temperature. The hardware checking module has a current sensing element, a voltage sensing element and a magnetic coupling closed loop detection element for obtaining the current, the output voltage and the input voltage of the power module, and the hardware loop status, respectively. The diagnostic module calculates the number of cycles that have been operated, a measured impedance and an instantaneous power based on those measurement results, and calculating a risk index based on the number of cycles that have been operated, the temperature difference, the measured impedance, the instantaneous power and the hardware loop status, thereby determining the accumulation of the abnormality index record.

Abstract: A semiconductor device includes a well region of a first conductivity type, having a first depth, formed in a substrate. A source contact region of a second conductivity type is formed in the well region. A drift region of the second conductivity type, having a second depth greater than 50% of the first depth, is formed in the substrate adjacent to the well region. A drain contact region of the second conductivity type is formed in the drift region. A gate electrode is formed on the substrate between the source contact region and the drain contact region. The drain contact region is spaced apart from the gate electrode and the source contact region is adjacent to the gate electrode. Furthermore, a method of fabricating a semiconductor device is also provided. The method includes performing a multi-step implantation process to form a drift region.

Abstract: In accordance with one embodiment, the present invention provides a bipolar junction transistor including an emitter region; a base region; a first isolation between the emitter region and the base region; a gate on the first isolation region and overlapping at least a portion of a periphery of the emitter region; a collector region; and a second isolation between the base region and the collector region.

Abstract: In accordance with one embodiment, the present invention provides a bipolar junction transistor including an emitter region; a base region; a first isolation between the emitter region and the base region; a gate on the first isolation region and overlapping at least a portion of a periphery of the emitter region; a collector region; and a second isolation between the base region and the collector region.

Abstract: An expansion unit detachably assembled to an electronic device is provided. The electronic device has a device connector on one side thereof. The expansion unit for the electronic device includes a base, a pivoting mechanism, and an expansion unit connector. The pivoting mechanism is located on one side of the base, and includes a shaft and a bearing fitting therewith. The expansion unit connector is disposed in the shaft and rotated along with the shaft in the bearing, and is detachably and electrically connected to the device connector. When the expansion unit connector is connected to the device connector, the position of the electronic device relative to the base may be adjusted by the pivoting mechanism.

Abstract: An electronic device assembly includes an electronic device and a mini connector. The electronic device includes a first housing. The first housing includes an assembling opening, a first positioning portion located adjacent to the assembling opening, and a first connecting terminal set located in the assembling opening. The mini connector includes a second housing, a connecting wire, and a second connecting terminal set. The second housing includes a second positioning portion having a shape complementary to that of the first positioning portion. The connecting wire passing through the second housing is electrically connected to the second connecting terminal set located in the second housing. The second positioning portion is located at one side of the second connecting terminal set. With the complementary relationship between the shapes of the second positioning portion and the first positioning portion, the mini connector is configured to be connected only to the electronic device.

Abstract: An expansion unit detachably assembled to an electronic device is provided. The electronic device has a device connector on one side thereof. The expansion unit for the electronic device includes a base, a pivoting mechanism, and an expansion unit connector. The pivoting mechanism is located on one side of the base, and includes a shaft and a bearing fitting therewith. The expansion unit connector is disposed in the shaft and rotated along with the shaft in the bearing, and is detachably and electrically connected to the device connector. When the expansion unit connector is connected to the device connector, the position of the electronic device relative to the base may be adjusted by the pivoting mechanism.

Abstract: Two alternate gate electrode structures are developed with expanded top portions of the gate electrode to maintain or reduce electrode effective sheer resistance improving high frequency performance and reducing gate delay in submicron FET ULSI devices. The method for producing these structures is presented. For one structure the top surface of the expanded portion of the electrode has an essentially flat surface such as would be represented in a T shaped gate element. With the alternative structure the top surface of the expanded portion of the electrode is inclined upward from near the center of the electrode. This surface angulation results in a Y shaped gate electrode element. Both structures effectively maintain or reduce electrode sheet resistance without increasing the underlying active channel length. The process is compatible with the self aligned gate process and is also compatible with salicidation methods.

Abstract: Two alternate gate electrode structures are developed with expanded top portions of the gate electrode to maintain or reduce electrode effective sheet resistance improving high frequency performance and reducing gate delay in submicron FET ULSI devices. The method for producing these structures is presented. For one structure the top surface of the expanded portion of the electrode has an essentially flat surface such as would be represented in a T shaped gate element. With the alternative structure the top surface of the expanded portion of the electrode is inclined upward from near the center of the electrode. This surface angulation results in a Y shaped gate electrode element. Both structures effectively maintain or reduce electrode sheet resistance without increasing the underlying active channel length. The process is compatible with the self aligned gate process and is also compatible with salicidation methods.