Patents by Inventor Chih-Chung Huang

Chih-Chung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200375004
    Abstract: The invention provides a control method for sets of series-parallel-connected LEDs via a single wire. Step 1: providing an LED circuit including a control module and a light-emitting module. The light-emitting module includes LED strings connected to one another in parallel. Each of the LED strings includes a plurality of LED units connected in series to one another, and at least one counter comprising a counter start time different from that of another. Step 2: sending a setting signal by the control module, and allocating one identification code obtained sequentially in time to one of the LED string according to the different counter start times of the LED strings. Step3: sending a designation signal to the light-emitting module by the control module, such that the LED string with the corresponding identification value is selected and independently controlled by the control module.
    Type: Application
    Filed: May 11, 2020
    Publication date: November 26, 2020
    Inventors: TSUNG-WEN HUANG, SHIH-CHUNG CHENG, CHIH-MING KAO
  • Publication number: 20200357850
    Abstract: A semiconductor device includes: a substrate having a magnetic tunneling junction (MTJ) region and a logic region; a magnetic tunneling junction (MTJ) on the MTJ region, wherein a top view of the MTJ comprises a circle; and a first metal interconnection on the MTJ. Preferably, a top view of the first metal interconnection comprises a flat oval overlapping the circle.
    Type: Application
    Filed: June 4, 2019
    Publication date: November 12, 2020
    Inventors: Ting-Hsiang Huang, Yi-Chung Sheng, Sheng-Yuan Hsueh, Kuo-Hsing Lee, Chih-Kai Kang
  • Patent number: 10802961
    Abstract: An apparatus and a method for accessing a plurality of memory blocks is disclosed. The An apparatus comprises: a memory circuit configured to store a recording table, wherein the recording table corresponds to quality index of the plurality of memory blocks; and a control circuit configured to group the plurality of memory blocks to a first memory group and a second memory group according to the quality index; to enable to access the memory blocks in the first memory group, and to disable to access the memory blocks in the second memory group.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: October 13, 2020
    Assignee: RAYMX MICROELECTRONICS CORP.
    Inventors: Yen-Chung Chen, Chih-Ching Chien, Li-Chun Huang, Han-Ting Tsai, Wei-Ren Hsu
  • Patent number: 10784307
    Abstract: A light-emitting device includes a substrate and a first light-emitting unit. The first light-emitting unit is disposed on the substrate, and includes a first semiconductor layer, a first light-emitting layer, and a second semiconductor layer. The first semiconductor layer is disposed on the substrate. The first light-emitting layer is disposed between the first semiconductor layer and the second semiconductor layer. The second semiconductor layer is disposed on the first light-emitting layer. The first semiconductor layer has a first sidewall and a second sidewall. A first angle is between the substrate and the first sidewall. A second angle is between the substrate and the second sidewall. The first angle is smaller than the second angle.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: September 22, 2020
    Assignee: GENESIS PHOTONICS INC.
    Inventors: Tsung-Syun Huang, Chih-Chung Kuo, Jing-En Huang, Shao-Ying Ting
  • Publication number: 20200296561
    Abstract: A method applied to a wireless Bluetooth audio communication system includes: providing an audio gateway of a first piconet to communicate with a master device in the first piconet and to transmit at least one packet of audio stream to the master device and a slave device; employing a first transceiver as the master device to receive the at least one packet of the audio stream from the audio gateway; and, employing a second transceiver as the slave device to receive the at least one packet of the audio stream from the audio gateway and to acknowledge the first transceiver whether the second transceiver has successfully received the at least one packet of the audio stream from the audio gateway.
    Type: Application
    Filed: June 3, 2020
    Publication date: September 17, 2020
    Inventors: Kuang-Hu Huang, Wei-Chung Peng, Jeng-Hong Chen, PETE HSINHSIANG LIU, De-Hao Tseng, Jing-Syuan Jia, Chih-Wei Sung, I-Ken Ho
  • Patent number: 10770345
    Abstract: A method for fabricating an integrated circuit is provided. The method includes depositing a first polish stop layer above a memory device, in which the first polish stop layer has a first portion over the memory device and a second portion that is not over the memory device; removing the second portion of the first polish stop layer; depositing an inter-layer dielectric layer over the first polish stop layer after removing the second portion of the first polish stop layer; and polishing the inter-layer dielectric layer until reaching the first portion of the first polish stop layer.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: September 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tai-Yen Peng, Chang-Sheng Lin, Chien-Chung Huang, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Han-Ting Lin, Chih-Yuan Ting, Jyu-Horng Shieh
  • Publication number: 20200266340
    Abstract: An integrated circuit is provided. The integrated circuit includes a metallization pattern, a dielectric layer, and plural memory devices. The metallization pattern has plural first conductive features and a second conductive feature. The dielectric layer is over the metallization pattern, in which the dielectric layer has a first portion over the first conductive features and a second portion over the second conductive feature. The memory devices are at least partially in the first portion of the dielectric layer and respectively connected with the first conductive features. The first portion of the dielectric layer has a plurality of side parts respectively surrounding the memory devices and an extending part connecting the side parts to each other, and a thickness of the second portion is greater than a thickness of the extending part of the first portion of the dielectric layer.
    Type: Application
    Filed: May 4, 2020
    Publication date: August 20, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tai-Yen PENG, Chien-Chung HUANG, Yu-Shu CHEN, Sin-Yi YANG, Chen-Jung WANG, Han-Ting LIN, Chih-Yuan TING, Jyu-Horng SHIEH, Hui-Hsien WEI
  • Publication number: 20200226386
    Abstract: A highlight processing method includes: obtaining a frame sequence that includes frames each having image contents associated with at least one object, wherein object pose estimation is performed upon each frame of the frame sequence to generate an object pose estimation result of each frame, and further includes determining at least one of a start point and an end point of a highlight interval, wherein comparison of object pose estimation results of different frames is involved in determination of at least one of the start point and the end point of the highlight interval.
    Type: Application
    Filed: August 19, 2019
    Publication date: July 16, 2020
    Inventors: Shih-Jung Chuang, Yan-Che Chuang, Chun-Nan Li, Yu-Hsuan Huang, Chih-Chung Chiang
  • Patent number: 10715985
    Abstract: A method applied to a wireless Bluetooth audio communication system includes: providing an audio gateway of a first piconet to communicate with a master device in the first piconet and to transmit at least one packet of audio stream to the master device and a slave device; employing a first transceiver as the master device to receive the at least one packet of the audio stream from the audio gateway; and, employing a second transceiver as the slave device to receive the at least one packet of the audio stream from the audio gateway and to acknowledge the first transceiver whether the second transceiver has successfully received the at least one packet of the audio stream from the audio gateway.
    Type: Grant
    Filed: January 17, 2019
    Date of Patent: July 14, 2020
    Assignee: Audiowise Technology Inc.
    Inventors: Kuang-Hu Huang, Wei-Chung Peng, Jeng-Hong Chen, Pete Hsinhsiang Liu, De-Hao Tseng, Jing-Syuan Jia, Chih-Wei Sung, I-Ken Ho
  • Publication number: 20200208265
    Abstract: A coating apparatus includes a material-supply device configured to supply a precursor and a reactant, a distribution device connected to the material-supply device, and a reactor connected to the distribution device. The distribution device is configured to distribute the precursor and the reactant into the reactor.
    Type: Application
    Filed: December 26, 2019
    Publication date: July 2, 2020
    Applicant: AZTRONG INC.
    Inventors: Chien-Te HSIEH, Kuan-Tsae HUANG, Peng-Yang LEE, Chih-Chung MA, Hwai-Jan WU
  • Patent number: 10700126
    Abstract: A magnetic random access memory (MRAM) includes device strings coupled in parallel, each comprising magnetic tunnel junctions (MTJs) coupled in serial, wherein a quantity of the MTJs of each of the device strings is equal to a quantity of the device strings, and an equivalent resistance (Req) of the MTJs is equal to an average of the sum of a high resistance of one of the MTJs and a low resistance of another MTJ.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: June 30, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ting-Hsiang Huang, Yi-Chung Sheng, Sheng-Yuan Hsueh, Kuo-Hsing Lee, Chih-Kai Kang
  • Patent number: 10698261
    Abstract: A backlight module having a bearing plate and a light module is provided. The bearing plate has a bearing surface, which includes a trough, a first groove, a first inner stage, and a first outer stage. The first groove is disposed close to the trough. The first inner stage is between the trough and the first groove while the first outer stage is on the side of the first groove opposite to the first inner stage. The light module is disposed on the bearing surface and corresponds to the trough. Comparing to the first inner stage, the first outer stage is more protruding toward the light module.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: June 30, 2020
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chih-Chung Huang, Yu-Chuan Lin
  • Publication number: 20200203425
    Abstract: A semiconductor device includes: a dummy gate on a substrate; a first control gate on one side of the dummy gate and a second control gate on another side of the dummy gate; a well in the substrate, wherein the well comprises a first conductive type; a first source/drain region between the dummy gate and the first control gate, wherein the first source/drain region comprises a second conductive type; a second source/drain region between the dummy gate and the second control gate, wherein the second source/drain region comprises the second conductive type; and a doped region directly under the dummy gate, wherein the doped region comprises the first conductive type.
    Type: Application
    Filed: January 29, 2019
    Publication date: June 25, 2020
    Inventors: Ting-Hsiang Huang, Yi-Chung Sheng, Sheng-Yuan Hsueh, Kuo-Hsing Lee, Chih-Kai Kang
  • Patent number: 10692928
    Abstract: A semiconductor device includes: a dummy gate on a substrate; a first control gate on one side of the dummy gate and a second control gate on another side of the dummy gate; a well in the substrate, wherein the well comprises a first conductive type; a first source/drain region between the dummy gate and the first control gate, wherein the first source/drain region comprises a second conductive type; a second source/drain region between the dummy gate and the second control gate, wherein the second source/drain region comprises the second conductive type; and a doped region directly under the dummy gate, wherein the doped region comprises the first conductive type.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: June 23, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ting-Hsiang Huang, Yi-Chung Sheng, Sheng-Yuan Hsueh, Kuo-Hsing Lee, Chih-Kai Kang
  • Publication number: 20200183233
    Abstract: A backlight module having a bearing plate and a light module is provided. The bearing plate has a bearing surface, which includes a trough, a first groove, a first inner stage, and a first outer stage. The first groove is disposed close to the trough. The first inner stage is between the trough and the first groove while the first outer stage is on the side of the first groove opposite to the first inner stage. The light module is disposed on the bearing surface and corresponds to the trough. Comparing to the first inner stage, the first outer stage is more protruding toward the light module.
    Type: Application
    Filed: June 28, 2019
    Publication date: June 11, 2020
    Inventors: Chih-Chung Huang, Yu-Chuan Lin
  • Publication number: 20200174063
    Abstract: Embodiments of method and apparatus for testing a semiconductor device with a probe card having a first heater underneath prior to testing are provided herein, for heating the probe card to a first default temperature to keep the.
    Type: Application
    Filed: October 23, 2019
    Publication date: June 4, 2020
    Inventors: TENG-CHUNG HUANG, CHIH-CHIANG LEE
  • Patent number: 10660212
    Abstract: The present disclosure provides an element submount and a method for manufacturing the same. The element submount includes a substrate, a first conductive heat-dissipating layer, a second conductive heat-dissipating layer, a first heat-dissipating layer and an element bonding layer. The substrate has opposite first and second surfaces. The first conductive heat-dissipating layer is formed on the first surface. The second conductive heat-dissipating layer is formed on the first surface and separated from the first conductive heat-dissipating layer. The first heat-dissipating layer is formed on the second surface. The element bonding layer is formed on the second conductive heat-dissipating layer. By electroplating and processing techniques, the edge of one or two sides of the element bonding layer exceeds an edge of the second conductive heat-dissipating layer and partially covers a side of the second conductive heat-dissipating layer.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: May 19, 2020
    Assignee: XSENSE TECHNOLOGY CORPORATION
    Inventors: Chen-Yu Li, Chia-Jung Chen, Yeu-Wen Huang, Chun-Chung Lin, Chih-Lung Lin
  • Publication number: 20200149988
    Abstract: A pressure measuring method, applied to a pressure measuring apparatus, comprising: measuring a first pressure sensing value when the pressure measuring apparatus operates at a first scan frequency and receives a first pressure; and measuring a second pressure sensing value when the pressure measuring apparatus operates a second scan frequency and receives the first pressure. The first pressure sensing value and the second pressure sensing value are different, and a change between the first pressure sensing value and the second pressure sensing value is according to a change between the first scan frequency and the second scan frequency. The first scan frequency and the second scan frequency are different. The pressure measuring method can further comprise a calibrating mechanism to compensate the sensed pressure. By this way, the pressure sensing value can be calibrated, to solve the issue that the pressure sensing values are affected by scan frequencies.
    Type: Application
    Filed: January 20, 2020
    Publication date: May 14, 2020
    Inventors: Yu-Han Chen, Chih-Wei Huang, Chi-Chieh Liao, Wei-Chung Wang
  • Patent number: 10651373
    Abstract: A method for forming an integrated circuit is provided. The method includes forming a dielectric layer over a cell region and a logic region of a substrate; forming a resistance switching layer over the dielectric layer; performing at least one etch process to pattern the resistance switching layer into a plurality of resistance switching elements in the cell region, in which a first portion of the dielectric layer in the logic region is less etched by the etch process than a second portion of the dielectric layer in the cell region.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: May 12, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tai-Yen Peng, Chien-Chung Huang, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Han-Ting Lin, Chih-Yuan Ting, Jyu-Horng Shieh, Hui-Hsien Wei
  • Publication number: 20200137545
    Abstract: A method applied into a controller of a wireless Bluetooth device includes: providing a first flag and a second flag; asserting the first flag when the controller successfully receives the particular packet transmitted from the audio gateway; asserting the second flag when the controller successfully receives an acknowledgement from a secondary device wherein a reception of the acknowledgement indicates that the secondary device successfully receives the particular packet; and transmitting an acknowledgement of a particular packet to an audio gateway when the first flag and the second flag are asserted.
    Type: Application
    Filed: December 25, 2019
    Publication date: April 30, 2020
    Inventors: Chih-Wei Sung, PETE HSINHSIANG LIU, Jing-Syuan Jia, Wei-Chung Peng, Kuang-Hu Huang, Jeng-Hong Chen, I-Ken Ho, Wei-Chih Chen, De-Hao Tseng