Abstract: A compound, and a polymer prepared therefrom, are provided. The compound has a structure represented by Formula (I) or Formula (II): wherein A is R1 is C1-10 alkyl, C5-12 cycloalkyl, C6-14 aryl, C3-12 heteroaryl, C1-10 alkoxy, C6-12 aryloxy, C1-10 silyl, amino, thiol, or phosphonate group; R2 is H, or C1-10 alkyl; and, R3 is C1-10 alkoxy, C1-10 alkanol, amine, or hydroxy.

Abstract: A constant current regulator includes a first transistor having a first terminal coupled with an input voltage; a second transistor having a first terminal coupled with a control terminal of the first transistor; a third transistor having a first terminal coupled with the first terminal of the first transistor and having a control terminal coupled with the first terminal of the second transistor; a first resistor having a first terminal coupled with a second terminal of the third transistor and having a second terminal coupled with a control terminal of the second transistor; a second resistor having a first terminal coupled with the control terminal of the second transistor and having a second terminal coupled with a second terminal of the second transistor; and a third resistor having a first terminal coupled with the second terminal of the third transistor and having a second terminal coupled with a fixed-voltage terminal.

Abstract: A driver circuit for driving an LED array is disclosed. The LED array includes a first, a second, a third, a fourth LED device and a diode device. The second LED device is connected to the first LED device. The fourth LED device is connected to the third LED device. The diode device is connected between the second LED device and the third LED device. The driver circuit includes a first constant current regulator for coupling between the first and the second LED device; a second constant current regulator for coupling between the second and the third LED device; a third constant current regulator for coupling between the third and the fourth LED device; a fourth constant current regulator for coupling between the fourth LED device and a fixed-voltage terminal; and a control circuit coupled with the first, the second, the third, and the fourth constant current regulators.

Abstract: A control circuit for an AC-DC power converter includes a junction field effect transistor (JFET), a first resistor, a second resistor, and a third resistor. The JFET includes a substrate, a drain, a source, a gate, a first oxide layer, and a second oxide layer. The first oxide layer is attached to a region located between the drain and the gate of the JFET, and the second oxide layer is not attached to a region located between the drain and the gate of the JFET. The first resistor is positioned on the first oxide layer, and the second resistor and the third resistor are positioned on the second oxide layer. When the JFET and the first resistor receive an input power signal, the first, the second, and the third resistors divide the input power signal, and prevent from the breakdown of the first oxide layer and the second oxide layer.

Abstract: An LED driving device includes: a rectifying circuit for outputting a DC voltage to a string of M LED units; (M?1) first switching circuits each coupled between a corresponding one of first to (M?1)th LED units and ground; and a second switching circuit coupled between an Mth LED unit and ground. When the DC voltage is sufficient to turn on first to kth LED units, where 1?k?M, the kth LED unit is coupled to ground through first and second conductive paths provided by a resistor unit, and a corresponding first switching circuit or the second switching circuit, and each of the first to (k?1)th LED units is coupled to ground through a third conductive path provided by a corresponding first switching circuit and the resistor unit.

Abstract: A control circuit for an AC-DC power converter includes a junction field effect transistor (JFET), a first resistor, a second resistor, and a third resistor. The JFET includes a substrate, a drain, a source, a gate, a first oxide layer, and a second oxide layer. The first oxide layer is attached to a region located between the drain and the gate of the JFET, and the second oxide layer is not attached to a region located between the drain and the gate of the JFET. The first resistor is positioned on the first oxide layer, and the second resistor and the third resistor are positioned on the second oxide layer. When the JFET and the first resistor receive an input power signal, the first, the second, and the third resistors divide the input power signal, and prevent from the breakdown of the first oxide layer and the second oxide layer.

Abstract: An LED driving device includes: a rectifying circuit for outputting a DC voltage to a string of M LED units; (M?1) first switching circuits each coupled between a corresponding one of first to (M?1)th LED units and ground; and a second switching circuit coupled between an Mth LED unit and ground. When the DC voltage is sufficient to turn on first to kth LED units, where 1?k?M, the kth LED unit is coupled to ground through first and second conductive paths provided by a resistor unit, and a corresponding first switching circuit or the second switching circuit, and each of the first to (k?1)th LED units is coupled to ground through a third conductive path provided by a corresponding first switching circuit and the resistor unit.

Abstract: The present invention discloses an isolated SCR ESD device, comprising: a substrate; a first well located in the substrate, which is floating and has a first conductivity type; a first high density doped region located in the first well and having a second conductivity type; a second well nearby the first well and having the second conductivity type; a second high density doped region located in the second well and having the second conductivity type; and a third high density doped region located in the second well and having the first conductivity type, wherein the first high density doped region is for electrical connection with a pad, and wherein the first well is not provided with a high density doped region having the first conductivity type for connection with the pad.

Abstract: The present invention discloses a power supply input voltage detection circuit. The power supply converts an input voltage to an output voltage by a transformer which includes a primary winding and a secondary winding. The primary winding is coupled to a power switch, which receives a switching signal to adjust the output voltage. The power switch is coupled to a sensing circuit; when the power switch turns ON, the sensing circuit generates a current sense signal according to current through the primary winding. The input voltage detection circuit includes: a rising time detection circuit, which detects a period, of time during which the current sense signal rises from a low reference level to a high reference level to generate a timing signal; and a determination circuit, which generates a determination signal according to the timing signal for determining whether the input signal is a high voltage or a low voltage.

Abstract: A driver circuit for driving an LED array is disclosed. The LED array includes a first, a second, a third, a fourth LED device and a diode device. The second LED device is connected to the first LED device. The fourth LED device is connected to the third LED device. The diode device is connected between the second LED device and the third LED device. The driver circuit includes a first constant current regulator for coupling between the first and the second LED device; a second constant current regulator for coupling between the second and the third LED device; a third constant current regulator for coupling between the third and the fourth LED device; a fourth constant current regulator for coupling between the fourth LED device and a fixed-voltage terminal; and a control circuit coupled with the first, the second, the third, and the fourth constant current regulators.

Abstract: The high voltage integrated circuit is disclosed. The high voltage integrated circuit comprises a low voltage control circuit, a floating circuit, a P substrate, a deep N well disposed in the substrate and a plurality of P wells disposed in the P substrate. The P wells and deep N well serve as the isolation structures. The low voltage control circuit is located outside the deep N well and the floating circuit is located inside the deep N well. The deep N well forms a high voltage junction barrier for isolating the control circuit from the floating circuit.

Abstract: A semiconductor structure with high breakdown voltage and high resistance and method for manufacturing the same. The semiconductor structure at least comprises a substrate having a first conductive type; a deep well having a second conductive type formed in the substrate; two first wells having the first conductive type and formed within the deep well; a second well having the first conductive type and formed between the two first wells within the deep well, and an implant dosage of the second well lighter than an implant dosage of each of the two first wells; and two first doping regions having the first conductive type and respectively formed within the two first wells.

Abstract: A power transistor chip with built-in enhancement mode metal oxide semiconductor field effect transistor and application circuit thereof provides an enhancement mode metal oxide semiconductor field effect transistor in association with two series connected resistors to act as a start-up circuit for the AC/DC voltage converter. The start-up circuit can be shut off after the pulse width modulation circuit of the AC/DC voltage converter circuit works normally and still capable of offering a function of brown out detection for the pulse width modulation circuit as well. Besides, the enhancement mode metal oxide semiconductor field effect transistor is built in the power transistor chip without additional masks and processes during the power transistor chip being fabricated such that the entire manufacturing process is simplified substantively with the economical production cost.

Abstract: An AC discharge circuit is disclosed to eliminate the need of bleeding resistors for an AC-to-DC switching power converter. The AC-to-DC switching power converter has two AC power input terminals to be connected to an AC power source, and an AC input capacitor connected between the two AC power input terminals. The AC discharge circuit has a rectifier circuit to rectify a first voltage across the AC input capacitor to be a second voltage applied to an input terminal of a JFET, and a power removal detector to monitor a third voltage at an output terminal of the JFET to trigger a power removal signal to discharge the AC input capacitor when the third voltage has been remained larger than a threshold for a de-bounce time.

Abstract: The present invention discloses a power supply input voltage detection circuit. The power supply converts an input voltage to an output voltage by a transformer which includes a primary winding and a secondary winding. The primary winding is coupled to a power switch, which receives a switching signal to adjust the output voltage. The power switch is coupled to a sensing circuit; when the power switch turns ON, the sensing circuit generates a current sense signal according to current through the primary winding. The input voltage detection circuit includes: a rising time detection circuit, which detects a period, of time during which the current sense signal rises from a low reference level to a high reference level to generate a timing signal; and a determination circuit, which generates a determination signal according to the timing signal for determining whether the input signal is a high voltage or a low voltage.

Abstract: The present invention discloses an integrated PMOS transistor and Schottky diode, comprising a PMOS transistor which includes a gate, a source, a drain and a channel region between the source and drain, wherein the source, drain and channel region are formed in a substrate, and a parasitic diode is formed between the drain and the channel region; and a Schottky diode formed in the substrate and connected in reverse series with the parasitic diode, the Schottky diode having one end connected with the parasitic diode and the other end connected with the source.

Abstract: A multi-chip module package is provided, which includes a first chip mounted on via a first conductive adhesive and electrically connected to a first chip carrier, a second chip mounted on via a second conductive adhesive and electrically connected to a second chip carrier which is spaced apart from the first chip carrier, wherein the second conductive adhesive is made of an adhesive material the same as that of the first conductive material, a plurality of conductive elements to electrically connect the first chip to the second chip and an encapsulant encapsulating the first chip, the first chip carrier, the second chip, the second chip carrier and the plurality of conductive elements, allowing a portion of both chip carriers to be exposed to the encapsulant, so that the first chip and second chip are able to be insulated by the separation of the first and second chip carriers.

Abstract: A method for generating a current limit signal for a power converter without sensing an input voltage of the power converter detects a current of a power switch of the power converter to obtain a current sense signal, counts a time for the current sense signal to increase from a first level to a second level, and according to the time, determines a current limit signal for limiting a maximum value of the current of the power switch for the power converter to have a constant maximum output power.

Abstract: The present invention discloses a bi-directional SCR ESD device, comprising: a substrate; a first well located in the substrate, which is floating and has a first conductivity type; a second well and a third well both located in the first well and both having a second conductivity type, the second well and the third well being separated from each other; a first high density doped region of the first conductivity type and a second high density doped region of the second conductivity type located in the second well; and a third high density doped region of the first conductivity type and a fourth high density doped region of the second conductivity type located in the third well.

Abstract: The present invention discloses an isolated SCR ESD device, comprising: a substrate; a first well located in the substrate, which is floating and has a first conductivity type; a first high density doped region located in the first well and having a second conductivity type; a second well nearby the first well and having the second conductivity type; a second high density doped region located in the second well and having the second conductivity type; and a third high density doped region located in the second well and having the first conductivity type, wherein the first high density doped region is for electrical connection with a pad, and wherein the first well is not provided with a high density doped region having the first conductivity type for connection with the pad.